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ultra3 split

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This commit is contained in:
K. Richard Pixley 1992-10-16 06:05:36 +00:00
parent 4100543aee
commit 6bf98ac01d
9 changed files with 299 additions and 223 deletions
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2
gdb/.Sanitize
View file

@ -151,6 +151,7 @@ nm-sun2.h
nm-sun3.h
nm-sun4os4.h
nm-trash.h
nm-ultra3.h
ns32k-opcode.h
ns32k-pinsn.c
objfiles.c
@ -267,6 +268,7 @@ tm-umax.h
tm-vax.h
tm-vx68.h
tm-vx960.h
ultra3-nat.c
ultra3-xdep.c
umax-xdep.c
utils.c

15
gdb/ChangeLog
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@ -1,5 +1,20 @@
Thu Oct 15 21:53:53 1992 K. Richard Pixley (rich@sendai.cygnus.com)
Ultra3 host/target/native split. (untested).
* ultra3-xdep.c: updated copyright. Do not include sys/ptrace.h.
(fetch_register, fetch_inferior_registers,
store_inferior_registers, fetch_core_registers): removed to
ultra3-nat.c.
* xm-ultra3.h (FETCH_INFERIOR_REGISTERS, U_REGS_OFFSET): removed
to nm-ultra3.h.
* Makefile.in (HFILES): added nm-ultra3.h.
* nm-ultra3.h, ultra3-nat.c: new files for native support.
* config/ultra3.mh (XDEPFILES): removed infptrace.o inftarg.o
fork-child.o.
(NAT_FILE, NATDEPFILES): new macros for native support.
* config/ultra3.mt (TDEPFILES): exec.o removed.
* xm-vaxult.h: add MEM_FNS_DECLARED.
Thu Oct 15 02:59:30 1992 John Gilmore (gnu@cygnus.com)

2
gdb/Makefile.in
View file

@ -254,7 +254,7 @@ HFILES= breakpoint.h buildsym.h call-cmds.h command.h defs.h \
tm-68k.h tm-hppa.h tm-i960.h tm-sparc.h tm-sunos.h tm-sysv4.h \
xm-m68k.h xm-sparc.h xm-sysv4.h xm-vax.h \
nm-irix3.h nm-irix4.h nm-mips.h nm-rs6000.h nm-sun2.h nm-sun3.h \
nm-sun4os4.h nm-trash.h nm-news.h
nm-sun4os4.h nm-trash.h nm-news.h nm-ultra3.h
REMOTE_EXAMPLES = m68k-stub.c i386-stub.c sparc-stub.c rem-multi.shar

4
gdb/config/ultra3.mh
View file

@ -1,7 +1,9 @@
# Host: NYU Ultracomputer (AMD 29000 running Unix)
CC=u3cc
MUNCH_DEFINE="MUNCH_NM=u3nm"
XDEPFILES= ultra3-xdep.o infptrace.o inftarg.o fork-child.o
XDEPFILES= ultra3-xdep.o
XM_FILE= xm-ultra3.h
NAT_FILE= nm-ultra3.h
NATDEPFILES= exec.o infptrace.o inftarg.o fork-child.o ultra3-nat.o
MH_CFLAGS = -DSYM1
XM_CLIBS = -lsysv -ljobs -ltermlib

2
gdb/config/ultra3.mt
View file

@ -1,5 +1,5 @@
# Target: AMD 29000 running Unix on New York Univerisity processor board.
TDEPFILES= exec.o am29k-pinsn.o am29k-tdep.o
TDEPFILES= am29k-pinsn.o am29k-tdep.o
TM_FILE= tm-ultra3.h
# SYM1 is some OS they have.
MT_CFLAGS = -DSYM1

26
gdb/nm-ultra3.h Normal file
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@ -0,0 +1,26 @@
/* Host definitions for GDB running on a 29k NYU Ultracomputer
Copyright (C) 1986, 1987, 1989, 1991, 1992 Free Software Foundation, Inc.
Contributed by David Wood (wood@lab.ultra.nyu.edu).
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
/* If we ever *do* end up using the standard fetch_inferior_registers,
this is the right value for U_REGS_OFFSET. */
#define U_REGS_OFFSET 0
/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
#define FETCH_INFERIOR_REGISTERS

250
gdb/ultra3-nat.c Normal file
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@ -0,0 +1,250 @@
/* Host-dependent code for GDB, for NYU Ultra3 running Sym1 OS.
Copyright (C) 1988, 1989, 1991, 1992 Free Software Foundation, Inc.
Contributed by David Wood (wood@nyu.edu) at New York University.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
#define DEBUG
#include "defs.h"
#include "frame.h"
#include "inferior.h"
#include "symtab.h"
#include "value.h"
#include <sys/types.h>
#include <sys/param.h>
#include <signal.h>
#include <sys/ioctl.h>
#include <fcntl.h>
#include "gdbcore.h"
#include <sys/file.h>
#include <sys/stat.h>
/* Get all available registers from the inferior. Registers that are
* defined in REGISTER_NAMES, but not available to the user/gdb are
* supplied as -1. This may include gr64-gr95 and the protected special
* purpose registers.
*/
void
fetch_inferior_registers (regno)
int regno;
{
register int i,j,ret_val=0;
char buf[128];
if (regno != -1) {
fetch_register (regno);
return;
}
/* Global Registers */
#ifdef ULTRA3
errno = 0;
ptrace (PT_READ_STRUCT, inferior_pid,
(PTRACE_ARG3_TYPE) register_addr(GR96_REGNUM,0),
(int)&pt_struct.pt_gr[0], 32*4);
if (errno != 0) {
perror_with_name ("reading global registers");
ret_val = -1;
} else for (regno=GR96_REGNUM, j=0 ; j<32 ; regno++, j++) {
supply_register (regno, &pt_struct.pt_gr[j]);
}
#else
for (regno=GR96_REGNUM ; !ret_val && regno < GR96_REGNUM+32 ; regno++)
fetch_register(regno);
#endif
/* Local Registers */
#ifdef ULTRA3
errno = 0;
ptrace (PT_READ_STRUCT, inferior_pid,
(PTRACE_ARG3_TYPE) register_addr(LR0_REGNUM,0),
(int)&pt_struct.pt_lr[0], 128*4);
if (errno != 0) {
perror_with_name ("reading local registers");
ret_val = -1;
} else for (regno=LR0_REGNUM, j=0 ; j<128 ; regno++, j++) {
supply_register (regno, &pt_struct.pt_lr[j]);
}
#else
for (regno=LR0_REGNUM ; !ret_val && regno < LR0_REGNUM+128 ; regno++)
fetch_register(regno);
#endif
/* Special Registers */
fetch_register(GR1_REGNUM);
fetch_register(CPS_REGNUM);
fetch_register(PC_REGNUM);
fetch_register(NPC_REGNUM);
fetch_register(PC2_REGNUM);
fetch_register(IPC_REGNUM);
fetch_register(IPA_REGNUM);
fetch_register(IPB_REGNUM);
fetch_register(Q_REGNUM);
fetch_register(BP_REGNUM);
fetch_register(FC_REGNUM);
/* Fake any registers that are in REGISTER_NAMES, but not available to gdb */
registers_fetched();
}
/* Store our register values back into the inferior.
* If REGNO is -1, do this for all registers.
* Otherwise, REGNO specifies which register (so we can save time).
* NOTE: Assumes AMD's binary compatibility standard.
*/
void
store_inferior_registers (regno)
int regno;
{
register unsigned int regaddr;
char buf[80];
if (regno >= 0)
{
if (CANNOT_STORE_REGISTER(regno))
return;
regaddr = register_addr (regno, 0);
errno = 0;
ptrace (PT_WRITE_U, inferior_pid,
(PTRACE_ARG3_TYPE) regaddr, read_register(regno));
if (errno != 0)
{
sprintf (buf, "writing register %s (#%d)", reg_names[regno],regno);
perror_with_name (buf);
}
}
else
{
#ifdef ULTRA3
pt_struct.pt_gr1 = read_register(GR1_REGNUM);
for (regno = GR96_REGNUM; regno < GR96_REGNUM+32; regno++)
pt_struct.pt_gr[regno] = read_register(regno);
for (regno = LR0_REGNUM; regno < LR0_REGNUM+128; regno++)
pt_struct.pt_gr[regno] = read_register(regno);
errno = 0;
ptrace (PT_WRITE_STRUCT, inferior_pid,
(PTRACE_ARG3_TYPE) register_addr(GR1_REGNUM,0),
(int)&pt_struct.pt_gr1,(1*32*128)*4);
if (errno != 0)
{
sprintf (buf, "writing all local/global registers");
perror_with_name (buf);
}
pt_struct.pt_psr = read_register(CPS_REGNUM);
pt_struct.pt_pc0 = read_register(NPC_REGNUM);
pt_struct.pt_pc1 = read_register(PC_REGNUM);
pt_struct.pt_pc2 = read_register(PC2_REGNUM);
pt_struct.pt_ipc = read_register(IPC_REGNUM);
pt_struct.pt_ipa = read_register(IPA_REGNUM);
pt_struct.pt_ipb = read_register(IPB_REGNUM);
pt_struct.pt_q = read_register(Q_REGNUM);
pt_struct.pt_bp = read_register(BP_REGNUM);
pt_struct.pt_fc = read_register(FC_REGNUM);
errno = 0;
ptrace (PT_WRITE_STRUCT, inferior_pid,
(PTRACE_ARG3_TYPE) register_addr(CPS_REGNUM,0),
(int)&pt_struct.pt_psr,(10)*4);
if (errno != 0)
{
sprintf (buf, "writing all special registers");
perror_with_name (buf);
return;
}
#else
store_inferior_registers(GR1_REGNUM);
for (regno=GR96_REGNUM ; regno<GR96_REGNUM+32 ; regno++)
store_inferior_registers(regno);
for (regno=LR0_REGNUM ; regno<LR0_REGNUM+128 ; regno++)
store_inferior_registers(regno);
store_inferior_registers(CPS_REGNUM);
store_inferior_registers(PC_REGNUM);
store_inferior_registers(NPC_REGNUM);
store_inferior_registers(PC2_REGNUM);
store_inferior_registers(IPC_REGNUM);
store_inferior_registers(IPA_REGNUM);
store_inferior_registers(IPB_REGNUM);
store_inferior_registers(Q_REGNUM);
store_inferior_registers(BP_REGNUM);
store_inferior_registers(FC_REGNUM);
#endif /* ULTRA3 */
}
}
/*
* Fetch an individual register (and supply it).
* return 0 on success, -1 on failure.
* NOTE: Assumes AMD's Binary Compatibility Standard for ptrace().
*/
static void
fetch_register (regno)
int regno;
{
char buf[128];
int val;
if (CANNOT_FETCH_REGISTER(regno)) {
val = -1;
supply_register (regno, &val);
} else {
errno = 0;
val = ptrace (PT_READ_U, inferior_pid,
(PTRACE_ARG3_TYPE) register_addr(regno,0), 0);
if (errno != 0) {
sprintf(buf,"reading register %s (#%d)",reg_names[regno],regno);
perror_with_name (buf);
} else {
supply_register (regno, &val);
}
}
}
/*
* Read AMD's Binary Compatibilty Standard conforming core file.
* struct ptrace_user is the first thing in the core file
*/
void
fetch_core_registers ()
{
register int regno;
int val;
char buf[4];
for (regno = 0 ; regno < NUM_REGS; regno++) {
if (!CANNOT_FETCH_REGISTER(regno)) {
val = bfd_seek (core_bfd, register_addr (regno, 0), 0);
if (val < 0 || (val = bfd_read (buf, sizeof buf, 1, core_bfd)) < 0) {
char * buffer = (char *) alloca (strlen (reg_names[regno]) + 35);
strcpy (buffer, "Reading core register ");
strcat (buffer, reg_names[regno]);
perror_with_name (buffer);
}
supply_register (regno, buf);
}
}
/* Fake any registers that are in REGISTER_NAMES, but not available to gdb */
registers_fetched();
}

214
gdb/ultra3-xdep.c
View file

@ -1,5 +1,5 @@
/* Host-dependent code for GDB, for NYU Ultra3 running Sym1 OS.
Copyright (C) 1988, 1989, 1991 Free Software Foundation, Inc.
Copyright (C) 1988, 1989, 1991, 1992 Free Software Foundation, Inc.
Contributed by David Wood (wood@nyu.edu) at New York University.
This file is part of GDB.
@ -35,7 +35,6 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
#include <sys/file.h>
#include <sys/stat.h>
#include <sys/ptrace.h>
/* Assumes support for AMD's Binary Compatibility Standard
for ptrace(). If you define ULTRA3, the ultra3 extensions to
@ -55,217 +54,6 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
extern int errno;
struct ptrace_user pt_struct;
/*
* Fetch an individual register (and supply it).
* return 0 on success, -1 on failure.
* NOTE: Assumes AMD's Binary Compatibility Standard for ptrace().
*/
static void
fetch_register (regno)
int regno;
{
char buf[128];
int val;
if (CANNOT_FETCH_REGISTER(regno)) {
val = -1;
supply_register (regno, &val);
} else {
errno = 0;
val = ptrace (PT_READ_U, inferior_pid,
(PTRACE_ARG3_TYPE) register_addr(regno,0), 0);
if (errno != 0) {
sprintf(buf,"reading register %s (#%d)",reg_names[regno],regno);
perror_with_name (buf);
} else {
supply_register (regno, &val);
}
}
}
/* Get all available registers from the inferior. Registers that are
* defined in REGISTER_NAMES, but not available to the user/gdb are
* supplied as -1. This may include gr64-gr95 and the protected special
* purpose registers.
*/
void
fetch_inferior_registers (regno)
int regno;
{
register int i,j,ret_val=0;
char buf[128];
if (regno != -1) {
fetch_register (regno);
return;
}
/* Global Registers */
#ifdef ULTRA3
errno = 0;
ptrace (PT_READ_STRUCT, inferior_pid,
(PTRACE_ARG3_TYPE) register_addr(GR96_REGNUM,0),
(int)&pt_struct.pt_gr[0], 32*4);
if (errno != 0) {
perror_with_name ("reading global registers");
ret_val = -1;
} else for (regno=GR96_REGNUM, j=0 ; j<32 ; regno++, j++) {
supply_register (regno, &pt_struct.pt_gr[j]);
}
#else
for (regno=GR96_REGNUM ; !ret_val && regno < GR96_REGNUM+32 ; regno++)
fetch_register(regno);
#endif
/* Local Registers */
#ifdef ULTRA3
errno = 0;
ptrace (PT_READ_STRUCT, inferior_pid,
(PTRACE_ARG3_TYPE) register_addr(LR0_REGNUM,0),
(int)&pt_struct.pt_lr[0], 128*4);
if (errno != 0) {
perror_with_name ("reading local registers");
ret_val = -1;
} else for (regno=LR0_REGNUM, j=0 ; j<128 ; regno++, j++) {
supply_register (regno, &pt_struct.pt_lr[j]);
}
#else
for (regno=LR0_REGNUM ; !ret_val && regno < LR0_REGNUM+128 ; regno++)
fetch_register(regno);
#endif
/* Special Registers */
fetch_register(GR1_REGNUM);
fetch_register(CPS_REGNUM);
fetch_register(PC_REGNUM);
fetch_register(NPC_REGNUM);
fetch_register(PC2_REGNUM);
fetch_register(IPC_REGNUM);
fetch_register(IPA_REGNUM);
fetch_register(IPB_REGNUM);
fetch_register(Q_REGNUM);
fetch_register(BP_REGNUM);
fetch_register(FC_REGNUM);
/* Fake any registers that are in REGISTER_NAMES, but not available to gdb */
registers_fetched();
}
/* Store our register values back into the inferior.
* If REGNO is -1, do this for all registers.
* Otherwise, REGNO specifies which register (so we can save time).
* NOTE: Assumes AMD's binary compatibility standard.
*/
void
store_inferior_registers (regno)
int regno;
{
register unsigned int regaddr;
char buf[80];
if (regno >= 0)
{
if (CANNOT_STORE_REGISTER(regno))
return;
regaddr = register_addr (regno, 0);
errno = 0;
ptrace (PT_WRITE_U, inferior_pid,
(PTRACE_ARG3_TYPE) regaddr, read_register(regno));
if (errno != 0)
{
sprintf (buf, "writing register %s (#%d)", reg_names[regno],regno);
perror_with_name (buf);
}
}
else
{
#ifdef ULTRA3
pt_struct.pt_gr1 = read_register(GR1_REGNUM);
for (regno = GR96_REGNUM; regno < GR96_REGNUM+32; regno++)
pt_struct.pt_gr[regno] = read_register(regno);
for (regno = LR0_REGNUM; regno < LR0_REGNUM+128; regno++)
pt_struct.pt_gr[regno] = read_register(regno);
errno = 0;
ptrace (PT_WRITE_STRUCT, inferior_pid,
(PTRACE_ARG3_TYPE) register_addr(GR1_REGNUM,0),
(int)&pt_struct.pt_gr1,(1*32*128)*4);
if (errno != 0)
{
sprintf (buf, "writing all local/global registers");
perror_with_name (buf);
}
pt_struct.pt_psr = read_register(CPS_REGNUM);
pt_struct.pt_pc0 = read_register(NPC_REGNUM);
pt_struct.pt_pc1 = read_register(PC_REGNUM);
pt_struct.pt_pc2 = read_register(PC2_REGNUM);
pt_struct.pt_ipc = read_register(IPC_REGNUM);
pt_struct.pt_ipa = read_register(IPA_REGNUM);
pt_struct.pt_ipb = read_register(IPB_REGNUM);
pt_struct.pt_q = read_register(Q_REGNUM);
pt_struct.pt_bp = read_register(BP_REGNUM);
pt_struct.pt_fc = read_register(FC_REGNUM);
errno = 0;
ptrace (PT_WRITE_STRUCT, inferior_pid,
(PTRACE_ARG3_TYPE) register_addr(CPS_REGNUM,0),
(int)&pt_struct.pt_psr,(10)*4);
if (errno != 0)
{
sprintf (buf, "writing all special registers");
perror_with_name (buf);
return;
}
#else
store_inferior_registers(GR1_REGNUM);
for (regno=GR96_REGNUM ; regno<GR96_REGNUM+32 ; regno++)
store_inferior_registers(regno);
for (regno=LR0_REGNUM ; regno<LR0_REGNUM+128 ; regno++)
store_inferior_registers(regno);
store_inferior_registers(CPS_REGNUM);
store_inferior_registers(PC_REGNUM);
store_inferior_registers(NPC_REGNUM);
store_inferior_registers(PC2_REGNUM);
store_inferior_registers(IPC_REGNUM);
store_inferior_registers(IPA_REGNUM);
store_inferior_registers(IPB_REGNUM);
store_inferior_registers(Q_REGNUM);
store_inferior_registers(BP_REGNUM);
store_inferior_registers(FC_REGNUM);
#endif /* ULTRA3 */
}
}
/*
* Read AMD's Binary Compatibilty Standard conforming core file.
* struct ptrace_user is the first thing in the core file
*/
void
fetch_core_registers ()
{
register int regno;
int val;
char buf[4];
for (regno = 0 ; regno < NUM_REGS; regno++) {
if (!CANNOT_FETCH_REGISTER(regno)) {
val = bfd_seek (core_bfd, register_addr (regno, 0), 0);
if (val < 0 || (val = bfd_read (buf, sizeof buf, 1, core_bfd)) < 0) {
char * buffer = (char *) alloca (strlen (reg_names[regno]) + 35);
strcpy (buffer, "Reading core register ");
strcat (buffer, reg_names[regno]);
perror_with_name (buffer);
}
supply_register (regno, buf);
}
}
/* Fake any registers that are in REGISTER_NAMES, but not available to gdb */
registers_fetched();
}
/*
* Takes a register number as defined in tm.h via REGISTER_NAMES, and maps
* it to an offset in a struct ptrace_user defined by AMD's BCS.

7
gdb/xm-ultra3.h
View file

@ -49,13 +49,6 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
#define SET_STACK_LIMIT_HUGE
/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
#define FETCH_INFERIOR_REGISTERS
/* If we ever *do* end up using the standard fetch_inferior_registers,
this is the right value for U_REGS_OFFSET. */
#define U_REGS_OFFSET 0
/* System doesn't provide siginterrupt(). */
#define NO_SIGINTERRUPT