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* config/tc-m32c.c (md_assemble): Don't use errmsg as the format

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itself.
(md_cgen_lookup_reloc): Add m32c bitbase operands.  Add 8-s24
and imm-8-HI operands.
This commit is contained in:
DJ Delorie 2005-10-26 19:24:20 +00:00
parent f75eb1c004
commit 6b73c529e0
2 changed files with 20 additions and 1 deletions
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7
gas/ChangeLog
View file

@ -1,3 +1,10 @@
2005-10-26 DJ Delorie <dj@redhat.com>
* config/tc-m32c.c (md_assemble): Don't use errmsg as the format
itself.
(md_cgen_lookup_reloc): Add m32c bitbase operands. Add 8-s24
and imm-8-HI operands.
2005-10-26 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (insns): Correct "sel" entry.

14
gas/config/tc-m32c.c
View file

@ -327,7 +327,7 @@ md_assemble (char * str)
if (!insn.insn)
{
as_bad (errmsg);
as_bad ("%s", errmsg);
return;
}
@ -764,8 +764,13 @@ md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED,
{ M32C_OPERAND_DSP_32_U8, BFD_RELOC_8, 4 },
{ M32C_OPERAND_DSP_40_U8, BFD_RELOC_8, 5 },
{ M32C_OPERAND_DSP_48_U8, BFD_RELOC_8, 6 },
{ M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, BFD_RELOC_8, 2 },
{ M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, BFD_RELOC_8, 2 },
{ M32C_OPERAND_BITBASE32_24_S11_PREFIXED, BFD_RELOC_8, 3 },
{ M32C_OPERAND_BITBASE32_24_U11_PREFIXED, BFD_RELOC_8, 3 },
/* Absolute relocs for 16-bit fields. */
{ M32C_OPERAND_IMM_8_HI, BFD_RELOC_16, 1 },
{ M32C_OPERAND_IMM_16_HI, BFD_RELOC_16, 2 },
{ M32C_OPERAND_IMM_24_HI, BFD_RELOC_16, 3 },
{ M32C_OPERAND_IMM_32_HI, BFD_RELOC_16, 4 },
@ -783,9 +788,14 @@ md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED,
{ M32C_OPERAND_DSP_32_U16, BFD_RELOC_16, 4 },
{ M32C_OPERAND_DSP_40_U16, BFD_RELOC_16, 5 },
{ M32C_OPERAND_DSP_48_U16, BFD_RELOC_16, 6 },
{ M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, BFD_RELOC_16, 2 },
{ M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, BFD_RELOC_16, 2 },
{ M32C_OPERAND_BITBASE32_24_S19_PREFIXED, BFD_RELOC_16, 3 },
{ M32C_OPERAND_BITBASE32_24_U19_PREFIXED, BFD_RELOC_16, 3 },
/* Absolute relocs for 24-bit fields. */
{ M32C_OPERAND_LAB_8_24, BFD_RELOC_24, 1 },
{ M32C_OPERAND_DSP_8_S24, BFD_RELOC_24, 1 },
{ M32C_OPERAND_DSP_8_U24, BFD_RELOC_24, 1 },
{ M32C_OPERAND_DSP_16_U24, BFD_RELOC_24, 2 },
{ M32C_OPERAND_DSP_24_U24, BFD_RELOC_24, 3 },
@ -795,6 +805,8 @@ md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED,
{ M32C_OPERAND_DSP_16_U20, BFD_RELOC_24, 2 },
{ M32C_OPERAND_DSP_24_U20, BFD_RELOC_24, 3 },
{ M32C_OPERAND_DSP_32_U20, BFD_RELOC_24, 4 },
{ M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, BFD_RELOC_24, 2 },
{ M32C_OPERAND_BITBASE32_24_U27_PREFIXED, BFD_RELOC_24, 3 },
/* Absolute relocs for 32-bit fields. */
{ M32C_OPERAND_IMM_16_SI, BFD_RELOC_32, 2 },