2002-08-19 Elena Zannoni <ezannoni@redhat.com>
From matthew green <mrg@redhat.com>
* config/tc-ppc.c (PPC_OPCODE_CLASSIC): Enable this everywhere
PPC_OPCODE_PPC is, except for BookE architectures.
(md_parse_option): Add support for -mspe.
(md_show_usage): Add -mspe.
(md_parse_option): Add support for -me500 and
-me500x2 to generate code for Motorola e500 core complex.
(md_show_usage): Add -me500 and -me500x2.
(PPC_APUINFO_ISEL, PPC_APUINFO_PMR, PPC_APUINFO_RFMCI,
PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE, PPC_APUINFO_EFS,
PPC_APUINFO_BRLOCK): New macros.
(ppc_cleanup): New function.
(ppc_apuinfo_section_add): New function.
(APUID): New macro.
(md_assemble): Collect info and write the APUinfo section.
* config/tc-ppc.h (md_cleanup): Define.
(ppc_cleanup): Export.
(ELF_TC_SPECIAL_SECTIONS): Add .PPC.EMB.apuinfo section.
This commit is contained in:
Elena Zannoni
parent
5578ad9c7c
commit
6a0c61b777
3 changed files with 195 additions and 16 deletions
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@ -1,3 +1,28 @@
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2002-08-19 Elena Zannoni <ezannoni@redhat.com>
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From matthew green <mrg@redhat.com>
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* config/tc-ppc.c (PPC_OPCODE_CLASSIC): Enable this everywhere
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PPC_OPCODE_PPC is, except for BookE architectures.
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(md_parse_option): Add support for -mspe.
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(md_show_usage): Add -mspe.
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(md_parse_option): Add support for -me500 and
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-me500x2 to generate code for Motorola e500 core complex.
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(md_show_usage): Add -me500 and -me500x2.
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(PPC_APUINFO_ISEL, PPC_APUINFO_PMR, PPC_APUINFO_RFMCI,
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PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE, PPC_APUINFO_EFS,
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PPC_APUINFO_BRLOCK): New macros.
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(ppc_cleanup): New function.
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(ppc_apuinfo_section_add): New function.
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(APUID): New macro.
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(md_assemble): Collect info and write the APUinfo section.
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* config/tc-ppc.h (md_cleanup): Define.
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(ppc_cleanup): Export.
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(ELF_TC_SPECIAL_SECTIONS): Add .PPC.EMB.apuinfo section.
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2002-08-17 Stan Cox <scox@redhat.com>
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* config/obj-elf.c (obj_elf_change_section): Make non-static.
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@ -130,6 +130,7 @@ static void ppc_elf_cons PARAMS ((int));
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static void ppc_elf_rdata PARAMS ((int));
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static void ppc_elf_lcomm PARAMS ((int));
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static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
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static void ppc_apuinfo_section_add PARAMS((unsigned int apu, unsigned int version));
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#endif
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#ifdef TE_PE
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@ -787,6 +788,20 @@ static segT ppc_current_section;
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#ifdef OBJ_ELF
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symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
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#define PPC_APUINFO_ISEL 0x40
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#define PPC_APUINFO_PMR 0x41
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#define PPC_APUINFO_RFMCI 0x42
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#define PPC_APUINFO_CACHELCK 0x43
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#define PPC_APUINFO_SPE 0x100
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#define PPC_APUINFO_EFS 0x101
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#define PPC_APUINFO_BRLOCK 0x102
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/*
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* We keep a list of APUinfo
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*/
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unsigned long *ppc_apuinfo_list;
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unsigned int ppc_apuinfo_num;
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unsigned int ppc_apuinfo_num_alloc;
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#endif /* OBJ_ELF */
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#ifdef OBJ_ELF
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@ -870,43 +885,62 @@ md_parse_option (c, arg)
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/* -m601 means to assemble for the PowerPC 601, which includes
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instructions that are holdovers from the Power. */
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else if (strcmp (arg, "601") == 0)
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_601 | PPC_OPCODE_32;
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
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| PPC_OPCODE_601 | PPC_OPCODE_32;
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/* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
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PowerPC 603/604. */
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else if (strcmp (arg, "ppc") == 0
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|| strcmp (arg, "ppc32") == 0
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|| strcmp (arg, "603") == 0
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|| strcmp (arg, "604") == 0)
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_32;
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
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/* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
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else if (strcmp (arg, "403") == 0
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|| strcmp (arg, "405") == 0)
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_403 | PPC_OPCODE_32;
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
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| PPC_OPCODE_403 | PPC_OPCODE_32;
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else if (strcmp (arg, "7400") == 0
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|| strcmp (arg, "7410") == 0
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|| strcmp (arg, "7450") == 0
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|| strcmp (arg, "7455") == 0)
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32;
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
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| PPC_OPCODE_ALTIVEC | PPC_OPCODE_32;
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else if (strcmp (arg, "altivec") == 0)
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{
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if (ppc_cpu == 0)
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC;
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
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else
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ppc_cpu |= PPC_OPCODE_ALTIVEC;
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}
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else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
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{
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
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| PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
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| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI;
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}
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else if (strcmp (arg, "spe") == 0)
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{
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if (ppc_cpu == 0)
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
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else
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ppc_cpu |= PPC_OPCODE_SPE;
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}
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/* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
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620. */
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else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
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{
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_64;
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
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}
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else if (strcmp (arg, "ppc64bridge") == 0)
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{
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64;
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
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| PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64;
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}
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/* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
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else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
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{
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
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}
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/* -mbooke64 means enable 64-bit BookE support. */
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else if (strcmp (arg, "booke64") == 0)
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{
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@ -915,7 +949,8 @@ md_parse_option (c, arg)
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}
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else if (strcmp (arg, "power4") == 0)
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{
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4;
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ppc_cpu = PPC_OPCODE_PPC| PPC_OPCODE_CLASSIC
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| PPC_OPCODE_64 | PPC_OPCODE_POWER4;
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}
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/* -mcom means assemble for the common intersection between Power
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and PowerPC. At present, we just allow the union, rather
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@ -1037,6 +1072,9 @@ PowerPC options:\n\
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-many generate code for any architecture (PWR/PWRX/PPC)\n\
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-mregnames Allow symbolic names for registers\n\
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-mno-regnames Do not allow symbolic names for registers\n"));
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fprintf (stream, _("\
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-me500, -me500x2 generate code for Motorola e500 core complex\n\
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-mspe generate code for Motorola SPE instructions\n"));
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#ifdef OBJ_ELF
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fprintf (stream, _("\
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-mrelocatable support for GCC's -mrelocatble option\n\
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@ -1070,12 +1108,12 @@ ppc_set_cpu ()
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else if (strcmp (default_cpu, "rs6000") == 0)
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ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
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else if (strncmp (default_cpu, "powerpc", 7) == 0)
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{
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if (default_cpu[7] == '6' && default_cpu[8] == '4')
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_64;
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else
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_32;
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}
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{
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if (default_cpu[7] == '6' && default_cpu[8] == '4')
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
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else
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ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
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}
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else
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as_fatal (_("Unknown default cpu = %s, os = %s"),
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default_cpu, default_os);
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@ -1240,6 +1278,64 @@ md_begin ()
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#endif
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}
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void
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ppc_cleanup ()
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{
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if (ppc_apuinfo_list == NULL)
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return;
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/* Ok, so write the section info out. We have this layout:
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byte data what
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---- ---- ----
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0 8 length of "APUinfo\0"
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4 (n*4) number of APU's (4 bytes each)
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8 2 note type 2
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12 "APUinfo\0" name
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20 APU#1 first APU's info
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24 APU#2 second APU's info
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... ...
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*/
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{
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char *p;
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asection *seg = now_seg;
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subsegT subseg = now_subseg;
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asection *apuinfo_secp = (asection *) NULL;
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int i;
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/* Create the .PPC.EMB.apuinfo section. */
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apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
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bfd_set_section_flags (stdoutput,
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apuinfo_secp,
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SEC_HAS_CONTENTS | SEC_READONLY | SEC_MERGE);
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p = frag_more (4);
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md_number_to_chars (p, (valueT) 8, 4);
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p = frag_more (4);
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md_number_to_chars (p, (valueT) ppc_apuinfo_num, 4);
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p = frag_more (4);
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md_number_to_chars (p, (valueT) 2, 4);
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p = frag_more (8);
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strcpy (p, "APUinfo");
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for (i = 0; i < ppc_apuinfo_num; i++)
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{
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p = frag_more (4);
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md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
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}
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frag_align (2, 0, 0);
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/* We probably can't restore the current segment, for there likely
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isn't one yet... */
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if (seg && subseg)
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subseg_set (seg, subseg);
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}
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}
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/* Insert an operand value into an instruction. */
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static unsigned long
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@ -1837,6 +1933,38 @@ parse_toc_entry (toc_kind)
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#endif
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#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
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static void
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ppc_apuinfo_section_add(apu, version)
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unsigned int apu, version;
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{
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unsigned int i;
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/* Check we don't already exist. */
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for (i = 0; i < ppc_apuinfo_num; i++)
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if (ppc_apuinfo_list[i] == APUID(apu, version))
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return;
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if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
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{
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if (ppc_apuinfo_num_alloc == 0)
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{
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ppc_apuinfo_num_alloc = 4;
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ppc_apuinfo_list = (unsigned long *)
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xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
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}
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else
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{
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ppc_apuinfo_num_alloc += 4;
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ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
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sizeof (unsigned long) * ppc_apuinfo_num_alloc);
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}
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}
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ppc_apuinfo_list[ppc_apuinfo_num++] = APUID(apu, version);
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}
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#undef APUID
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/* We need to keep a list of fixups. We can't simply generate them as
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we go, because that would require us to first create the frag, and
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that would screw up references to ``.''. */
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@ -1961,7 +2089,6 @@ md_assemble (str)
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operand = &powerpc_operands[next_opindex];
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next_opindex = 0;
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}
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errmsg = NULL;
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/* If this is a fake operand, then we do not expect anything
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@ -2322,6 +2449,29 @@ md_assemble (str)
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if (*str != '\0')
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as_bad (_("junk at end of line: `%s'"), str);
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/* Do we need/want a APUinfo section? */
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if (ppc_cpu & (PPC_OPCODE_SPE
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| PPC_OPCODE_ISEL | PPC_OPCODE_EFS
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| PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
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| PPC_OPCODE_RFMCI))
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{
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/* These are all version "1". */
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if (opcode->flags & PPC_OPCODE_SPE)
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ppc_apuinfo_section_add(PPC_APUINFO_SPE, 1);
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if (opcode->flags & PPC_OPCODE_ISEL)
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ppc_apuinfo_section_add(PPC_APUINFO_ISEL, 1);
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if (opcode->flags & PPC_OPCODE_EFS)
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ppc_apuinfo_section_add(PPC_APUINFO_EFS, 1);
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if (opcode->flags & PPC_OPCODE_BRLOCK)
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ppc_apuinfo_section_add(PPC_APUINFO_BRLOCK, 1);
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if (opcode->flags & PPC_OPCODE_PMR)
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ppc_apuinfo_section_add(PPC_APUINFO_PMR, 1);
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if (opcode->flags & PPC_OPCODE_CACHELCK)
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ppc_apuinfo_section_add(PPC_APUINFO_CACHELCK, 1);
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if (opcode->flags & PPC_OPCODE_RFMCI)
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ppc_apuinfo_section_add(PPC_APUINFO_RFMCI, 1);
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}
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/* Write out the instruction. */
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f = frag_more (4);
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md_number_to_chars (f, insn, 4);
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@ -248,6 +248,7 @@ extern int ppc_section_flags PARAMS ((int, int, int));
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{ ".sbss", SHT_NOBITS, SHF_ALLOC + SHF_WRITE }, \
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{ ".sdata2", SHT_PROGBITS, SHF_ALLOC }, \
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{ ".sbss2", SHT_PROGBITS, SHF_ALLOC }, \
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{ ".PPC.EMB.apuinfo", SHT_NOTE, 0 }, \
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{ ".PPC.EMB.sdata0", SHT_PROGBITS, SHF_ALLOC }, \
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{ ".PPC.EMB.sbss0", SHT_PROGBITS, SHF_ALLOC }, \
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/* Extra sections for 64-bit ELF PPC. */ \
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@ -285,3 +286,6 @@ extern long md_pcrel_from_section PARAMS ((struct fix *, segT));
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extern int ppc_parse_name PARAMS ((const char *, struct expressionS *));
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#define md_operand(x)
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#define md_cleanup() ppc_cleanup ()
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extern void ppc_cleanup PARAMS ((void));
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