2001-03-18 H.J. Lu <hjl@gnu.org>
* gas/i386/intel.s: Move PIC code to ... * gas/i386/intelpic.s: New. Here. * gas/i386/intel.d: Updated. * gas/i386/intelpic.d: New. * gas/i386/i386.exp: Check PIC code in Intel syntax for ELF targets only.
This commit is contained in:
H.J. Lu
parent
31abcf7d04
commit
64cbbfaefe
6 changed files with 81 additions and 41 deletions
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@ -1,3 +1,13 @@
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2001-03-18 H.J. Lu <hjl@gnu.org>
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* gas/i386/intel.s: Move PIC code to ...
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* gas/i386/intelpic.s: New. Here.
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* gas/i386/intel.d: Updated.
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* gas/i386/intelpic.d: New.
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* gas/i386/i386.exp: Check PIC code in Intel syntax for ELF
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targets only.
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2001-03-18 Stephane Carrez <Stephane.Carrez@worldnet.fr>
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* gas/mri/mri.exp: Fix test of m6811/m6812 targets.
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@ -53,6 +53,13 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
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run_dump_test "ssemmx2"
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run_dump_test "sse2"
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# PIC is only supported on ELF targets.
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if { ([istarget "*-*-elf*"] || [istarget "*-*-linux*"] )
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&& ![istarget *-*-linux*aout*]
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&& ![istarget *-*-linux*oldld*] } then {
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run_dump_test "intelpic"
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}
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# These tests require support for 8 and 16 bit relocs,
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# so we only run them for ELF and COFF targets.
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if {[istarget "*-*-elf*"] || [istarget "*-*-linux*"] || [istarget "*-*-coff*"]} then {
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@ -582,44 +582,42 @@ Disassembly of section .text:
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0+9d2 <bar>:
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9d2: e8 f9 ff ff ff [ ]*call 9d0 <gs_foo>
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9d7: e8 f5 ff ff ff [ ]*call 9d1 <short_foo>
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9dc: 8d 83 00 00 00 00 [ ]*lea 0x0\(%ebx\),%eax
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9e2: dd 1c d0 [ ]*fstpl \(%eax,%edx,8\)
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9e5: b9 00 00 00 00 [ ]*mov \$0x0,%ecx
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9ea: 88 04 16 [ ]*mov %al,\(%esi,%edx,1\)
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9ed: 88 04 32 [ ]*mov %al,\(%edx,%esi,1\)
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9f0: 88 04 56 [ ]*mov %al,\(%esi,%edx,2\)
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9f3: 88 04 56 [ ]*mov %al,\(%esi,%edx,2\)
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9f6: eb 0c [ ]*jmp a04 <rot5>
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9f8: 6c [ ]*insb \(%dx\),%es:\(%edi\)
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9f9: 66 0f c1 90 90 90 90 90 [ ]*xadd %dx,0x90909090\(%eax\)
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a01: 83 e0 f8 [ ]*and \$0xfffffff8,%eax
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9dc: dd 1c d0 [ ]*fstpl \(%eax,%edx,8\)
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9df: b9 00 00 00 00 [ ]*mov \$0x0,%ecx
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9e4: 88 04 16 [ ]*mov %al,\(%esi,%edx,1\)
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9e7: 88 04 32 [ ]*mov %al,\(%edx,%esi,1\)
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9ea: 88 04 56 [ ]*mov %al,\(%esi,%edx,2\)
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9ed: 88 04 56 [ ]*mov %al,\(%esi,%edx,2\)
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9f0: eb 0c [ ]*jmp 9fe <rot5>
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9f2: 6c [ ]*insb \(%dx\),%es:\(%edi\)
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9f3: 66 0f c1 90 90 90 90 90 [ ]*xadd %dx,0x90909090\(%eax\)
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9fb: 83 e0 f8 [ ]*and \$0xfffffff8,%eax
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0+a04 <rot5>:
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a04: 8b 44 ce 04 [ ]*mov 0x4\(%esi,%ecx,8\),%eax
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a08: 6c [ ]*insb \(%dx\),%es:\(%edi\)
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a09: 0c 90 [ ]*or \$0x90,%al
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a0b: 0d 90 90 90 90 [ ]*or \$0x90909090,%eax
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a10: 0e [ ]*push %cs
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a11: 8b 04 5d 00 00 00 00 [ ]*mov 0x0\(,%ebx,2\),%eax
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a18: 10 14 85 90 90 90 90 [ ]*adc %dl,0x90909090\(,%eax,4\)
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a1f: 2f [ ]*das
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a20: ea 90 90 90 90 90 90 [ ]*ljmp \$0x9090,\$0x90909090
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a27: 66 a5 [ ]*movsw %ds:\(%esi\),%es:\(%edi\)
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a29: 70 90 [ ]*jo 9bb <foo\+0x9bb>
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a2b: 75 fe [ ]*jne a2b <rot5\+0x27>
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a2d: 0f 6f 35 28 00 00 00 [ ]*movq 0x28,%mm6
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a34: 03 3c c3 [ ]*add \(%ebx,%eax,8\),%edi
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a37: 0f 6e 44 c3 04 [ ]*movd 0x4\(%ebx,%eax,8\),%mm0
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a3c: 03 bc cb 00 80 00 00 [ ]*add 0x8000\(%ebx,%ecx,8\),%edi
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a43: 0f 6e 8c cb 04 80 00 00 [ ]*movd 0x8004\(%ebx,%ecx,8\),%mm1
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a4b: 0f 6e 94 c3 04 00 01 00 [ ]*movd 0x10004\(%ebx,%eax,8\),%mm2
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a53: 03 bc c3 00 00 01 00 [ ]*add 0x10000\(%ebx,%eax,8\),%edi
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a5a: 66 8b 04 43 [ ]*mov \(%ebx,%eax,2\),%ax
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a5e: 66 8b 8c 4b 00 20 00 00 [ ]*mov 0x2000\(%ebx,%ecx,2\),%cx
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a66: 66 8b 84 43 00 40 00 00 [ ]*mov 0x4000\(%ebx,%eax,2\),%ax
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a6e: ff e0 [ ]*jmp \*%eax
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a70: ff 20 [ ]*jmp \*\(%eax\)
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a72: ff 25 d2 09 00 00 [ ]*jmp \*0x9d2
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a78: e9 55 ff ff ff [ ]*jmp 9d2 <bar>
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a7d: 8b 83 (00 00|d0 09) 00 00 [ ]*mov (0x0|0x9d0)\(%ebx\),%eax
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0+9fe <rot5>:
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9fe: 8b 44 ce 04 [ ]*mov 0x4\(%esi,%ecx,8\),%eax
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a02: 6c [ ]*insb \(%dx\),%es:\(%edi\)
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a03: 0c 90 [ ]*or \$0x90,%al
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a05: 0d 90 90 90 90 [ ]*or \$0x90909090,%eax
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a0a: 0e [ ]*push %cs
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a0b: 8b 04 5d 00 00 00 00 [ ]*mov 0x0\(,%ebx,2\),%eax
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a12: 10 14 85 90 90 90 90 [ ]*adc %dl,0x90909090\(,%eax,4\)
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a19: 2f [ ]*das
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a1a: ea 90 90 90 90 90 90 [ ]*ljmp \$0x9090,\$0x90909090
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a21: 66 a5 [ ]*movsw %ds:\(%esi\),%es:\(%edi\)
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a23: 70 90 [ ]*jo 9b5 <foo\+0x9b5>
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a25: 75 fe [ ]*jne a25 <rot5\+0x27>
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a27: 0f 6f 35 28 00 00 00 [ ]*movq 0x28,%mm6
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a2e: 03 3c c3 [ ]*add \(%ebx,%eax,8\),%edi
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a31: 0f 6e 44 c3 04 [ ]*movd 0x4\(%ebx,%eax,8\),%mm0
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a36: 03 bc cb 00 80 00 00 [ ]*add 0x8000\(%ebx,%ecx,8\),%edi
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a3d: 0f 6e 8c cb 04 80 00 00 [ ]*movd 0x8004\(%ebx,%ecx,8\),%mm1
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a45: 0f 6e 94 c3 04 00 01 00 [ ]*movd 0x10004\(%ebx,%eax,8\),%mm2
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a4d: 03 bc c3 00 00 01 00 [ ]*add 0x10000\(%ebx,%eax,8\),%edi
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a54: 66 8b 04 43 [ ]*mov \(%ebx,%eax,2\),%ax
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a58: 66 8b 8c 4b 00 20 00 00 [ ]*mov 0x2000\(%ebx,%ecx,2\),%cx
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a60: 66 8b 84 43 00 40 00 00 [ ]*mov 0x4000\(%ebx,%eax,2\),%ax
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a68: ff e0 [ ]*jmp \*%eax
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a6a: ff 20 [ ]*jmp \*\(%eax\)
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a6c: ff 25 d2 09 00 00 [ ]*jmp \*0x9d2
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a72: e9 5b ff ff ff [ ]*jmp 9d2 <bar>
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[ ]*...
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@ -576,7 +576,6 @@ short_foo:
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bar:
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call gs_foo
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call short_foo
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lea eax, .LC0@GOTOFF[ebx]
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fstp QWORD PTR [eax+edx*8]
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mov ecx, OFFSET FLAT:ss
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mov BYTE PTR [esi+edx], al
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@ -616,5 +615,4 @@ rot5:
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jmp [eax]
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jmp [bar]
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jmp bar
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mov eax, DWORD PTR gs_foo@GOT[ebx]
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.p2align 4,0
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16
gas/testsuite/gas/i386/intelpic.d
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16
gas/testsuite/gas/i386/intelpic.d
Normal file
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@ -0,0 +1,16 @@
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#as: -J
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#objdump: -dw
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#name: i386 intelpic
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.*: +file format .*
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Disassembly of section .text:
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0+000 <gs_foo>:
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0: c3 [ ]*ret
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0+001 <bar>:
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1: 8d 83 00 00 00 00 [ ]*lea 0x0\(%ebx\),%eax
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7: 8b 83 00 00 00 00 [ ]*mov 0x0\(%ebx\),%eax
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d: 90 [ ]*nop
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[ ]*...
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11
gas/testsuite/gas/i386/intelpic.s
Normal file
11
gas/testsuite/gas/i386/intelpic.s
Normal file
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@ -0,0 +1,11 @@
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.text
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.intel_syntax noprefix
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gs_foo:
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ret
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bar:
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lea eax, .LC0@GOTOFF[ebx]
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mov eax, DWORD PTR gs_foo@GOT[ebx]
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nop
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.p2align 4,0
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