diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog index 3266d3a46a..35921dcf16 100644 --- a/sim/common/ChangeLog +++ b/sim/common/ChangeLog @@ -1,3 +1,7 @@ +2000-08-21 Frank Ch. Eigler + + * Make-common.in, cgen.sh: Contribute CGEN-related build targets/rules. + 2000-08-09 Andrew Cagney * dv-sockser.c (dv_sockser_init): Eliminate MIN macro. diff --git a/sim/common/Make-common.in b/sim/common/Make-common.in index 7c25d6c125..4ee4acb73f 100644 --- a/sim/common/Make-common.in +++ b/sim/common/Make-common.in @@ -654,4 +654,56 @@ stamp-h: config.in config.status CONFIG_FILES=$@:../common/gdbinit.in CONFIG_HEADERS= $(SHELL) ./config.status +# CGEN support + +CGENDIR = @cgendir@ +CGEN = `if [ -f ../../guile/libguile/guile ]; then echo ../../guile/libguile/guile; else echo guile ; fi` +CGENFLAGS = -v +srccgen = $(CGENDIR) + +CGEN_READ_SCM = ../../cgen/stamp-cgen $(srccgen)/sim.scm +CGEN_ARCH_SCM = $(srccgen)/sim-arch.scm +CGEN_CPU_SCM = $(srccgen)/sim-cpu.scm $(srccgen)/sim-model.scm +CGEN_DECODE_SCM = $(srccgen)/sim-decode.scm +CGEN_DESC_SCM = $(srccgen)/desc.scm $(srccgen)/desc-cpu.scm + +# Various choices for which cpu specific files to generate. +CGEN_CPU_EXTR = -E tmp-ext.c1 +CGEN_CPU_READ = -R tmp-read.c1 +CGEN_CPU_WRITE = -W tmp-write.c1 +CGEN_CPU_SEM = -S tmp-sem.c1 +CGEN_CPU_SEMSW = -X tmp-semsw.c1 + +CGEN_FLAGS_TO_PASS = \ + CGEN=$(CGEN) \ + CGENFLAGS="$(CGENFLAGS)" + +# We store the generated files in the source directory until we decide to +# ship a Scheme interpreter with gdb/binutils. Maybe we never will. + +cgen-arch: force + $(SHELL) $(srccom)/cgen.sh arch $(srcdir) \ + $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \ + $(arch) "$(FLAGS)" ignored $(mach) ignored ignored + +cgen-cpu: force + $(SHELL) $(srccom)/cgen.sh cpu $(srcdir) \ + $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \ + $(arch) "$(FLAGS)" $(cpu) $(mach) "$(SUFFIX)" "$(EXTRAFILES)" + +cgen-decode: force + $(SHELL) $(srccom)/cgen.sh decode $(srcdir) \ + $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \ + $(arch) "$(FLAGS)" $(cpu) $(mach) "$(SUFFIX)" ignored + +cgen-cpu-decode: force + $(SHELL) $(srccom)/cgen.sh cpu-decode $(srcdir) \ + $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \ + $(arch) "$(FLAGS)" $(cpu) $(mach) "$(SUFFIX)" "$(EXTRAFILES)" + +cgen-desc: force + $(SHELL) $(srccom)/cgen.sh desc $(srcdir) \ + $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \ + $(arch) "$(FLAGS)" $(cpu) $(mach) "$(SUFFIX)" ignored + ## End COMMON_POST_CONFIG_FRAG diff --git a/sim/common/cgen.sh b/sim/common/cgen.sh new file mode 100644 index 0000000000..5ee7db83f6 --- /dev/null +++ b/sim/common/cgen.sh @@ -0,0 +1,176 @@ +#! /bin/sh +# Generate CGEN simulator files. +# +# Usage: /bin/sh cgen.sh {"arch"|"cpu"|"decode"|"cpu-decode"} srcdir \ +# cgen cgendir cgenflags \ +# arch archflags cpu mach suffix extrafiles +# +# We store the generated files in the source directory until we decide to +# ship a Scheme interpreter (or other implementation) with gdb/binutils. +# Maybe we never will. + +# We want to behave like make, any error forces us to stop. +set -e + +action=$1 +srcdir=$2 +cgen=$3 +cgendir=$4 +cgenflags=$5 +arch=$6 +archflags=$7 +cpu=$8 +mach=$9 +# bring parms past 9 portably into view +shift ; suffix=$9 +shift ; extrafiles=$9 + +rootdir=${srcdir}/../.. + +lowercase='abcdefghijklmnopqrstuvwxyz' +uppercase='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +ARCH=`echo ${arch} | tr "${lowercase}" "${uppercase}"` +CPU=`echo ${cpu} | tr "${lowercase}" "${uppercase}"` + +case $action in +arch) + rm -f tmp-arch.h1 tmp-arch.h + rm -f tmp-arch.c1 tmp-arch.c + rm -f tmp-all.h1 tmp-all.h + + ${cgen} -s ${cgendir}/cgen-sim.scm \ + -s ${cgendir} \ + ${cgenflags} \ + -f "${archflags}" \ + -m ${mach} \ + -a ${arch} \ + -A tmp-arch.h1 \ + -B tmp-arch.c1 \ + -N tmp-all.h1 + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" < tmp-arch.h1 > tmp-arch.h + ${rootdir}/move-if-change tmp-arch.h ${srcdir}/arch.h + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" < tmp-arch.c1 > tmp-arch.c + ${rootdir}/move-if-change tmp-arch.c ${srcdir}/arch.c + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" < tmp-all.h1 > tmp-all.h + ${rootdir}/move-if-change tmp-all.h ${srcdir}/cpuall.h + + rm -f tmp-arch.h1 tmp-arch.c1 tmp-all.h1 + ;; + +cpu | decode | cpu-decode) + + fileopts="" + case $action in + *cpu*) + rm -f tmp-cpu.h1 tmp-cpu.c1 + rm -f tmp-ext.c1 tmp-read.c1 tmp-write.c1 + rm -f tmp-sem.c1 tmp-semsw.c1 + rm -f tmp-mod.c1 + rm -f tmp-cpu.h tmp-cpu.c + rm -f tmp-ext.c tmp-read.c tmp-write.c + rm -f tmp-sem.c tmp-semsw.c tmp-mod.c + fileopts="$fileopts \ + -C tmp-cpu.h1 \ + -U tmp-cpu.c1 \ + -M tmp-mod.c1 \ + ${extrafiles}" + ;; + esac + case $action in + *decode*) + rm -f tmp-dec.h1 tmp-dec.h tmp-dec.c1 tmp-dec.c + fileopts="$fileopts \ + -T tmp-dec.h1 \ + -D tmp-dec.c1" + ;; + esac + + ${cgen} -s ${cgendir}/cgen-sim.scm \ + -s ${cgendir} \ + ${cgenflags} \ + -f "${archflags}" \ + -m ${mach} \ + -a ${arch} \ + ${fileopts} + + case $action in + *cpu*) + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" -e "s/@CPU@/${CPU}/g" -e "s/@cpu@/${cpu}/g" < tmp-cpu.h1 > tmp-cpu.h + ${rootdir}/move-if-change tmp-cpu.h ${srcdir}/cpu${suffix}.h + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" -e "s/@CPU@/${CPU}/g" -e "s/@cpu@/${cpu}/g" < tmp-cpu.c1 > tmp-cpu.c + ${rootdir}/move-if-change tmp-cpu.c ${srcdir}/cpu${suffix}.c + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" -e "s/@CPU@/${CPU}/g" -e "s/@cpu@/${cpu}/g" < tmp-mod.c1 > tmp-mod.c + ${rootdir}/move-if-change tmp-mod.c ${srcdir}/model${suffix}.c + if test -f tmp-ext.c1 ; then \ + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" -e "s/@CPU@/${CPU}/g" -e "s/@cpu@/${cpu}/g" < tmp-ext.c1 > tmp-ext.c ; \ + ${rootdir}/move-if-change tmp-ext.c ${srcdir}/extract${suffix}.c ; \ + fi + if test -f tmp-read.c1 ; then \ + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" -e "s/@CPU@/${CPU}/g" -e "s/@cpu@/${cpu}/g" < tmp-read.c1 > tmp-read.c ; \ + ${rootdir}/move-if-change tmp-read.c ${srcdir}/read${suffix}.c ; \ + fi + if test -f tmp-write.c1 ; then \ + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" -e "s/@CPU@/${CPU}/g" -e "s/@cpu@/${cpu}/g" < tmp-write.c1 > tmp-write.c ; \ + ${rootdir}/move-if-change tmp-write.c ${srcdir}/write${suffix}.c ; \ + fi + if test -f tmp-sem.c1 ; then \ + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" -e "s/@CPU@/${CPU}/g" -e "s/@cpu@/${cpu}/g" < tmp-sem.c1 > tmp-sem.c ; \ + ${rootdir}/move-if-change tmp-sem.c ${srcdir}/sem${suffix}.c ; \ + fi + if test -f tmp-semsw.c1 ; then \ + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" -e "s/@CPU@/${CPU}/g" -e "s/@cpu@/${cpu}/g" < tmp-semsw.c1 > tmp-semsw.c ; \ + ${rootdir}/move-if-change tmp-semsw.c ${srcdir}/sem${suffix}-switch.c ; \ + fi + + rm -f tmp-cpu.h1 tmp-cpu.c1 + rm -f tmp-ext.c1 tmp-read.c1 tmp-write.c1 + rm -f tmp-sem.c1 tmp-semsw.c1 tmp-mod.c1 + ;; + esac + + case $action in + *decode*) + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" -e "s/@CPU@/${CPU}/g" -e "s/@cpu@/${cpu}/g" < tmp-dec.h1 > tmp-dec.h + ${rootdir}/move-if-change tmp-dec.h ${srcdir}/decode${suffix}.h + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" -e "s/@CPU@/${CPU}/g" -e "s/@cpu@/${cpu}/g" < tmp-dec.c1 > tmp-dec.c + ${rootdir}/move-if-change tmp-dec.c ${srcdir}/decode${suffix}.c + + rm -f tmp-dec.h1 tmp-dec.c1 + ;; + esac + + ;; + +desc) + rm -f tmp-desc.h1 tmp-desc.h + rm -f tmp-desc.c1 tmp-desc.c + rm -f tmp-opc.h1 tmp-opc.h + + ${cgen} -s ${cgendir}/cgen-opc.scm \ + -s ${cgendir} \ + ${cgenflags} \ + -f "${archflags}" \ + -m ${mach} \ + -a ${arch} \ + -H tmp-desc.h1 \ + -C tmp-desc.c1 \ + -O tmp-opc.h1 + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" < tmp-desc.h1 > tmp-desc.h + ${rootdir}/move-if-change tmp-desc.h ${srcdir}/${arch}-desc.h + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \ + -e "s/@prefix@/${arch}/" < tmp-desc.c1 > tmp-desc.c + ${rootdir}/move-if-change tmp-desc.c ${srcdir}/${arch}-desc.c + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" < tmp-opc.h1 > tmp-opc.h + ${rootdir}/move-if-change tmp-opc.h ${srcdir}/${arch}-opc.h + + rm -f tmp-desc.h1 tmp-desc.c1 tmp-opc.h1 + ;; + +*) + echo "cgen.sh: bad action: ${action}" >&2 + exit 1 + ;; + +esac + +exit 0 diff --git a/sim/fr30/ChangeLog b/sim/fr30/ChangeLog index 14f255de34..bc797d0daa 100644 --- a/sim/fr30/ChangeLog +++ b/sim/fr30/ChangeLog @@ -1,3 +1,8 @@ +2000-08-21 Frank Ch. Eigler + + * Makefile.in (fr30-clean): Add stamp-arch, stamp-cpu. + (stamp-arch, stamp-cpu): New targets. + Tue May 23 21:39:23 2000 Andrew Cagney * configure: Regenerated to track ../common/aclocal.m4 changes. diff --git a/sim/fr30/Makefile.in b/sim/fr30/Makefile.in index 427312e70b..7c00b58b83 100644 --- a/sim/fr30/Makefile.in +++ b/sim/fr30/Makefile.in @@ -18,7 +18,7 @@ ## COMMON_PRE_CONFIG_FRAG -FR30_OBJS = fr30.o cpu.o decode.o sem.o model.o mloop.o +FR30_OBJS = fr30.o cpu.o decode.o sem.o model.o arch.o mloop.o CONFIG_DEVICES = dv-sockser.o CONFIG_DEVICES = @@ -32,7 +32,7 @@ SIM_OBJS = \ sim-reg.o \ cgen-utils.o cgen-trace.o cgen-scache.o \ cgen-run.o sim-reason.o sim-engine.o sim-stop.o \ - sim-if.o arch.o \ + sim-if.o \ $(FR30_OBJS) \ traps.o devices.o \ $(CONFIG_DEVICES) @@ -87,4 +87,23 @@ model.o: model.c $(FR30BF_INCLUDE_DEPS) fr30-clean: rm -f mloop.c eng.h stamp-mloop rm -f tmp-* + rm -f stamp-arch stamp-cpu +# cgen support, enable with --enable-cgen-maint +CGEN_MAINT = ; @true +# The following line is commented in or out depending upon --enable-cgen-maint. +@CGEN_MAINT@CGEN_MAINT = + +stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srccgen)/fr30.cpu + $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ + FLAGS="with-scache with-profile=fn" + touch stamp-arch +arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch +# @true + +stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/fr30.cpu + $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ + cpu=fr30bf mach=fr30 SUFFIX= FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" + touch stamp-cpu +cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu +# @true diff --git a/sim/i960/ChangeLog b/sim/i960/ChangeLog index bb87c5e4b7..fd85747908 100644 --- a/sim/i960/ChangeLog +++ b/sim/i960/ChangeLog @@ -1,3 +1,8 @@ +2000-08-21 Frank Ch. Eigler + + * Makefile.in (i960-clean): Add stamp-arch, stamp-cpu. + (stamp-arch, stamp-cpu): New targets. + Tue May 23 21:39:23 2000 Andrew Cagney * configure: Regenerated to track ../common/aclocal.m4 changes. diff --git a/sim/i960/Makefile.in b/sim/i960/Makefile.in index deb26727c9..c6c3d76df9 100644 --- a/sim/i960/Makefile.in +++ b/sim/i960/Makefile.in @@ -98,4 +98,31 @@ model.o: model.c $(I960BASE_INCLUDE_DEPS) i960-clean: rm -f mloop.c eng.h stamp-mloop rm -f tmp-* + rm -f stamp-arch stamp-cpu stamp-desc +# cgen support, enable with --enable-cgen-maint +CGEN_MAINT = ; @true +# The following line is commented in or out depending upon --enable-cgen-maint. +@CGEN_MAINT@CGEN_MAINT = + +stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srccgen)/i960.cpu + $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ + FLAGS="with-scache with-profile=fn" + touch stamp-arch +arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch + @true + +stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/i960.cpu + $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ + cpu=i960base mach=i960:ka_sa,i960:ca SUFFIX= FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" + touch stamp-cpu +cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu + @true + +stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) \ + $(srccgen)/sparc.cpu $(srccgen)/sparccom.cpu $(srccgen)/i960.cpu $(srccgen)/i960.cpu + $(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \ + cpu=i960 mach=all + touch stamp-desc +i960-desc.c i960-desc.h i960-opc.h: $(CGEN_MAINT) stamp-desc + @true diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog index 9f11db8dcb..56d56ed648 100644 --- a/sim/m32r/ChangeLog +++ b/sim/m32r/ChangeLog @@ -1,3 +1,8 @@ +2000-08-21 Frank Ch. Eigler + + * Makefile.in (m32r-clean): Add stamp-arch, stamp-cpu. + (stamp-arch, stamp-cpu): New targets. + Tue May 23 21:39:23 2000 Andrew Cagney * configure: Regenerated to track ../common/aclocal.m4 changes. diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in index 71296e52c2..9d74799f28 100644 --- a/sim/m32r/Makefile.in +++ b/sim/m32r/Makefile.in @@ -116,5 +116,33 @@ modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS) m32r-clean: rm -f mloop.c eng.h stamp-mloop rm -f mloopx.c engx.h stamp-xmloop + rm -f stamp-arch stamp-cpu stamp-xcpu rm -f tmp-* +# cgen support, enable with --enable-cgen-maint +CGEN_MAINT = ; @true +# The following line is commented in or out depending upon --enable-cgen-maint. +@CGEN_MAINT@CGEN_MAINT = + +stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srccgen)/m32r.cpu + $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ + FLAGS="with-scache with-profile=fn" + touch stamp-arch +arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch + @true + +stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu + $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ + cpu=m32rbf mach=m32r SUFFIX= \ + FLAGS="with-scache with-profile=fn" \ + EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" + touch stamp-cpu +cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu + @true + +stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu + $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ + cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)" + touch stamp-xcpu +cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu + @true