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2013-04-08  Jan Beulich <jbeulich@suse.com>

	* gas/i386/x86-64-opcode.s: Flesh out LOOP and J*CXZ sections.
	Correct comments in Jcc section.
	* gas/i386/x86-64-opcode.d: Refresh.
	* gas/i386/ilp32/x86-64-opcode.d: Refresh.

opcodes/
2013-04-08  Jan Beulich <jbeulich@suse.com>

	* i386-opc.tbl: Fold 64-bit and non-64-bit jecxz entries.
	* i386-tbl.h: Re-generate.
This commit is contained in:
Jan Beulich 2013-04-08 15:48:38 +00:00
parent 4337774fc8
commit 5f77db5271
7 changed files with 32 additions and 22 deletions
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7
gas/testsuite/ChangeLog
View file

@ -1,3 +1,10 @@
2013-04-08 Jan Beulich <jbeulich@suse.com>
* gas/i386/x86-64-opcode.s: Flesh out LOOP and J*CXZ sections.
Correct comments in Jcc section.
* gas/i386/x86-64-opcode.d: Refresh.
* gas/i386/ilp32/x86-64-opcode.d: Refresh.
2013-04-06 David S. Miller <davem@davemloft.net> 2013-04-06 David S. Miller <davem@davemloft.net>
* gas/sparc/cbcond.s: Add tests for new opcode aliases. * gas/sparc/cbcond.s: Add tests for new opcode aliases.

5
gas/testsuite/gas/i386/ilp32/x86-64-opcode.d
View file

@ -52,6 +52,11 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 48 0f c3 00 movnti %rax,\(%rax\) [ ]*[a-f0-9]+: 48 0f c3 00 movnti %rax,\(%rax\)
[ ]*[a-f0-9]+: 4d 0f c3 00 movnti %r8,\(%r8\) [ ]*[a-f0-9]+: 4d 0f c3 00 movnti %r8,\(%r8\)
[ ]*[a-f0-9]+: 4c 0f c3 00 movnti %r8,\(%rax\) [ ]*[a-f0-9]+: 4c 0f c3 00 movnti %r8,\(%rax\)
[ ]*[a-f0-9]+: e2 fe loop 0x[0-9a-f]+
[ ]*[a-f0-9]+: e2 fe loop 0x[0-9a-f]+
[ ]*[a-f0-9]+: 67 e2 fd loopl 0x[0-9a-f]+
[ ]*[a-f0-9]+: e3 fe jrcxz 0x[0-9a-f]+
[ ]*[a-f0-9]+: 67 e3 fd jecxz 0x[0-9a-f]+
[ ]*[a-f0-9]+: 41 f6 38 idivb \(%r8\) [ ]*[a-f0-9]+: 41 f6 38 idivb \(%r8\)
[ ]*[a-f0-9]+: f6 38 idivb \(%rax\) [ ]*[a-f0-9]+: f6 38 idivb \(%rax\)
[ ]*[a-f0-9]+: 66 41 f7 38 idivw \(%r8\) [ ]*[a-f0-9]+: 66 41 f7 38 idivw \(%r8\)

6
gas/testsuite/gas/i386/x86-64-opcode.d
View file

@ -51,6 +51,11 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 48 0f c3 00 movnti %rax,\(%rax\) [ ]*[a-f0-9]+: 48 0f c3 00 movnti %rax,\(%rax\)
[ ]*[a-f0-9]+: 4d 0f c3 00 movnti %r8,\(%r8\) [ ]*[a-f0-9]+: 4d 0f c3 00 movnti %r8,\(%r8\)
[ ]*[a-f0-9]+: 4c 0f c3 00 movnti %r8,\(%rax\) [ ]*[a-f0-9]+: 4c 0f c3 00 movnti %r8,\(%rax\)
[ ]*[a-f0-9]+: e2 fe loop 0x[0-9a-f]+
[ ]*[a-f0-9]+: e2 fe loop 0x[0-9a-f]+
[ ]*[a-f0-9]+: 67 e2 fd loopl 0x[0-9a-f]+
[ ]*[a-f0-9]+: e3 fe jrcxz 0x[0-9a-f]+
[ ]*[a-f0-9]+: 67 e3 fd jecxz 0x[0-9a-f]+
[ ]*[a-f0-9]+: 41 f6 38 idivb \(%r8\) [ ]*[a-f0-9]+: 41 f6 38 idivb \(%r8\)
[ ]*[a-f0-9]+: f6 38 idivb \(%rax\) [ ]*[a-f0-9]+: f6 38 idivb \(%rax\)
[ ]*[a-f0-9]+: 66 41 f7 38 idivw \(%r8\) [ ]*[a-f0-9]+: 66 41 f7 38 idivw \(%r8\)
@ -296,5 +301,4 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 07 sysret [ ]*[a-f0-9]+: 0f 07 sysret
[ ]*[a-f0-9]+: 0f 01 f8 swapgs [ ]*[a-f0-9]+: 0f 01 f8 swapgs
[ ]*[a-f0-9]+: 66 68 22 22 pushw \$0x2222 [ ]*[a-f0-9]+: 66 68 22 22 pushw \$0x2222
[ ]*[a-f0-9]+: 67 e3 ff jecxz 0x49d
#pass #pass

13
gas/testsuite/gas/i386/x86-64-opcode.s
View file

@ -61,15 +61,18 @@
# Conditionals # Conditionals
# LOOP # LOOP
LOOP . # -- -- -- -- E2 FE ; RCX used as counter.
LOOPq . # -- -- -- -- E2 FE ; RCX used as counter.
LOOPl . # -- 67 -- -- E2 FD ; ECX used as counter.
# Jcc # Jcc
# 66 -- -- -- 77 FD ; A16 override: (Addr64) = ZEXT(Addr16) # 66 -- -- -- 77 FD ; O16 override: (Addr64) = ZEXT(Addr16)
# 66 -- -- -- 0F 87 F9 FF FF FF ; A16 override: (Addr64) = ZEXT(Addr16) # 66 -- -- -- 0F 87 F9 FF FF FF ; O16 override: (Addr64) = ZEXT(Addr16)
# J*CXZ # J*CXZ
# 66 67 -- -- E3 FC ; ECX used as counter. A16 override: (Addr64) = ZEXT(Addr16) JRCXZ . # -- -- -- -- E3 FE ; RCX used as counter.
# 66 -- -- -- E3 FD ; A16 override: (Addr64) = ZEXT(Addr16) JECXZ . # -- 67 -- -- E3 FD ; ECX used as counter.
@ -424,5 +427,3 @@
swapgs # -- -- -- -- 0F 01 f8 swapgs # -- -- -- -- 0F 01 f8
pushw $0x2222 pushw $0x2222
jecxz .+2

5
opcodes/ChangeLog
View file

@ -1,3 +1,8 @@
2013-04-08 Jan Beulich <jbeulich@suse.com>
* i386-opc.tbl: Fold 64-bit and non-64-bit jecxz entries.
* i386-tbl.h: Re-generate.
2013-04-06 David S. Miller <davem@davemloft.net> 2013-04-06 David S. Miller <davem@davemloft.net>
* sparc-dis.c (compare_opcodes): When encountering multiple aliases * sparc-dis.c (compare_opcodes): When encountering multiple aliases

3
opcodes/i386-opc.tbl
View file

@ -389,8 +389,7 @@ jg, 1, 0x7f, None, 1, 0, Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf,
// jcxz vs. jecxz is chosen on the basis of the address size prefix. // jcxz vs. jecxz is chosen on the basis of the address size prefix.
jcxz, 1, 0xe3, None, 1, CpuNo64, JumpByte|Size16|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp16|Disp32 } jcxz, 1, 0xe3, None, 1, CpuNo64, JumpByte|Size16|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp16|Disp32 }
jecxz, 1, 0xe3, None, 1, CpuNo64, JumpByte|Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp16|Disp32 } jecxz, 1, 0xe3, None, 1, 0, JumpByte|Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp16|Disp32|Disp32S }
jecxz, 1, 0xe3, None, 1, Cpu64, JumpByte|Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp32|Disp32S }
jrcxz, 1, 0xe3, None, 1, Cpu64, JumpByte|Size64|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Disp8|Disp32|Disp32S } jrcxz, 1, 0xe3, None, 1, Cpu64, JumpByte|Size64|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Disp8|Disp32|Disp32S }
// The loop instructions also use the address size prefix to select // The loop instructions also use the address size prefix to select

15
opcodes/i386-tbl.h
View file

@ -3410,23 +3410,12 @@ const insn_template i386_optab[] =
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 1, 0 } }, 0, 0, 0, 0 } },
{ 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1,
1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ "jecxz", 1, 0xe3, None, 1,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 1, 0, 0 } },
{ 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1,
1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } }, 0, 0, 0, 0, 0, 0 } } } },
{ "jrcxz", 1, 0xe3, None, 1, { "jrcxz", 1, 0xe3, None, 1,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,