gas/testsuite/
2013-04-08 Jan Beulich <jbeulich@suse.com> * gas/i386/x86-64-opcode.s: Flesh out LOOP and J*CXZ sections. Correct comments in Jcc section. * gas/i386/x86-64-opcode.d: Refresh. * gas/i386/ilp32/x86-64-opcode.d: Refresh. opcodes/ 2013-04-08 Jan Beulich <jbeulich@suse.com> * i386-opc.tbl: Fold 64-bit and non-64-bit jecxz entries. * i386-tbl.h: Re-generate.
This commit is contained in:
Jan Beulich
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7 changed files with 32 additions and 22 deletions
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@ -1,3 +1,10 @@
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2013-04-08 Jan Beulich <jbeulich@suse.com>
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* gas/i386/x86-64-opcode.s: Flesh out LOOP and J*CXZ sections.
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Correct comments in Jcc section.
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* gas/i386/x86-64-opcode.d: Refresh.
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* gas/i386/ilp32/x86-64-opcode.d: Refresh.
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2013-04-06 David S. Miller <davem@davemloft.net>
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* gas/sparc/cbcond.s: Add tests for new opcode aliases.
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@ -52,6 +52,11 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 48 0f c3 00 movnti %rax,\(%rax\)
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[ ]*[a-f0-9]+: 4d 0f c3 00 movnti %r8,\(%r8\)
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[ ]*[a-f0-9]+: 4c 0f c3 00 movnti %r8,\(%rax\)
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[ ]*[a-f0-9]+: e2 fe loop 0x[0-9a-f]+
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[ ]*[a-f0-9]+: e2 fe loop 0x[0-9a-f]+
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[ ]*[a-f0-9]+: 67 e2 fd loopl 0x[0-9a-f]+
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[ ]*[a-f0-9]+: e3 fe jrcxz 0x[0-9a-f]+
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[ ]*[a-f0-9]+: 67 e3 fd jecxz 0x[0-9a-f]+
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[ ]*[a-f0-9]+: 41 f6 38 idivb \(%r8\)
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[ ]*[a-f0-9]+: f6 38 idivb \(%rax\)
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[ ]*[a-f0-9]+: 66 41 f7 38 idivw \(%r8\)
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@ -51,6 +51,11 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 48 0f c3 00 movnti %rax,\(%rax\)
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[ ]*[a-f0-9]+: 4d 0f c3 00 movnti %r8,\(%r8\)
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[ ]*[a-f0-9]+: 4c 0f c3 00 movnti %r8,\(%rax\)
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[ ]*[a-f0-9]+: e2 fe loop 0x[0-9a-f]+
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[ ]*[a-f0-9]+: e2 fe loop 0x[0-9a-f]+
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[ ]*[a-f0-9]+: 67 e2 fd loopl 0x[0-9a-f]+
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[ ]*[a-f0-9]+: e3 fe jrcxz 0x[0-9a-f]+
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[ ]*[a-f0-9]+: 67 e3 fd jecxz 0x[0-9a-f]+
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[ ]*[a-f0-9]+: 41 f6 38 idivb \(%r8\)
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[ ]*[a-f0-9]+: f6 38 idivb \(%rax\)
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[ ]*[a-f0-9]+: 66 41 f7 38 idivw \(%r8\)
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@ -296,5 +301,4 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 0f 07 sysret
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[ ]*[a-f0-9]+: 0f 01 f8 swapgs
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[ ]*[a-f0-9]+: 66 68 22 22 pushw \$0x2222
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[ ]*[a-f0-9]+: 67 e3 ff jecxz 0x49d
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#pass
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@ -61,15 +61,18 @@
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# Conditionals
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# LOOP
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LOOP . # -- -- -- -- E2 FE ; RCX used as counter.
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LOOPq . # -- -- -- -- E2 FE ; RCX used as counter.
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LOOPl . # -- 67 -- -- E2 FD ; ECX used as counter.
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# Jcc
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# 66 -- -- -- 77 FD ; A16 override: (Addr64) = ZEXT(Addr16)
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# 66 -- -- -- 0F 87 F9 FF FF FF ; A16 override: (Addr64) = ZEXT(Addr16)
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# 66 -- -- -- 77 FD ; O16 override: (Addr64) = ZEXT(Addr16)
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# 66 -- -- -- 0F 87 F9 FF FF FF ; O16 override: (Addr64) = ZEXT(Addr16)
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# J*CXZ
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# 66 67 -- -- E3 FC ; ECX used as counter. A16 override: (Addr64) = ZEXT(Addr16)
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# 66 -- -- -- E3 FD ; A16 override: (Addr64) = ZEXT(Addr16)
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JRCXZ . # -- -- -- -- E3 FE ; RCX used as counter.
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JECXZ . # -- 67 -- -- E3 FD ; ECX used as counter.
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@ -424,5 +427,3 @@
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swapgs # -- -- -- -- 0F 01 f8
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pushw $0x2222
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jecxz .+2
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@ -1,3 +1,8 @@
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2013-04-08 Jan Beulich <jbeulich@suse.com>
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* i386-opc.tbl: Fold 64-bit and non-64-bit jecxz entries.
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* i386-tbl.h: Re-generate.
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2013-04-06 David S. Miller <davem@davemloft.net>
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* sparc-dis.c (compare_opcodes): When encountering multiple aliases
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@ -389,8 +389,7 @@ jg, 1, 0x7f, None, 1, 0, Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf,
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// jcxz vs. jecxz is chosen on the basis of the address size prefix.
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jcxz, 1, 0xe3, None, 1, CpuNo64, JumpByte|Size16|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp16|Disp32 }
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jecxz, 1, 0xe3, None, 1, CpuNo64, JumpByte|Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp16|Disp32 }
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jecxz, 1, 0xe3, None, 1, Cpu64, JumpByte|Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp32|Disp32S }
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jecxz, 1, 0xe3, None, 1, 0, JumpByte|Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp16|Disp32|Disp32S }
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jrcxz, 1, 0xe3, None, 1, Cpu64, JumpByte|Size64|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Disp8|Disp32|Disp32S }
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// The loop instructions also use the address size prefix to select
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@ -3410,23 +3410,12 @@ const insn_template i386_optab[] =
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 1, 0 } },
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0, 0, 0, 0 } },
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{ 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1,
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1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
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{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0 } } } },
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{ "jecxz", 1, 0xe3, None, 1,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 1, 0, 0 } },
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{ 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1,
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1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
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{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0 } } } },
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{ "jrcxz", 1, 0xe3, None, 1,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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