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Fix wording regarding Intel's IA-64 architecture.

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Kevin Buettner 2000-02-16 04:11:25 +00:00
parent e6f9e5140d
commit 5e35df8e62
2 changed files with 6 additions and 1 deletions
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gdb/doc/ChangeLog
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@ -1,3 +1,8 @@
2000-02-15 Kevin Buettner <kevinb@redhat.com>
* agentexpr.texi: Fix wording regarding Intel's IA-64
architecture.
2000-01-16 Tom Tromey <tromey@cygnus.com>
* gdb.texinfo (Breakpoints): Mention breakpoint ranges.

2
gdb/doc/agentexpr.texi
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@ -798,7 +798,7 @@ When we add side-effects, we should add this.
@item Why does the @code{reg} bytecode take a 16-bit register number?
Intel's IA64-architecture, Merced, has 128 general-purpose registers,
Intel's IA-64 architecture has 128 general-purpose registers,
and 128 floating-point registers, and I'm sure it has some random
control registers.