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* gas/m68hc11/bug-1825.s: Add some tests.

Browse source 
* gas/m68hc11/bug-1825.d: Update.
	* gas/m68hc11/opers12.d: Update.
	* gas/m68hc11/opers12-dwarf2.d: Update.
This commit is contained in:
Stephane Carrez 2002-12-08 21:08:07 +00:00
parent b394d696b4
commit 5da0c2771a
5 changed files with 78 additions and 64 deletions
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7
gas/testsuite/ChangeLog
View file

@ -1,3 +1,10 @@
2002-12-08 Stephane Carrez <stcarrez@nerim.fr>
* gas/m68hc11/bug-1825.s: Add some tests.
* gas/m68hc11/bug-1825.d: Update.
* gas/m68hc11/opers12.d: Update.
* gas/m68hc11/opers12-dwarf2.d: Update.
2002-12-05 Richard Henderson <rth@redhat.com> 2002-12-05 Richard Henderson <rth@redhat.com>
* gas/ia64/ltoff22x-1.[ds]: New. * gas/ia64/ltoff22x-1.[ds]: New.

75
gas/testsuite/gas/m68hc11/bug-1825.d
View file

@ -13,7 +13,7 @@ Disassembly of section \.text:
_main: _main:
nop nop
0: a7 nop 0: a7 nop
ldx L1,pc ; Assemble to 5-bit > 0 offset ldx L1,pc ; Assemble to 5\-bit > 0 offset
1: ee c2 ldx 2,PC \{5 <L1>\} 1: ee c2 ldx 2,PC \{5 <L1>\}
bra L2 bra L2
3: 20 02 bra 7 <L2> 3: 20 02 bra 7 <L2>
@ -26,7 +26,7 @@ _main:
L1: L1:
.dc.w 0xaabb .dc.w 0xaabb
L2: L2:
subd L1,pc ; Assemble to 5-bit < 0 offset subd L1,pc ; Assemble to 5\-bit < 0 offset
7: a3 dc subd \-4,PC \{5 <L1>\} 7: a3 dc subd \-4,PC \{5 <L1>\}
0+9 <L3>: 0+9 <L3>:
@ -46,67 +46,72 @@ L2:
16: a7 nop 16: a7 nop
L3: L3:
.ds.b 14, 0xA7 .ds.b 14, 0xA7
ldab L3,pc ; 5-bit < 0 offset ldab L3,pc ; 5\-bit < 0 offset
17: e6 d0 ldab \-16,PC \{9 <L3>\} 17: e6 d0 ldab \-16,PC \{9 <L3>\}
ldab L4,pc ; 5-bit > 0 offset ldab L4,pc ; 5\-bit > 0 offset
19: e6 f8 20 ldab 32,PC \{3b <L4>\} # SCz: FIXME this is wrong 19: e6 cf ldab 15,PC \{2a <L4>\}
... ...
0+3b <L4>: 0+2a <L4>:
... ...
.skip 31 .skip 15
L4: L4:
.skip 128 .skip 128
subd L4,pc ; 9-bit < 0 offset subd L4,pc ; 9\-bit < 0 offset
bb: a3 f9 7e subd \-130,PC \{3b <L4>\} aa: a3 f9 7d subd \-131,PC \{2a <L4>\}
addd L5,pc ; 9-bit > 0 offset addd L5,pc ; 9\-bit > 0 offset
be: e3 f8 81 addd 129,PC \{141 <L5>\} # SCz: FIXME ad: e3 f8 80 addd 128,PC \{130 <L5>\}
... ...
0+141 <L5>: 0+130 <L5>:
... ...
23d: 00 bgnd 22c: 00 bgnd
23e: 00 bgnd
.skip 128 .skip 128
L5: L5:
.skip 256-2 .skip 256\-3
orab L5,pc ; 9 bit < 0 offset (min value) orab L5,pc ; 9 bit < 0 offset \(min value\)
23f: ea f9 00 orab -256,PC \{141 <L5>\} 22d: ea f9 00 orab \-256,PC \{130 <L5>\}
oraa L6,pc ; 9 bit > 0 offset (max value) oraa L6,pc ; 9 bit > 0 offset \(max value\)
242: aa fa 00 ff oraa 255,PC \{343 <L5\+0x202>\} # SCz: FIXME 230: aa f8 ff oraa 255,PC \{332 <L6>\}
... ...
0+345 <L6>: 0+332 <L6>:
...
42e: 00 bgnd
42f: 00 bgnd
.skip 255 .skip 255
L6: L6:
.skip 256\-2
orab L6,pc ; 16 bit < 0 offset
430: ea fa fe fe orab \-258,PC \{332 <L6>\}
anda _main,pc ; 16 bit < 0 offset anda _main,pc ; 16 bit < 0 offset
345: a4 fa fc b7 anda -841,PC \{fffffffe <\.L0\+0xfffffb8c>\} # SCz: FIXME 434: a4 fa fb c8 anda \-1080,PC \{0 <_main>\}
andb L7,pc andb L7,pc
349: e4 fa 01 00 andb 256,PC \{44b <L6\+0x106>\} # SCz: FIXME 438: e4 fa 01 00 andb 256,PC \{53c <L7>\}
... ...
0+44d <L7>: 0+53c <L7>:
.skip 256 .skip 256
L7: L7:
stab external,pc ; External 16\-bit PCREL stab external,pc ; External 16\-bit PCREL
44d: 6b fa 00 00 stab 0,PC \{44f <L7\+0x2>\} 53c: 6b fa fa c0 stab \-1344,PC \{0 <_main>\}
44f: R_M68HC12_16 external # SCz: FIXME 53e: R_M68HC12_PCREL_16 external
ldd _table,pc ldd _table,pc
451: ec cf ldd 15,PC \{462 <_table>\} 540: ec cf ldd 15,PC \{551 <_table>\}
addd _table\+2,pc addd _table\+2,pc
453: e3 cf addd 15,PC \{464 <_table\+0x2>\} 542: e3 cf addd 15,PC \{553 <_table\+0x2>\}
subd _table\+4,pc subd _table\+4,pc
455: a3 cf subd 15,PC \{466 <_table\+0x4>\} 544: a3 cf subd 15,PC \{555 <_table\+0x4>\}
addd _table\+8,pc addd _table\+8,pc
457: e3 f8 11 addd 17,PC \{46a <_table\+0x8>\} 546: e3 f8 10 addd 16,PC \{559 <_table\+0x8>\}
addd _table\+12,pc addd _table\+12,pc
45a: e3 f8 12 addd 18,PC \{46e <_table\+0xc>\} 549: e3 f8 11 addd 17,PC \{55d <_table\+0xc>\}
addd _table\+16,pc addd _table\+16,pc
45d: e3 f8 13 addd 19,PC \{472 <.L0>\} 54c: e3 f8 12 addd 18,PC \{561 <.L0>\}
rts rts
460: 3d rts 54f: 3d rts
nop nop
461: a7 nop 550: a7 nop
0+462 <_table>: 0+551 <_table>:
\.\.\. ...

6
gas/testsuite/gas/m68hc11/bug-1825.s
View file

@ -15,18 +15,20 @@ L3:
.ds.b 14, 0xA7 .ds.b 14, 0xA7
ldab L3,pc ; 5-bit < 0 offset ldab L3,pc ; 5-bit < 0 offset
ldab L4,pc ; 5-bit > 0 offset ldab L4,pc ; 5-bit > 0 offset
.skip 31 .skip 15
L4: L4:
.skip 128 .skip 128
subd L4,pc ; 9-bit < 0 offset subd L4,pc ; 9-bit < 0 offset
addd L5,pc ; 9-bit > 0 offset addd L5,pc ; 9-bit > 0 offset
.skip 128 .skip 128
L5: L5:
.skip 256-2 .skip 256-3
orab L5,pc ; 9 bit < 0 offset (min value) orab L5,pc ; 9 bit < 0 offset (min value)
oraa L6,pc ; 9 bit > 0 offset (max value) oraa L6,pc ; 9 bit > 0 offset (max value)
.skip 255 .skip 255
L6: L6:
.skip 256-2
orab L6,pc ; 16 bit < 0 offset
anda _main,pc ; 16 bit < 0 offset anda _main,pc ; 16 bit < 0 offset
andb L7,pc andb L7,pc
.skip 256 .skip 256

32
gas/testsuite/gas/m68hc11/opers12-dwarf2.d
View file

@ -55,7 +55,7 @@ L1: ldy ,x
ldd \[32768,pc\] ldd \[32768,pc\]
39: ec fb 80 00 ldd \[32768,PC\] 39: ec fb 80 00 ldd \[32768,PC\]
ldd L1,pc ldd L1,pc
3d: ec f9 ca ldd -54,PC \{9 <L1>\} 3d: ec f9 c9 ldd -55,PC \{9 <L1>\}
std a,x ; Two\-reg index std a,x ; Two\-reg index
40: 6c e4 std A,X 40: 6c e4 std A,X
ldx b,x ldx b,x
@ -211,31 +211,31 @@ t2:
leas max5b,pc leas max5b,pc
105: 1b cf leas 15,PC \{116 <t2\+0x21>\} 105: 1b cf leas 15,PC \{116 <t2\+0x21>\}
leas min9b,pc leas min9b,pc
107: 1b f9 00 leas -256,PC \{9 <L1>\} 107: 1b fa ff 00 leas -256,PC \{b <L1\+0x2>\}
leas max9b,pc leas max9b,pc
10a: 1b f8 ff leas 255,PC \{20b <.L0\+0xd8>\} 10b: 1b f8 ff leas 255,PC \{20d <.L0\+0xd9>\}
;; ;;
;; Disassembler bug with movb ;; Disassembler bug with movb
;; ;;
movb #23,0x2345 movb #23,0x2345
10d: 18 0b 17 23 movb #23, 2345 <.L0\+0x2212> 10e: 18 0b 17 23 movb #23, 2345 <.L0\+0x2211>
111: 45 112: 45
movb #40,12,sp movb #40,12,sp
112: 18 08 8c 28 movb #40, 12,SP 113: 18 08 8c 28 movb #40, 12,SP
movb #39,3,\+sp movb #39,3,\+sp
116: 18 08 a2 27 movb #39, 3,\+SP 117: 18 08 a2 27 movb #39, 3,\+SP
movb #20,14,sp movb #20,14,sp
11a: 18 08 8e 14 movb #20, 14,SP 11b: 18 08 8e 14 movb #20, 14,SP
movw #0x3210,0x3456 movw #0x3210,0x3456
11e: 18 03 32 10 movw #3210 <bb\+0xa10>, 3456 <bb\+0xc56> 11f: 18 03 32 10 movw #3210 <bb\+0xa10>, 3456 <bb\+0xc56>
122: 34 56 123: 34 56
movw #0x4040,12,sp movw #0x4040,12,sp
124: 18 00 8c 40 movw #4040 <bb\+0x1840>, 12,SP 125: 18 00 8c 40 movw #4040 <bb\+0x1840>, 12,SP
128: 40 129: 40
movw #0x3900,3,\+sp movw #0x3900,3,\+sp
129: 18 00 a2 39 movw #3900 <bb\+0x1100>, 3,\+SP 12a: 18 00 a2 39 movw #3900 <bb\+0x1100>, 3,\+SP
12d: 00 12e: 00
movw #0x2000,14,sp movw #0x2000,14,sp
12e: 18 00 8e 20 movw #2000 <.L0\+0x1ecd>, 14,SP 12f: 18 00 8e 20 movw #2000 <.L0\+0x1ecc>, 14,SP
132: 00 133: 00

22
gas/testsuite/gas/m68hc11/opers12.d
View file

@ -26,7 +26,7 @@ Disassembly of section .text:
0+0031 <L1\+0x28> ldaa \[257,Y\] 0+0031 <L1\+0x28> ldaa \[257,Y\]
0+0035 <L1\+0x2c> ldab \[32767,SP\] 0+0035 <L1\+0x2c> ldab \[32767,SP\]
0+0039 <L1\+0x30> ldd \[32768,PC\] 0+0039 <L1\+0x30> ldd \[32768,PC\]
0+003d <L1\+0x34> ldd \-54,PC \{0+9 <L1>\} 0+003d <L1\+0x34> ldd \-55,PC \{0+9 <L1>\}
0+0040 <L1\+0x37> std A,X 0+0040 <L1\+0x37> std A,X
0+0042 <L1\+0x39> ldx B,X 0+0042 <L1\+0x39> ldx B,X
0+0044 <L1\+0x3b> stx D,Y 0+0044 <L1\+0x3b> stx D,Y
@ -101,13 +101,13 @@ Disassembly of section .text:
0+00ff <t2\+0xa> leas 10240,Y 0+00ff <t2\+0xa> leas 10240,Y
0+0103 <t2\+0xe> leas -16,PC \{0+f5 <t2>\} 0+0103 <t2\+0xe> leas -16,PC \{0+f5 <t2>\}
0+0105 <t2\+0x10> leas 15,PC \{0+116 <t2\+0x21>\} 0+0105 <t2\+0x10> leas 15,PC \{0+116 <t2\+0x21>\}
0+0107 <t2\+0x12> leas -256,PC \{0+9 <L1>\} 0+0107 <t2\+0x12> leas -256,PC \{0+b <L1\+0x2>\}
0+010a <t2\+0x15> leas 255,PC \{0+20b <max9b\+0x10c>\} 0+010b <t2\+0x16> leas 255,PC \{0+20d <max9b\+0x10e>\}
0+010d <t2\+0x18> movb #23, 0+2345 <max9b\+0x2246> 0+010e <t2\+0x19> movb #23, 0+2345 <max9b\+0x2246>
0+0112 <t2\+0x1d> movb #40, 12,SP 0+0113 <t2\+0x1e> movb #40, 12,SP
0+0116 <t2\+0x21> movb #39, 3,\+SP 0+0117 <t2\+0x22> movb #39, 3,\+SP
0+011a <t2\+0x25> movb #20, 14,SP 0+011b <t2\+0x26> movb #20, 14,SP
0+011e <t2\+0x29> movw #0+3210 <bb\+0xa10>, 0+3456 <bb\+0xc56> 0+011f <t2\+0x2a> movw #0+3210 <bb\+0xa10>, 0+3456 <bb\+0xc56>
0+0124 <t2\+0x2f> movw #0+4040 <bb\+0x1840>, 12,SP 0+0125 <t2\+0x30> movw #0+4040 <bb\+0x1840>, 12,SP
0+0129 <t2\+0x34> movw #0+3900 <bb\+0x1100>, 3,\+SP 0+012a <t2\+0x35> movw #0+3900 <bb\+0x1100>, 3,\+SP
0+012e <t2\+0x39> movw #0+2000 <max9b\+0x1f01>, 14,SP 0+012f <t2\+0x3a> movw #0+2000 <max9b\+0x1f01>, 14,SP