* gas/m68hc11/bug-1825.s: Add some tests.
* gas/m68hc11/bug-1825.d: Update. * gas/m68hc11/opers12.d: Update. * gas/m68hc11/opers12-dwarf2.d: Update.
This commit is contained in:
parent
b394d696b4
commit
5da0c2771a
5 changed files with 78 additions and 64 deletions
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@ -1,3 +1,10 @@
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2002-12-08 Stephane Carrez <stcarrez@nerim.fr>
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* gas/m68hc11/bug-1825.s: Add some tests.
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* gas/m68hc11/bug-1825.d: Update.
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* gas/m68hc11/opers12.d: Update.
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* gas/m68hc11/opers12-dwarf2.d: Update.
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2002-12-05 Richard Henderson <rth@redhat.com>
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* gas/ia64/ltoff22x-1.[ds]: New.
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@ -13,7 +13,7 @@ Disassembly of section \.text:
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_main:
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nop
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0: a7 nop
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ldx L1,pc ; Assemble to 5-bit > 0 offset
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ldx L1,pc ; Assemble to 5\-bit > 0 offset
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1: ee c2 ldx 2,PC \{5 <L1>\}
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bra L2
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3: 20 02 bra 7 <L2>
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@ -26,7 +26,7 @@ _main:
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L1:
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.dc.w 0xaabb
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L2:
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subd L1,pc ; Assemble to 5-bit < 0 offset
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subd L1,pc ; Assemble to 5\-bit < 0 offset
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7: a3 dc subd \-4,PC \{5 <L1>\}
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0+9 <L3>:
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@ -46,67 +46,72 @@ L2:
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16: a7 nop
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L3:
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.ds.b 14, 0xA7
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ldab L3,pc ; 5-bit < 0 offset
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ldab L3,pc ; 5\-bit < 0 offset
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17: e6 d0 ldab \-16,PC \{9 <L3>\}
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ldab L4,pc ; 5-bit > 0 offset
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19: e6 f8 20 ldab 32,PC \{3b <L4>\} # SCz: FIXME this is wrong
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ldab L4,pc ; 5\-bit > 0 offset
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19: e6 cf ldab 15,PC \{2a <L4>\}
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...
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0+3b <L4>:
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0+2a <L4>:
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...
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.skip 31
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.skip 15
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L4:
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.skip 128
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subd L4,pc ; 9-bit < 0 offset
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bb: a3 f9 7e subd \-130,PC \{3b <L4>\}
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addd L5,pc ; 9-bit > 0 offset
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be: e3 f8 81 addd 129,PC \{141 <L5>\} # SCz: FIXME
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subd L4,pc ; 9\-bit < 0 offset
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aa: a3 f9 7d subd \-131,PC \{2a <L4>\}
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addd L5,pc ; 9\-bit > 0 offset
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ad: e3 f8 80 addd 128,PC \{130 <L5>\}
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...
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0+141 <L5>:
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0+130 <L5>:
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...
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23d: 00 bgnd
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23e: 00 bgnd
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22c: 00 bgnd
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.skip 128
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L5:
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.skip 256-2
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orab L5,pc ; 9 bit < 0 offset (min value)
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23f: ea f9 00 orab -256,PC \{141 <L5>\}
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oraa L6,pc ; 9 bit > 0 offset (max value)
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242: aa fa 00 ff oraa 255,PC \{343 <L5\+0x202>\} # SCz: FIXME
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.skip 256\-3
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orab L5,pc ; 9 bit < 0 offset \(min value\)
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22d: ea f9 00 orab \-256,PC \{130 <L5>\}
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oraa L6,pc ; 9 bit > 0 offset \(max value\)
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230: aa f8 ff oraa 255,PC \{332 <L6>\}
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...
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0+345 <L6>:
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0+332 <L6>:
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...
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42e: 00 bgnd
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42f: 00 bgnd
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.skip 255
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L6:
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.skip 256\-2
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orab L6,pc ; 16 bit < 0 offset
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430: ea fa fe fe orab \-258,PC \{332 <L6>\}
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anda _main,pc ; 16 bit < 0 offset
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345: a4 fa fc b7 anda -841,PC \{fffffffe <\.L0\+0xfffffb8c>\} # SCz: FIXME
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434: a4 fa fb c8 anda \-1080,PC \{0 <_main>\}
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andb L7,pc
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349: e4 fa 01 00 andb 256,PC \{44b <L6\+0x106>\} # SCz: FIXME
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438: e4 fa 01 00 andb 256,PC \{53c <L7>\}
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...
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0+44d <L7>:
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0+53c <L7>:
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.skip 256
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L7:
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stab external,pc ; External 16\-bit PCREL
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44d: 6b fa 00 00 stab 0,PC \{44f <L7\+0x2>\}
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44f: R_M68HC12_16 external # SCz: FIXME
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53c: 6b fa fa c0 stab \-1344,PC \{0 <_main>\}
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53e: R_M68HC12_PCREL_16 external
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ldd _table,pc
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451: ec cf ldd 15,PC \{462 <_table>\}
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540: ec cf ldd 15,PC \{551 <_table>\}
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addd _table\+2,pc
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453: e3 cf addd 15,PC \{464 <_table\+0x2>\}
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542: e3 cf addd 15,PC \{553 <_table\+0x2>\}
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subd _table\+4,pc
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455: a3 cf subd 15,PC \{466 <_table\+0x4>\}
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544: a3 cf subd 15,PC \{555 <_table\+0x4>\}
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addd _table\+8,pc
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457: e3 f8 11 addd 17,PC \{46a <_table\+0x8>\}
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546: e3 f8 10 addd 16,PC \{559 <_table\+0x8>\}
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addd _table\+12,pc
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45a: e3 f8 12 addd 18,PC \{46e <_table\+0xc>\}
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549: e3 f8 11 addd 17,PC \{55d <_table\+0xc>\}
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addd _table\+16,pc
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45d: e3 f8 13 addd 19,PC \{472 <.L0>\}
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54c: e3 f8 12 addd 18,PC \{561 <.L0>\}
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rts
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460: 3d rts
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54f: 3d rts
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nop
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461: a7 nop
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550: a7 nop
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0+462 <_table>:
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\.\.\.
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0+551 <_table>:
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...
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@ -15,18 +15,20 @@ L3:
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.ds.b 14, 0xA7
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ldab L3,pc ; 5-bit < 0 offset
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ldab L4,pc ; 5-bit > 0 offset
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.skip 31
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.skip 15
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L4:
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.skip 128
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subd L4,pc ; 9-bit < 0 offset
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addd L5,pc ; 9-bit > 0 offset
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.skip 128
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L5:
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.skip 256-2
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.skip 256-3
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orab L5,pc ; 9 bit < 0 offset (min value)
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oraa L6,pc ; 9 bit > 0 offset (max value)
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.skip 255
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L6:
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.skip 256-2
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orab L6,pc ; 16 bit < 0 offset
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anda _main,pc ; 16 bit < 0 offset
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andb L7,pc
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.skip 256
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@ -55,7 +55,7 @@ L1: ldy ,x
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ldd \[32768,pc\]
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39: ec fb 80 00 ldd \[32768,PC\]
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ldd L1,pc
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3d: ec f9 ca ldd -54,PC \{9 <L1>\}
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3d: ec f9 c9 ldd -55,PC \{9 <L1>\}
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std a,x ; Two\-reg index
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40: 6c e4 std A,X
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ldx b,x
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leas max5b,pc
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105: 1b cf leas 15,PC \{116 <t2\+0x21>\}
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leas min9b,pc
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107: 1b f9 00 leas -256,PC \{9 <L1>\}
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107: 1b fa ff 00 leas -256,PC \{b <L1\+0x2>\}
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leas max9b,pc
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10a: 1b f8 ff leas 255,PC \{20b <.L0\+0xd8>\}
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10b: 1b f8 ff leas 255,PC \{20d <.L0\+0xd9>\}
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;;
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;; Disassembler bug with movb
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;;
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movb #23,0x2345
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10d: 18 0b 17 23 movb #23, 2345 <.L0\+0x2212>
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111: 45
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10e: 18 0b 17 23 movb #23, 2345 <.L0\+0x2211>
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112: 45
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movb #40,12,sp
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112: 18 08 8c 28 movb #40, 12,SP
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113: 18 08 8c 28 movb #40, 12,SP
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movb #39,3,\+sp
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116: 18 08 a2 27 movb #39, 3,\+SP
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117: 18 08 a2 27 movb #39, 3,\+SP
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movb #20,14,sp
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11a: 18 08 8e 14 movb #20, 14,SP
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11b: 18 08 8e 14 movb #20, 14,SP
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movw #0x3210,0x3456
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11e: 18 03 32 10 movw #3210 <bb\+0xa10>, 3456 <bb\+0xc56>
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122: 34 56
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11f: 18 03 32 10 movw #3210 <bb\+0xa10>, 3456 <bb\+0xc56>
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123: 34 56
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movw #0x4040,12,sp
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124: 18 00 8c 40 movw #4040 <bb\+0x1840>, 12,SP
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128: 40
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125: 18 00 8c 40 movw #4040 <bb\+0x1840>, 12,SP
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129: 40
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movw #0x3900,3,\+sp
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129: 18 00 a2 39 movw #3900 <bb\+0x1100>, 3,\+SP
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12d: 00
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12a: 18 00 a2 39 movw #3900 <bb\+0x1100>, 3,\+SP
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12e: 00
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movw #0x2000,14,sp
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12e: 18 00 8e 20 movw #2000 <.L0\+0x1ecd>, 14,SP
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132: 00
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12f: 18 00 8e 20 movw #2000 <.L0\+0x1ecc>, 14,SP
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133: 00
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@ -26,7 +26,7 @@ Disassembly of section .text:
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0+0031 <L1\+0x28> ldaa \[257,Y\]
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0+0035 <L1\+0x2c> ldab \[32767,SP\]
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0+0039 <L1\+0x30> ldd \[32768,PC\]
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0+003d <L1\+0x34> ldd \-54,PC \{0+9 <L1>\}
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0+003d <L1\+0x34> ldd \-55,PC \{0+9 <L1>\}
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0+0040 <L1\+0x37> std A,X
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0+0042 <L1\+0x39> ldx B,X
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0+0044 <L1\+0x3b> stx D,Y
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@ -101,13 +101,13 @@ Disassembly of section .text:
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0+00ff <t2\+0xa> leas 10240,Y
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0+0103 <t2\+0xe> leas -16,PC \{0+f5 <t2>\}
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0+0105 <t2\+0x10> leas 15,PC \{0+116 <t2\+0x21>\}
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0+0107 <t2\+0x12> leas -256,PC \{0+9 <L1>\}
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0+010a <t2\+0x15> leas 255,PC \{0+20b <max9b\+0x10c>\}
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0+010d <t2\+0x18> movb #23, 0+2345 <max9b\+0x2246>
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0+0112 <t2\+0x1d> movb #40, 12,SP
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0+0116 <t2\+0x21> movb #39, 3,\+SP
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0+011a <t2\+0x25> movb #20, 14,SP
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0+011e <t2\+0x29> movw #0+3210 <bb\+0xa10>, 0+3456 <bb\+0xc56>
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0+0124 <t2\+0x2f> movw #0+4040 <bb\+0x1840>, 12,SP
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0+0129 <t2\+0x34> movw #0+3900 <bb\+0x1100>, 3,\+SP
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0+012e <t2\+0x39> movw #0+2000 <max9b\+0x1f01>, 14,SP
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0+0107 <t2\+0x12> leas -256,PC \{0+b <L1\+0x2>\}
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0+010b <t2\+0x16> leas 255,PC \{0+20d <max9b\+0x10e>\}
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0+010e <t2\+0x19> movb #23, 0+2345 <max9b\+0x2246>
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0+0113 <t2\+0x1e> movb #40, 12,SP
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0+0117 <t2\+0x22> movb #39, 3,\+SP
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0+011b <t2\+0x26> movb #20, 14,SP
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0+011f <t2\+0x2a> movw #0+3210 <bb\+0xa10>, 0+3456 <bb\+0xc56>
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0+0125 <t2\+0x30> movw #0+4040 <bb\+0x1840>, 12,SP
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0+012a <t2\+0x35> movw #0+3900 <bb\+0x1100>, 3,\+SP
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0+012f <t2\+0x3a> movw #0+2000 <max9b\+0x1f01>, 14,SP
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