include/opcode/
* mips.h (CPU_RM7000): New macro. (OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns. bfd/ * archures.c (bfd_mach_mips7000): New. * bfd-in2.h: Regenerated. * cpu-mips.c (arch_info_struct): Add an entry for mips:7000. * elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000. (mips_mach_extensions): Add an entry for it. opcodes/ * mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries. gas/ * config/tc-mips.c (hilo_interlocks): True for CPU_RM7000. (mips_cpu_info_table): Add rm7000 and rm9000 entries. gas/testsuite/ * gas/mips/rm7000.[sd]: New test. * gas/mips/mips.exp: Run it.
This commit is contained in:
Richard Sandiford
parent
ec178e1bbb
commit
5a7ea74950
15 changed files with 62 additions and 1 deletions
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@ -1,3 +1,11 @@
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2003-07-15 Richard Sandiford <rsandifo@redhat.com>
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* archures.c (bfd_mach_mips7000): New.
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* bfd-in2.h: Regenerated.
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* cpu-mips.c (arch_info_struct): Add an entry for mips:7000.
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* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000.
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(mips_mach_extensions): Add an entry for it.
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2003-07-14 Nick Clifton <nickc@redhat.com>
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* po/tr.po: Update with latest version.
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@ -138,6 +138,7 @@ DESCRIPTION
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.#define bfd_mach_mips5400 5400
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.#define bfd_mach_mips5500 5500
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.#define bfd_mach_mips6000 6000
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.#define bfd_mach_mips7000 7000
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.#define bfd_mach_mips8000 8000
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.#define bfd_mach_mips10000 10000
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.#define bfd_mach_mips12000 12000
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@ -1568,6 +1568,7 @@ enum bfd_architecture
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#define bfd_mach_mips5400 5400
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#define bfd_mach_mips5500 5500
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#define bfd_mach_mips6000 6000
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#define bfd_mach_mips7000 7000
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#define bfd_mach_mips8000 8000
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#define bfd_mach_mips10000 10000
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#define bfd_mach_mips12000 12000
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@ -76,6 +76,7 @@ enum
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I_mips5400,
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I_mips5500,
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I_mips6000,
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I_mips7000,
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I_mips8000,
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I_mips10000,
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I_mips12000,
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@ -106,6 +107,7 @@ static const bfd_arch_info_type arch_info_struct[] =
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N (64, 64, bfd_mach_mips5400, "mips:5400", FALSE, NN(I_mips5400)),
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N (64, 64, bfd_mach_mips5500, "mips:5500", FALSE, NN(I_mips5500)),
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N (32, 32, bfd_mach_mips6000, "mips:6000", FALSE, NN(I_mips6000)),
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N (64, 64, bfd_mach_mips7000, "mips:7000", FALSE, NN(I_mips7000)),
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N (64, 64, bfd_mach_mips8000, "mips:8000", FALSE, NN(I_mips8000)),
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N (64, 64, bfd_mach_mips10000,"mips:10000", FALSE, NN(I_mips10000)),
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N (64, 64, bfd_mach_mips12000,"mips:12000", FALSE, NN(I_mips12000)),
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@ -7163,6 +7163,7 @@ mips_set_isa_flags (abfd)
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break;
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case bfd_mach_mips5000:
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case bfd_mach_mips7000:
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case bfd_mach_mips8000:
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case bfd_mach_mips10000:
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case bfd_mach_mips12000:
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@ -8945,6 +8946,7 @@ static const struct mips_mach_extension mips_mach_extensions[] = {
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{ bfd_mach_mips5, bfd_mach_mips8000 },
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{ bfd_mach_mips10000, bfd_mach_mips8000 },
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{ bfd_mach_mips5000, bfd_mach_mips8000 },
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{ bfd_mach_mips7000, bfd_mach_mips8000 },
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/* VR4100 extensions. */
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{ bfd_mach_mips4120, bfd_mach_mips4100 },
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@ -1,3 +1,8 @@
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2003-07-15 Richard Sandiford <rsandifo@redhat.com>
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* config/tc-mips.c (hilo_interlocks): True for CPU_RM7000.
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(mips_cpu_info_table): Add rm7000 and rm9000 entries.
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2003-07-15 Alan Modra <amodra@bigpond.net.au>
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* config/tc-v850.c (md_assemble): When no reloc, create pcrel fixups
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@ -336,6 +336,7 @@ static int mips_32bitmode = 0;
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#define hilo_interlocks (mips_opts.arch == CPU_R4010 \
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|| mips_opts.arch == CPU_VR5500 \
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|| mips_opts.arch == CPU_RM7000 \
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|| mips_opts.arch == CPU_SB1 \
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)
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@ -14289,7 +14290,8 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
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{ "rm5231", 0, ISA_MIPS4, CPU_R5000 },
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{ "rm5261", 0, ISA_MIPS4, CPU_R5000 },
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{ "rm5721", 0, ISA_MIPS4, CPU_R5000 },
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{ "r7000", 0, ISA_MIPS4, CPU_R5000 },
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{ "rm7000", 0, ISA_MIPS4, CPU_RM7000 },
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{ "rm9000", 0, ISA_MIPS4, CPU_RM7000 },
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/* MIPS 32 */
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{ "4kc", 0, ISA_MIPS32, CPU_MIPS32 },
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@ -1,3 +1,8 @@
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2003-07-15 Richard Sandiford <rsandifo@redhat.com>
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* gas/mips/rm7000.[sd]: New test.
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* gas/mips/mips.exp: Run it.
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2003-07-10 Jakub Jelinek <jakub@redhat.com>
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* gas/cfi/cfi-ppc-1.s: New test.
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@ -552,6 +552,7 @@ if { [istarget mips*-*-*] } then {
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run_dump_test "vr4122"
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run_dump_test "vr5400"
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run_dump_test "vr5500"
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run_dump_test "rm7000"
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run_dump_test "perfcount"
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run_dump_test "lineno"
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run_dump_test "sync"
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14
gas/testsuite/gas/mips/rm7000.d
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14
gas/testsuite/gas/mips/rm7000.d
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@ -0,0 +1,14 @@
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#objdump: -dr -M gpr-names=numeric -m mips:7000
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#name: MIPS RM7000
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#as: -march=rm7000
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.*: +file format .*mips.*
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Disassembly of section \.text:
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0+000 <\.text>:
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* 0: 70a62002 * mul \$4,\$5,\$6
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* 4: 70850000 * mad \$4,\$5
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* 8: 70a60001 * madu \$5,\$6
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* c: 00003812 * mflo \$7
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*10: 01000011 * mthi \$8
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5
gas/testsuite/gas/mips/rm7000.s
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5
gas/testsuite/gas/mips/rm7000.s
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@ -0,0 +1,5 @@
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mul $4,$5,$6
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mad $4,$5
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madu $5,$6
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mflo $7
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mthi $8 # No delay needed
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@ -1,3 +1,8 @@
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2003-07-15 Richard Sandiford <rsandifo@redhat.com>
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* mips.h (CPU_RM7000): New macro.
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(OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.
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2003-07-09 Alexandre Oliva <aoliva@redhat.com>
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2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
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@ -451,6 +451,7 @@ struct mips_opcode
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#define CPU_VR5400 5400
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#define CPU_VR5500 5500
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#define CPU_R6000 6000
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#define CPU_RM7000 7000
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#define CPU_R8000 8000
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#define CPU_R10000 10000
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#define CPU_R12000 12000
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@ -469,6 +470,7 @@ struct mips_opcode
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#define OPCODE_IS_MEMBER(insn, isa, cpu) \
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(((insn)->membership & isa) != 0 \
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|| (cpu == CPU_R4650 && ((insn)->membership & INSN_4650) != 0) \
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|| (cpu == CPU_RM7000 && ((insn)->membership & INSN_4650) != 0) \
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|| (cpu == CPU_R4010 && ((insn)->membership & INSN_4010) != 0) \
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|| (cpu == CPU_VR4100 && ((insn)->membership & INSN_4100) != 0) \
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|| (cpu == CPU_R3900 && ((insn)->membership & INSN_3900) != 0) \
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@ -1,3 +1,7 @@
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2003-07-15 Richard Sandiford <rsandifo@redhat.com>
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* mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.
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2003-07-14 Nick Clifton <nickc@redhat.com>
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* po/tr.po: Update with latest version.
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@ -347,6 +347,10 @@ const struct mips_arch_choice mips_arch_choices[] = {
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mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
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{ "r6000", 1, bfd_mach_mips6000, CPU_R6000, ISA_MIPS2,
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mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
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{ "rm7000", 1, bfd_mach_mips7000, CPU_RM7000, ISA_MIPS4,
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mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
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{ "rm9000", 1, bfd_mach_mips7000, CPU_RM7000, ISA_MIPS4,
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mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
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{ "r8000", 1, bfd_mach_mips8000, CPU_R8000, ISA_MIPS4,
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mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
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{ "r10000", 1, bfd_mach_mips10000, CPU_R10000, ISA_MIPS4,
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