PR gas/12715
* gas/config/tc-arm.c (parse_big_immediate): Fix parsing of 64-bit immediates on 32-bit hosts. * gas/testsuite/gas/arm/neon-const.s: Add testcase for 64-bit Neon constants. * gas/testsuite/gas/arm/neon-const.d: Likewise.
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d248b706a3
commit
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5 changed files with 16 additions and 1 deletions
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@ -1,3 +1,9 @@
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2011-05-12 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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PR gas/12715
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* config/tc-arm.c (parse_big_immediate): Fix parsing of 64-bit
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immediates on 32-bit hosts.
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2011-05-10 Quentin Neill <quentin.neill@amd.com>
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2011-05-10 Quentin Neill <quentin.neill@amd.com>
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* config/tc-i386.c (cpu_arch): Add bdver2 and rename
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* config/tc-i386.c (cpu_arch): Add bdver2 and rename
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@ -4459,7 +4459,7 @@ parse_big_immediate (char **str, int i)
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/* If we're on a 64-bit host, then a 64-bit number can be returned using
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/* If we're on a 64-bit host, then a 64-bit number can be returned using
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O_constant. We have to be careful not to break compilation for
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O_constant. We have to be careful not to break compilation for
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32-bit X_add_number, though. */
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32-bit X_add_number, though. */
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if ((exp.X_add_number & ~0xffffffffl) != 0)
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if ((exp.X_add_number & ~(offsetT)(0xffffffffU)) != 0)
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{
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{
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/* X >> 32 is illegal if sizeof (exp.X_add_number) == 4. */
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/* X >> 32 is illegal if sizeof (exp.X_add_number) == 4. */
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inst.operands[i].reg = ((exp.X_add_number >> 16) >> 16) & 0xffffffff;
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inst.operands[i].reg = ((exp.X_add_number >> 16) >> 16) & 0xffffffff;
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@ -1,3 +1,9 @@
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2011-05-12 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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PR gas/12715
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* gas/arm/neon-const.s: Add testcase for 64-bit Neon constants.
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* gas/arm/neon-const.d: Likewise.
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2011-05-11 Richard Sandiford <rdsandiford@googlemail.com>
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2011-05-11 Richard Sandiford <rdsandiford@googlemail.com>
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* gas/mips/24k-branch-delay-1.d: Allow 64-bit addresses. Stub out
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* gas/mips/24k-branch-delay-1.d: Allow 64-bit addresses. Stub out
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@ -263,3 +263,4 @@ Disassembly of section .text:
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0[0-9a-f]+ <[^>]+> f3850f5f vmov\.f32 q0, #-0\.484375 ; 0xbef80000
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0[0-9a-f]+ <[^>]+> f3850f5f vmov\.f32 q0, #-0\.484375 ; 0xbef80000
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0[0-9a-f]+ <[^>]+> f3860f5f vmov\.f32 q0, #-0\.96875 ; 0xbf780000
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0[0-9a-f]+ <[^>]+> f3860f5f vmov\.f32 q0, #-0\.96875 ; 0xbf780000
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0[0-9a-f]+ <[^>]+> f3870f5f vmov\.f32 q0, #-1\.9375 ; 0xbff80000
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0[0-9a-f]+ <[^>]+> f3870f5f vmov\.f32 q0, #-1\.9375 ; 0xbff80000
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0[0-9a-f]+ <[^>]+> f3879e3f vmov\.i64 d9, #0xffffffffffffffff
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@ -295,3 +295,5 @@
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vmov.f32 q0, -0.484375
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vmov.f32 q0, -0.484375
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vmov.f32 q0, -0.96875
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vmov.f32 q0, -0.96875
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vmov.f32 q0, -1.9375
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vmov.f32 q0, -1.9375
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vmov.i64 d9, #0xffffffffffffffff
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