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Fix parameters passed to CPRead[13] and CPRead[14].

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This commit is contained in:
Nick Clifton 2002-01-10 11:14:57 +00:00
parent db60ec6263
commit 57165fb4bb
4 changed files with 476 additions and 421 deletions
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8
sim/arm/ChangeLog
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@ -1,3 +1,11 @@
2002-01-10 Nick Clifton <nickc@cambridge.redhat.com>
* arminit.c (ARMul_Abort): Fix parameters passed to CPRead[13].
* armemu.c (ARMul_Emulate32): Fix parameters passed to CPRead[13]
and CPRead[14].
Fix formatting. Improve layout.
* armemu.h: Fix formatting. Improve layout.
2002-01-09 Nick Clifton <nickc@cambridge.redhat.com> 2002-01-09 Nick Clifton <nickc@cambridge.redhat.com>
* wrapper.c (sim_fetch_register): If fetching more than 4 bytes * wrapper.c (sim_fetch_register): If fetching more than 4 bytes

688
sim/arm/armemu.c
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File diff suppressed because it is too large Load diff

37
sim/arm/armemu.h
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@ -376,22 +376,38 @@ extern ARMword isize;
#define ROTATER(n, b) (((n) >> (b)) | ((n) << (32 - (b)))) #define ROTATER(n, b) (((n) >> (b)) | ((n) << (32 - (b))))
/* Macros to store results of instructions. */ /* Macros to store results of instructions. */
#define WRITEDEST(d) if (DESTReg == 15) \ #define WRITEDEST(d) \
do \
{ \
if (DESTReg == 15) \
WriteR15 (state, d); \ WriteR15 (state, d); \
else \ else \
DEST = d DEST = d; \
} \
while (0)
#define WRITESDEST(d) if (DESTReg == 15) \ #define WRITESDEST(d) \
do \
{ \
if (DESTReg == 15) \
WriteSR15 (state, d); \ WriteSR15 (state, d); \
else { \ else \
{ \
DEST = d; \ DEST = d; \
ARMul_NegZero (state, d); \ ARMul_NegZero (state, d); \
} } \
} \
while (0)
#define WRITEDESTB(d) if (DESTReg == 15) \ #define WRITEDESTB(d) \
do \
{ \
if (DESTReg == 15) \
WriteR15Branch (state, d); \ WriteR15Branch (state, d); \
else \ else \
DEST = d DEST = d; \
} \
while (0)
#define BYTETOBUS(data) ((data & 0xff) | \ #define BYTETOBUS(data) ((data & 0xff) | \
((data & 0xff) << 8) | \ ((data & 0xff) << 8) | \
@ -399,10 +415,14 @@ extern ARMword isize;
((data & 0xff) << 24)) ((data & 0xff) << 24))
#define BUSTOBYTE(address, data) \ #define BUSTOBYTE(address, data) \
do \
{ \
if (state->bigendSig) \ if (state->bigendSig) \
temp = (data >> (((address ^ 3) & 3) << 3)) & 0xff; \ temp = (data >> (((address ^ 3) & 3) << 3)) & 0xff; \
else \ else \
temp = (data >> ((address & 3) << 3)) & 0xff temp = (data >> ((address & 3) << 3)) & 0xff; \
} \
while (0)
#define LOADMULT(instr, address, wb) LoadMult (state, instr, address, wb) #define LOADMULT(instr, address, wb) LoadMult (state, instr, address, wb)
#define LOADSMULT(instr, address, wb) LoadSMult (state, instr, address, wb) #define LOADSMULT(instr, address, wb) LoadSMult (state, instr, address, wb)
@ -414,7 +434,6 @@ extern ARMword isize;
/* Values for Emulate. */ /* Values for Emulate. */
#define STOP 0 /* stop */ #define STOP 0 /* stop */
#define CHANGEMODE 1 /* change mode */ #define CHANGEMODE 1 /* change mode */
#define ONCE 2 /* execute just one interation */ #define ONCE 2 /* execute just one interation */

6
sim/arm/arminit.c
View file

@ -303,12 +303,14 @@ ARMul_Abort (ARMul_State * state, ARMword vector)
break; break;
case ARMul_IRQV: /* IRQ */ case ARMul_IRQV: /* IRQ */
if ( ! state->is_XScale if ( ! state->is_XScale
|| (state->CPRead[13](state, 0, 0) & ARMul_CP13_R0_IRQ)) || ! state->CPRead[13] (state, 0, & temp)
|| (temp & ARMul_CP13_R0_IRQ))
SETABORT (IBIT, state->prog32Sig ? IRQ32MODE : IRQ26MODE, esize); SETABORT (IBIT, state->prog32Sig ? IRQ32MODE : IRQ26MODE, esize);
break; break;
case ARMul_FIQV: /* FIQ */ case ARMul_FIQV: /* FIQ */
if ( ! state->is_XScale if ( ! state->is_XScale
|| (state->CPRead[13](state, 0, 0) & ARMul_CP13_R0_FIQ)) || ! state->CPRead[13] (state, 0, & temp)
|| (temp & ARMul_CP13_R0_FIQ))
SETABORT (INTBITS, state->prog32Sig ? FIQ32MODE : FIQ26MODE, esize); SETABORT (INTBITS, state->prog32Sig ? FIQ32MODE : FIQ26MODE, esize);
break; break;
} }