From 5703197e0421f490c3dc25ecd9ea04ca59750b64 Mon Sep 17 00:00:00 2001 From: Trevor Saunders Date: Thu, 21 Apr 2016 09:56:50 -0400 Subject: [PATCH] remove a few sentinals gas/ChangeLog: 2016-06-25 Trevor Saunders * config/tc-bfin.c (bfin_cpus): Remove sentinal. (md_parse_option): Adjust. * config/tc-aarch64.c (aarch64_parse_abi): Replace use of a sentinal with iteration from 0 to ARRAY_SIZE. * config/tc-mcore.c (md_begin): Likewise. * config/tc-visium.c (visium_parse_arch): Likewise. opcodes/ChangeLog: 2016-06-25 Trevor Saunders * mcore-opc.h: Remove sentinal. * mcore-dis.c (print_insn_mcore): Adjust. --- gas/ChangeLog | 9 +++++++++ gas/config/tc-aarch64.c | 12 +++++------- gas/config/tc-bfin.c | 24 ++++++++++++------------ gas/config/tc-mcore.c | 10 +++++----- gas/config/tc-visium.c | 10 ++++------ opcodes/ChangeLog | 5 +++++ opcodes/mcore-dis.c | 15 ++++++++------- opcodes/mcore-opc.h | 1 - 8 files changed, 48 insertions(+), 38 deletions(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index 91299abfb0..8df0d8f76e 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,12 @@ +2016-06-25 Trevor Saunders + + * config/tc-bfin.c (bfin_cpus): Remove sentinal. + (md_parse_option): Adjust. + * config/tc-aarch64.c (aarch64_parse_abi): Replace use of a sentinal + with iteration from 0 to ARRAY_SIZE. + * config/tc-mcore.c (md_begin): Likewise. + * config/tc-visium.c (visium_parse_arch): Likewise. + 2016-06-25 Trevor Saunders * config/tc-tic54x.c (tic54x_set_default_include): remove argument diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 4dac7532b6..3bc657ae04 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -7989,25 +7989,23 @@ struct aarch64_option_abi_value_table static const struct aarch64_option_abi_value_table aarch64_abis[] = { {"ilp32", AARCH64_ABI_ILP32}, {"lp64", AARCH64_ABI_LP64}, - {NULL, 0} }; static int aarch64_parse_abi (const char *str) { - const struct aarch64_option_abi_value_table *opt; - size_t optlen = strlen (str); + unsigned int i; - if (optlen == 0) + if (str[0] == '\0') { as_bad (_("missing abi name `%s'"), str); return 0; } - for (opt = aarch64_abis; opt->name != NULL; opt++) - if (strlen (opt->name) == optlen && strncmp (str, opt->name, optlen) == 0) + for (i = 0; i < ARRAY_SIZE (aarch64_abis); i++) + if (strcmp (str, aarch64_abis[i].name) == 0) { - aarch64_abi = opt->value; + aarch64_abi = aarch64_abis[i].value; return 1; } diff --git a/gas/config/tc-bfin.c b/gas/config/tc-bfin.c index 8958c7e795..334dce47c0 100644 --- a/gas/config/tc-bfin.c +++ b/gas/config/tc-bfin.c @@ -324,8 +324,6 @@ struct bfin_cpu bfin_cpus[] = {"bf592", BFIN_CPU_BF592, 0x0001, AC_05000074}, {"bf592", BFIN_CPU_BF592, 0x0000, AC_05000074}, - - {NULL, 0, 0, 0} }; /* Define bfin-specific command-line options (there are none). */ @@ -357,23 +355,22 @@ md_parse_option (int c ATTRIBUTE_UNUSED, const char *arg ATTRIBUTE_UNUSED) case OPTION_MCPU: { - const char *p, *q; - int i; + const char *q; + unsigned int i; - i = 0; - while ((p = bfin_cpus[i].name) != NULL) + for (i = 0; i < ARRAY_SIZE (bfin_cpus); i++) { + const char *p = bfin_cpus[i].name; if (strncmp (arg, p, strlen (p)) == 0) break; - i++; } - if (p == NULL) + if (i == ARRAY_SIZE (bfin_cpus)) as_fatal ("-mcpu=%s is not valid", arg); bfin_cpu_type = bfin_cpus[i].type; - q = arg + strlen (p); + q = arg + strlen (bfin_cpus[i].name); if (*q == '\0') { @@ -385,7 +382,8 @@ md_parse_option (int c ATTRIBUTE_UNUSED, const char *arg ATTRIBUTE_UNUSED) else if (strcmp (q, "-any") == 0) { bfin_si_revision = 0xffff; - while (bfin_cpus[i].type == bfin_cpu_type) + while (i < ARRAY_SIZE (bfin_cpus) + && bfin_cpus[i].type == bfin_cpu_type) { bfin_anomaly_checks |= bfin_cpus[i].anomaly_checks; i++; @@ -408,11 +406,13 @@ md_parse_option (int c ATTRIBUTE_UNUSED, const char *arg ATTRIBUTE_UNUSED) bfin_si_revision = (si_major << 8) | si_minor; - while (bfin_cpus[i].type == bfin_cpu_type + while (i < ARRAY_SIZE (bfin_cpus) + && bfin_cpus[i].type == bfin_cpu_type && bfin_cpus[i].si_revision != bfin_si_revision) i++; - if (bfin_cpus[i].type != bfin_cpu_type) + if (i == ARRAY_SIZE (bfin_cpus) + || bfin_cpus[i].type != bfin_cpu_type) goto invalid_silicon_revision; bfin_anomaly_checks |= bfin_cpus[i].anomaly_checks; diff --git a/gas/config/tc-mcore.c b/gas/config/tc-mcore.c index 9c80388e42..468a01b3f3 100644 --- a/gas/config/tc-mcore.c +++ b/gas/config/tc-mcore.c @@ -454,18 +454,18 @@ const pseudo_typeS md_pseudo_table[] = void md_begin (void) { - const mcore_opcode_info * opcode; const char * prev_name = ""; + unsigned int i; opcode_hash_control = hash_new (); /* Insert unique names into hash table. */ - for (opcode = mcore_table; opcode->name; opcode ++) + for (i = 0; i < ARRAY_SIZE (mcore_table); i++) { - if (! streq (prev_name, opcode->name)) + if (! streq (prev_name, mcore_table[i].name)) { - prev_name = opcode->name; - hash_insert (opcode_hash_control, opcode->name, (char *) opcode); + prev_name = mcore_table[i].name; + hash_insert (opcode_hash_control, mcore_table[i].name, (char *) &mcore_table[i]); } } } diff --git a/gas/config/tc-visium.c b/gas/config/tc-visium.c index 7f00cbf5a7..05e161615a 100644 --- a/gas/config/tc-visium.c +++ b/gas/config/tc-visium.c @@ -275,7 +275,6 @@ static struct visium_arch_option_table visium_archs[] = {"mcm", VISIUM_ARCH_MCM}, {"gr5", VISIUM_ARCH_MCM}, {"gr6", VISIUM_ARCH_GR6}, - {NULL, 0} }; struct visium_long_option_table @@ -289,7 +288,7 @@ struct visium_long_option_table static int visium_parse_arch (const char *str) { - struct visium_arch_option_table *opt; + unsigned int i; if (strlen (str) == 0) { @@ -297,11 +296,10 @@ visium_parse_arch (const char *str) return 0; } - - for (opt = visium_archs; opt->name != NULL; opt++) - if (strcmp (opt->name, str) == 0) + for (i = 0; i < ARRAY_SIZE (visium_archs); i++) + if (strcmp (visium_archs[i].name, str) == 0) { - visium_arch = opt->value; + visium_arch = visium_archs[i].value; return 1; } diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index c9cf9ed1b7..fd597866da 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2016-06-25 Trevor Saunders + + * mcore-opc.h: Remove sentinal. + * mcore-dis.c (print_insn_mcore): Adjust. + 2016-06-23 Graham Markall * arc-opc.c: Correct description of availability of NPS400 diff --git a/opcodes/mcore-dis.c b/opcodes/mcore-dis.c index d3deb3541d..887d0129ce 100644 --- a/opcodes/mcore-dis.c +++ b/opcodes/mcore-dis.c @@ -20,6 +20,7 @@ #include "sysdep.h" #include +#include "libiberty.h" #define STATIC_TABLE #define DEFINE_TABLE @@ -95,7 +96,7 @@ print_insn_mcore (bfd_vma memaddr, fprintf_ftype print_func = info->fprintf_func; void *stream = info->stream; unsigned short inst; - const mcore_opcode_info *op; + unsigned int i; int status; info->bytes_per_chunk = 2; @@ -116,19 +117,19 @@ print_insn_mcore (bfd_vma memaddr, abort (); /* Just a linear search of the table. */ - for (op = mcore_table; op->name != 0; op++) - if (op->inst == (inst & imsk[op->opclass])) + for (i = 0; i < ARRAY_SIZE (mcore_table); i++) + if (mcore_table[i].inst == (inst & imsk[mcore_table[i].opclass])) break; - if (op->name == 0) + if (i == ARRAY_SIZE (mcore_table)) (*print_func) (stream, ".short 0x%04x", inst); else { const char *name = grname[inst & 0x0F]; - (*print_func) (stream, "%s", op->name); + (*print_func) (stream, "%s", mcore_table[i].name); - switch (op->opclass) + switch (mcore_table[i].opclass) { case O0: break; @@ -202,7 +203,7 @@ print_insn_mcore (bfd_vma memaddr, (*print_func) (stream, "\t0x%lx", (long)(memaddr + 2 + (val << 1))); - if (strcmp (op->name, "bsr") == 0) + if (strcmp (mcore_table[i].name, "bsr") == 0) { /* For bsr, we'll try to get a symbol for the target. */ val = memaddr + 2 + (val << 1); diff --git a/opcodes/mcore-opc.h b/opcodes/mcore-opc.h index 24c3f8888b..ad66e7bb2d 100644 --- a/opcodes/mcore-opc.h +++ b/opcodes/mcore-opc.h @@ -206,6 +206,5 @@ const mcore_opcode_info mcore_table[] = { "rori", RSI, 0, 0x3800 }, { "rotri", RSI, 0, 0x3800 }, { "nop", O0, 0, 0x1200 }, /* mov r0, r0 */ - { 0, 0, 0, 0 } }; #endif