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2003-11-16 Andrew Cagney <cagney@redhat.com>

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* mips-tdep.c (struct gdbarch_tdep): Add field "regnum".
	(mips_fpa0_regnum, mips_regnum): New function.
	(mips_gdbarch_init): Fill in the "regnum" fields.
	* mips-tdep.h (struct mips_regnum): Define.
	(mips_regnum): Declare.
	* config/mips/tm-mips.h (BADVADDR_REGNUM): Delete macro.
	(LO_REGNUM, HI_REGNUM, BADVADDR_REGNUM): Ditto.
	(CAUSE_REGNUM, PC_REGNUM, FP0_REGNUM): Ditto.
	(FCRCS_REGNUM, FCRIR_REGNUM, FPA0_REGNUM): Ditto.
	* config/mips/tm-irix6.h (FP0_REGNUM): Delete macro.
	(PC_REGNUM, CAUSE_REGNUM, BADVADDR_REGNUM): Ditto.
	(HI_REGNUM, LO_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): Ditto.
	* config/mips/tm-irix5.h (FP0_REGNUM): Delete macro.
	(PC_REGNUM, CAUSE_REGNUM, BADVADDR_REGNUM): Ditto.
	(HI_REGNUM, LO_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): Ditto.
	* remote-mips.c: Include "mips-tdep.h".  Update.
	* mipsnbsd-tdep.c: Update.
	* mipsv4-nat.c: Update.
	* mips-tdep.c: Update.
	* mips-nat.c: Update.
	* mips-linux-tdep.c: Update.
	* mips-linux-nat.c: Update.
	* irix5-nat.c: Update.
	* dve3900-rom.c: Include "mips-tdep.h".  Update.
	(ignore_packet): Supress GCC warning.
	* config/mips/nm-riscos.h: Update.
	* Makefile.in (dve3900-rom.o, remote-mips.o): Update dependencies.
This commit is contained in:
Andrew Cagney 2003-11-16 19:24:05 +00:00
parent 719ec22109
commit 56cea62382
17 changed files with 407 additions and 384 deletions
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30
gdb/ChangeLog
View file

@ -1,3 +1,32 @@
2003-11-16 Andrew Cagney <cagney@redhat.com>
* mips-tdep.c (struct gdbarch_tdep): Add field "regnum".
(mips_fpa0_regnum, mips_regnum): New function.
(mips_gdbarch_init): Fill in the "regnum" fields.
* mips-tdep.h (struct mips_regnum): Define.
(mips_regnum): Declare.
* config/mips/tm-mips.h (BADVADDR_REGNUM): Delete macro.
(LO_REGNUM, HI_REGNUM, BADVADDR_REGNUM): Ditto.
(CAUSE_REGNUM, PC_REGNUM, FP0_REGNUM): Ditto.
(FCRCS_REGNUM, FCRIR_REGNUM, FPA0_REGNUM): Ditto.
* config/mips/tm-irix6.h (FP0_REGNUM): Delete macro.
(PC_REGNUM, CAUSE_REGNUM, BADVADDR_REGNUM): Ditto.
(HI_REGNUM, LO_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): Ditto.
* config/mips/tm-irix5.h (FP0_REGNUM): Delete macro.
(PC_REGNUM, CAUSE_REGNUM, BADVADDR_REGNUM): Ditto.
(HI_REGNUM, LO_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): Ditto.
* remote-mips.c: Include "mips-tdep.h". Update.
* mipsnbsd-tdep.c: Update.
* mipsv4-nat.c: Update.
* mips-tdep.c: Update.
* mips-nat.c: Update.
* mips-linux-tdep.c: Update.
* mips-linux-nat.c: Update.
* irix5-nat.c: Update.
* dve3900-rom.c: Include "mips-tdep.h". Update.
(ignore_packet): Supress GCC warning.
* config/mips/nm-riscos.h: Update.
2003-11-16 Andrew Cagney <cagney@redhat.com>
* mips-tdep.c: Replace DEPRECATED_REGISTER_RAW_SIZE with
@ -13,6 +42,7 @@
(_initialize_mips_tdep): Use "add_setshow_cmd" when adding the
"set remote-mips64-transfers-32bit-regs" command. Specify
set_mips64_transfers_32bit_regs as the set function.
* Makefile.in (dve3900-rom.o, remote-mips.o): Update dependencies.
2003-11-16 Mark Kettenis <kettenis@gnu.org>

5
gdb/Makefile.in
View file

@ -1726,7 +1726,8 @@ dummy-frame.o: dummy-frame.c $(defs_h) $(dummy_frame_h) $(regcache_h) \
$(frame_h) $(inferior_h) $(gdb_assert_h) $(frame_unwind_h) \
$(command_h) $(gdbcmd_h)
dve3900-rom.o: dve3900-rom.c $(defs_h) $(gdbcore_h) $(target_h) $(monitor_h) \
$(serial_h) $(inferior_h) $(command_h) $(gdb_string_h) $(regcache_h)
$(serial_h) $(inferior_h) $(command_h) $(gdb_string_h) $(regcache_h) \
$(mips_tdep_h)
dwarf2expr.o: dwarf2expr.c $(defs_h) $(symtab_h) $(gdbtypes_h) $(value_h) \
$(gdbcore_h) $(elf_dwarf2_h) $(dwarf2expr_h)
dwarf2-frame.o: dwarf2-frame.c $(defs_h) $(dwarf2expr_h) $(elf_dwarf2_h) \
@ -2194,7 +2195,7 @@ remote-m32r-sdi.o: remote-m32r-sdi.c $(defs_h) $(gdbcmd_h) $(gdbcore_h) \
$(inferior_h) $(target_h) $(regcache_h) $(gdb_string_h) $(serial_h)
remote-mips.o: remote-mips.c $(defs_h) $(inferior_h) $(bfd_h) $(symfile_h) \
$(gdbcmd_h) $(gdbcore_h) $(serial_h) $(target_h) $(remote_utils_h) \
$(gdb_string_h) $(gdb_stat_h) $(regcache_h)
$(gdb_string_h) $(gdb_stat_h) $(regcache_h) $(mips_tdep_h)
remote-rdi.o: remote-rdi.c $(defs_h) $(gdb_string_h) $(frame_h) \
$(inferior_h) $(bfd_h) $(symfile_h) $(target_h) $(gdbcmd_h) \
$(objfiles_h) $(gdb_stabs_h) $(gdbthread_h) $(gdbcore_h) \

16
gdb/config/mips/nm-riscos.h
View file

@ -35,21 +35,21 @@
addr = PCB_OFFSET(pcb_fpregs[0]) + 4*(regno-FP0_REGNUM); \
else if (regno == PS_REGNUM) \
addr = UPAGES*NBPG-EF_SIZE+4*EF_SR; \
else if (regno == BADVADDR_REGNUM) \
else if (regno == mips_regnum (current_gdbarch)->badvaddr) \
addr = UPAGES*NBPG-EF_SIZE+4*EF_BADVADDR; \
else if (regno == LO_REGNUM) \
else if (regno == mips_regnum (current_gdbarch)->lo) \
addr = UPAGES*NBPG-EF_SIZE+4*EF_MDLO; \
else if (regno == HI_REGNUM) \
else if (regno == mips_regnum (current_gdbarch)->hi) \
addr = UPAGES*NBPG-EF_SIZE+4*EF_MDHI; \
else if (regno == CAUSE_REGNUM) \
else if (regno == mips_regnum (current_gdbarch)->cause) \
addr = UPAGES*NBPG-EF_SIZE+4*EF_CAUSE; \
else if (regno == PC_REGNUM) \
else if (regno == mips_regnum (current_gdbarch)->pc) \
addr = UPAGES*NBPG-EF_SIZE+4*EF_EPC; \
else if (regno < FCRCS_REGNUM) \
else if (regno < mips_regnum (current_gdbarch)->fp_control_status) \
addr = PCB_OFFSET(pcb_fpregs[0]) + 4*(regno-FP0_REGNUM); \
else if (regno == FCRCS_REGNUM) \
else if (regno == mips_regnum (current_gdbarch)->fp_control_status) \
addr = PCB_OFFSET(pcb_fpc_csr); \
else if (regno == FCRIR_REGNUM) \
else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision) \
addr = PCB_OFFSET(pcb_fpc_eir); \
else \
addr = 0;

24
gdb/config/mips/tm-irix5.h
View file

@ -24,14 +24,6 @@
/* Redefine register numbers for SGI. */
#undef MIPS_REGISTER_NAMES
#undef FP0_REGNUM
#undef PC_REGNUM
#undef HI_REGNUM
#undef LO_REGNUM
#undef CAUSE_REGNUM
#undef BADVADDR_REGNUM
#undef FCRCS_REGNUM
#undef FCRIR_REGNUM
/* Initializer for an array of names for registers 32 and above.
There should be NUM_REGS-32 strings in this initializer. */
@ -44,22 +36,6 @@
"pc", "cause", "bad", "hi", "lo", "fsr", "fir" \
}
/* Register numbers of various important registers.
Note that some of these values are "real" register numbers,
and correspond to the general registers of the machine,
and some are "phony" register numbers which are too large
to be actual register numbers as far as the user is concerned
but do serve to get the desired values when passed to read_register. */
#define FP0_REGNUM 32 /* Floating point register 0 (single float) */
#define PC_REGNUM 64 /* Contains program counter */
#define CAUSE_REGNUM 65 /* describes last exception */
#define BADVADDR_REGNUM 66 /* bad vaddr for addressing exception */
#define HI_REGNUM 67 /* Multiple/divide temp */
#define LO_REGNUM 68 /* ... */
#define FCRCS_REGNUM 69 /* FP control/status */
#define FCRIR_REGNUM 70 /* FP implementation/revision */
/* Offsets for register values in _sigtramp frame.
sigcontext is immediately above the _sigtramp frame on Irix. */
#define SIGFRAME_BASE 0x0

24
gdb/config/mips/tm-irix6.h
View file

@ -25,14 +25,6 @@
/* Redefine register numbers for SGI. */
#undef MIPS_REGISTER_NAMES
#undef FP0_REGNUM
#undef PC_REGNUM
#undef HI_REGNUM
#undef LO_REGNUM
#undef CAUSE_REGNUM
#undef BADVADDR_REGNUM
#undef FCRCS_REGNUM
#undef FCRIR_REGNUM
/* Initializer for an array of names for registers 32 and above.
There should be NUM_REGS-32 strings in this initializer. */
@ -45,22 +37,6 @@
"pc", "cause", "bad", "hi", "lo", "fsr", "fir" \
}
/* Register numbers of various important registers.
Note that some of these values are "real" register numbers,
and correspond to the general registers of the machine,
and some are "phony" register numbers which are too large
to be actual register numbers as far as the user is concerned
but do serve to get the desired values when passed to read_register. */
#define FP0_REGNUM 32 /* Floating point register 0 (single float) */
#define PC_REGNUM 64 /* Contains program counter */
#define CAUSE_REGNUM 65 /* describes last exception */
#define BADVADDR_REGNUM 66 /* bad vaddr for addressing exception */
#define HI_REGNUM 67 /* Multiple/divide temp */
#define LO_REGNUM 68 /* ... */
#define FCRCS_REGNUM 69 /* FP control/status */
#define FCRIR_REGNUM 70 /* FP implementation/revision */
/* The signal handler trampoline is called _sigtramp. */
#undef IN_SIGTRAMP
#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))

9
gdb/config/mips/tm-mips.h
View file

@ -75,15 +75,6 @@ extern int mips_step_skips_delay (CORE_ADDR);
#define SP_REGNUM 29 /* Contains address of top of stack */
#define RA_REGNUM 31 /* Contains return address value */
#define PS_REGNUM 32 /* Contains processor status */
#define HI_REGNUM 34 /* Multiple/divide temp */
#define LO_REGNUM 33 /* ... */
#define BADVADDR_REGNUM 35 /* bad vaddr for addressing exception */
#define CAUSE_REGNUM 36 /* describes last exception */
#define PC_REGNUM 37 /* Contains program counter */
#define FP0_REGNUM 38 /* Floating point register 0 (single float) */
#define FPA0_REGNUM (FP0_REGNUM+12) /* First float argument register */
#define FCRCS_REGNUM 70 /* FP control/status */
#define FCRIR_REGNUM 71 /* FP implementation/revision */
#define UNUSED_REGNUM 73 /* Never used, FIXME */
#define FIRST_EMBED_REGNUM 74 /* First CP0 register for embedded use */
#define PRID_REGNUM 89 /* Processor ID */

54
gdb/dve3900-rom.c
View file

@ -29,6 +29,7 @@
#include "gdb_string.h"
#include <time.h>
#include "regcache.h"
#include "mips-tdep.h"
/* Type of function passed to bfd_map_over_sections. */
@ -121,11 +122,11 @@ static char *r3900_regnames[] =
"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
"S", /* PS_REGNUM */
"l", /* LO_REGNUM */
"h", /* HI_REGNUM */
"B", /* BADVADDR_REGNUM */
"Pcause", /* CAUSE_REGNUM */
"p" /* PC_REGNUM */
"l", /* MIPS_EMBED_LO_REGNUM */
"h", /* MIPS_EMBED_HI_REGNUM */
"B", /* MIPS_EMBED_BADVADDR_REGNUM */
"Pcause", /* MIPS_EMBED_CAUSE_REGNUM */
"p" /* MIPS_EMBED_PC_REGNUM */
};
@ -267,19 +268,19 @@ reg_table[] =
}
,
{
"HI", HI_REGNUM
"HI", MIPS_EMBED_HI_REGNUM
}
,
{
"LO", LO_REGNUM
"LO", MIPS_EMBED_LO_REGNUM
}
,
{
"PC", PC_REGNUM
"PC", MIPS_EMBED_PC_REGNUM
}
,
{
"BadV", BADVADDR_REGNUM
"BadV", MIPS_EMBED_BADVADDR_REGNUM
}
,
{
@ -420,7 +421,7 @@ fetch_bad_vaddr (void)
monitor_printf ("xB\r");
monitor_expect ("BadV=", NULL, 0);
monitor_expect_prompt (buf, sizeof (buf));
monitor_supply_register (BADVADDR_REGNUM, buf);
monitor_supply_register (mips_regnum (current_gdbarch)->badvaddr, buf);
}
@ -485,21 +486,16 @@ fetch_bitmapped_register (int regno, struct bit_field *bf)
static void
r3900_fetch_registers (int regno)
{
switch (regno)
{
case BADVADDR_REGNUM:
if (regno == mips_regnum (current_gdbarch)->badvaddr)
fetch_bad_vaddr ();
return;
case PS_REGNUM:
else if (regno == PS_REGNUM)
fetch_bitmapped_register (PS_REGNUM, status_fields);
return;
case CAUSE_REGNUM:
fetch_bitmapped_register (CAUSE_REGNUM, cause_fields);
return;
default:
else if (regno == mips_regnum (current_gdbarch)->cause)
fetch_bitmapped_register (mips_regnum (current_gdbarch)->cause,
cause_fields);
else
orig_monitor_fetch_registers (regno);
}
}
/* Write the new value of the bitmapped register to the monitor. */
@ -544,18 +540,14 @@ store_bitmapped_register (int regno, struct bit_field *bf)
static void
r3900_store_registers (int regno)
{
switch (regno)
{
case PS_REGNUM:
if (regno == PS_REGNUM)
store_bitmapped_register (PS_REGNUM, status_fields);
return;
case CAUSE_REGNUM:
store_bitmapped_register (CAUSE_REGNUM, cause_fields);
return;
default:
else if (regno == mips_regnum (current_gdbarch)->cause)
store_bitmapped_register (mips_regnum (current_gdbarch)->cause,
cause_fields);
else
orig_monitor_store_registers (regno);
}
}
/* Write a 4-byte integer to the buffer in big-endian order. */
@ -648,7 +640,7 @@ debug_write (unsigned char *buf, int buflen)
static void
ignore_packet (void)
{
int c;
int c = -1;
int len;
/* Ignore lots of trash (messages about section addresses, for example)

50
gdb/irix5-nat.c
View file

@ -61,13 +61,17 @@ supply_gregset (gregset_t *gregsetp)
for (regi = 0; regi <= CTX_RA; regi++)
supply_register (regi, (char *) (regp + regi) + gregoff);
supply_register (PC_REGNUM, (char *) (regp + CTX_EPC) + gregoff);
supply_register (HI_REGNUM, (char *) (regp + CTX_MDHI) + gregoff);
supply_register (LO_REGNUM, (char *) (regp + CTX_MDLO) + gregoff);
supply_register (CAUSE_REGNUM, (char *) (regp + CTX_CAUSE) + gregoff);
supply_register (mips_regnum (current_gdbarch)->pc,
(char *) (regp + CTX_EPC) + gregoff);
supply_register (mips_regnum (current_gdbarch)->hi,
(char *) (regp + CTX_MDHI) + gregoff);
supply_register (mips_regnum (current_gdbarch)->lo,
(char *) (regp + CTX_MDLO) + gregoff);
supply_register (mips_regnum (current_gdbarch)->cause,
(char *) (regp + CTX_CAUSE) + gregoff);
/* Fill inaccessible registers with zero. */
supply_register (BADVADDR_REGNUM, zerobuf);
supply_register (mips_regnum (current_gdbarch)->badvaddr, zerobuf);
}
void
@ -88,23 +92,24 @@ fill_gregset (gregset_t *gregsetp, int regno)
if ((regno == -1) || (regno == PC_REGNUM))
*(regp + CTX_EPC) =
extract_signed_integer (&deprecated_registers[DEPRECATED_REGISTER_BYTE (PC_REGNUM)],
DEPRECATED_REGISTER_RAW_SIZE (PC_REGNUM));
extract_signed_integer (&deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->pc)],
DEPRECATED_REGISTER_RAW_SIZE (mips_regnum (current_gdbarch)->pc));
if ((regno == -1) || (regno == CAUSE_REGNUM))
if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->cause))
*(regp + CTX_CAUSE) =
extract_signed_integer (&deprecated_registers[DEPRECATED_REGISTER_BYTE (CAUSE_REGNUM)],
DEPRECATED_REGISTER_RAW_SIZE (CAUSE_REGNUM));
extract_signed_integer (&deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->cause)],
DEPRECATED_REGISTER_RAW_SIZE (mips_regnum (current_gdbarch)->cause));
if ((regno == -1) || (regno == HI_REGNUM))
if ((regno == -1)
|| (regno == mips_regnum (current_gdbarch)->hi))
*(regp + CTX_MDHI) =
extract_signed_integer (&deprecated_registers[DEPRECATED_REGISTER_BYTE (HI_REGNUM)],
DEPRECATED_REGISTER_RAW_SIZE (HI_REGNUM));
extract_signed_integer (&deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->hi)],
DEPRECATED_REGISTER_RAW_SIZE (mips_regnum (current_gdbarch)->hi));
if ((regno == -1) || (regno == LO_REGNUM))
if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->lo))
*(regp + CTX_MDLO) =
extract_signed_integer (&deprecated_registers[DEPRECATED_REGISTER_BYTE (LO_REGNUM)],
DEPRECATED_REGISTER_RAW_SIZE (LO_REGNUM));
extract_signed_integer (&deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->lo)],
DEPRECATED_REGISTER_RAW_SIZE (mips_regnum (current_gdbarch)->lo));
}
/*
@ -127,10 +132,12 @@ supply_fpregset (fpregset_t *fpregsetp)
supply_register (FP0_REGNUM + regi,
(char *) &fpregsetp->fp_r.fp_regs[regi]);
supply_register (FCRCS_REGNUM, (char *) &fpregsetp->fp_csr);
supply_register (mips_regnum (current_gdbarch)->fp_control_status,
(char *) &fpregsetp->fp_csr);
/* FIXME: how can we supply FCRIR_REGNUM? SGI doesn't tell us. */
supply_register (FCRIR_REGNUM, zerobuf);
/* FIXME: how can we supply FCRIR? SGI doesn't tell us. */
supply_register (mips_regnum (current_gdbarch)->fp_implementation_revision,
zerobuf);
}
void
@ -151,8 +158,9 @@ fill_fpregset (fpregset_t *fpregsetp, int regno)
}
}
if ((regno == -1) || (regno == FCRCS_REGNUM))
fpregsetp->fp_csr = *(unsigned *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (FCRCS_REGNUM)];
if ((regno == -1)
|| (regno == mips_regnum (current_gdbarch)->fp_control_status))
fpregsetp->fp_csr = *(unsigned *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->fp_control_status)];
}

37
gdb/mips-linux-nat.c
View file

@ -31,21 +31,18 @@ mips_linux_cannot_fetch_register (int regno)
{
if (regno > ZERO_REGNUM && regno < ZERO_REGNUM + 32)
return 0;
else if (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 32)
else if (regno >= mips_regnum (current_gdbarch)->fp0
&& regno <= mips_regnum (current_gdbarch)->fp0 + 32)
return 0;
switch (regno)
{
case LO_REGNUM:
case HI_REGNUM:
case BADVADDR_REGNUM:
case CAUSE_REGNUM:
case PC_REGNUM:
case FCRCS_REGNUM:
case FCRIR_REGNUM:
else if (regno == mips_regnum (current_gdbarch)->lo
|| regno == mips_regnum (current_gdbarch)->hi
|| regno == mips_regnum (current_gdbarch)->badvaddr
|| regno == mips_regnum (current_gdbarch)->cause
|| regno == mips_regnum (current_gdbarch)->pc
|| regno == mips_regnum (current_gdbarch)->fp_control_status
|| regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
return 0;
}
else
return 1;
}
@ -56,15 +53,11 @@ mips_linux_cannot_store_register (int regno)
return 0;
else if (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 32)
return 0;
switch (regno)
{
case LO_REGNUM:
case HI_REGNUM:
case PC_REGNUM:
case FCRCS_REGNUM:
else if (regno == mips_regnum (current_gdbarch)->lo
|| regno == mips_regnum (current_gdbarch)->hi
|| regno == mips_regnum (current_gdbarch)->pc
|| regno == mips_regnum (current_gdbarch)->fp_control_status)
return 0;
}
else
return 1;
}

159
gdb/mips-linux-tdep.c
View file

@ -111,13 +111,18 @@ supply_gregset (elf_gregset_t *gregsetp)
for (regi = EF_REG0; regi <= EF_REG31; regi++)
supply_32bit_reg ((regi - EF_REG0), (char *)(regp + regi));
supply_32bit_reg (LO_REGNUM, (char *)(regp + EF_LO));
supply_32bit_reg (HI_REGNUM, (char *)(regp + EF_HI));
supply_32bit_reg (mips_regnum (current_gdbarch)->lo,
(char *)(regp + EF_LO));
supply_32bit_reg (mips_regnum (current_gdbarch)->hi,
(char *)(regp + EF_HI));
supply_32bit_reg (PC_REGNUM, (char *)(regp + EF_CP0_EPC));
supply_32bit_reg (BADVADDR_REGNUM, (char *)(regp + EF_CP0_BADVADDR));
supply_32bit_reg (mips_regnum (current_gdbarch)->pc,
(char *)(regp + EF_CP0_EPC));
supply_32bit_reg (mips_regnum (current_gdbarch)->badvaddr,
(char *)(regp + EF_CP0_BADVADDR));
supply_32bit_reg (PS_REGNUM, (char *)(regp + EF_CP0_STATUS));
supply_32bit_reg (CAUSE_REGNUM, (char *)(regp + EF_CP0_CAUSE));
supply_32bit_reg (mips_regnum (current_gdbarch)->cause,
(char *)(regp + EF_CP0_CAUSE));
/* Fill inaccessible registers with zero. */
supply_register (UNUSED_REGNUM, zerobuf);
@ -139,12 +144,12 @@ fill_gregset (elf_gregset_t *gregsetp, int regno)
memset (regp, 0, sizeof (elf_gregset_t));
for (regi = 0; regi < 32; regi++)
fill_gregset (gregsetp, regi);
fill_gregset (gregsetp, LO_REGNUM);
fill_gregset (gregsetp, HI_REGNUM);
fill_gregset (gregsetp, PC_REGNUM);
fill_gregset (gregsetp, BADVADDR_REGNUM);
fill_gregset (gregsetp, mips_regnum (current_gdbarch)->lo);
fill_gregset (gregsetp, mips_regnum (current_gdbarch)->hi);
fill_gregset (gregsetp, mips_regnum (current_gdbarch)->pc);
fill_gregset (gregsetp, mips_regnum (current_gdbarch)->badvaddr);
fill_gregset (gregsetp, PS_REGNUM);
fill_gregset (gregsetp, CAUSE_REGNUM);
fill_gregset (gregsetp, mips_regnum (current_gdbarch)->cause);
return;
}
@ -156,28 +161,20 @@ fill_gregset (elf_gregset_t *gregsetp, int regno)
return;
}
regaddr = -1;
switch (regno)
{
case LO_REGNUM:
if (regno == mips_regnum (current_gdbarch)->lo)
regaddr = EF_LO;
break;
case HI_REGNUM:
else if (regno == mips_regnum (current_gdbarch)->hi)
regaddr = EF_HI;
break;
case PC_REGNUM:
else if (regno == mips_regnum (current_gdbarch)->pc)
regaddr = EF_CP0_EPC;
break;
case BADVADDR_REGNUM:
else if (regno == mips_regnum (current_gdbarch)->badvaddr)
regaddr = EF_CP0_BADVADDR;
break;
case PS_REGNUM:
else if (regno == PS_REGNUM)
regaddr = EF_CP0_STATUS;
break;
case CAUSE_REGNUM:
else if (regno == mips_regnum (current_gdbarch)->cause)
regaddr = EF_CP0_CAUSE;
break;
}
else
regaddr = -1;
if (regaddr != -1)
{
@ -200,10 +197,12 @@ supply_fpregset (elf_fpregset_t *fpregsetp)
supply_register (FP0_REGNUM + regi,
(char *)(*fpregsetp + regi));
supply_register (FCRCS_REGNUM, (char *)(*fpregsetp + 32));
supply_register (mips_regnum (current_gdbarch)->fp_control_status,
(char *)(*fpregsetp + 32));
/* FIXME: how can we supply FCRIR_REGNUM? The ABI doesn't tell us. */
supply_register (FCRIR_REGNUM, zerobuf);
/* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
supply_register (mips_regnum (current_gdbarch)->fp_implementation_revision,
zerobuf);
}
/* Likewise, pack one or all floating point registers into an
@ -220,7 +219,7 @@ fill_fpregset (elf_fpregset_t *fpregsetp, int regno)
to = (char *) (*fpregsetp + regno - FP0_REGNUM);
memcpy (to, from, DEPRECATED_REGISTER_RAW_SIZE (regno - FP0_REGNUM));
}
else if (regno == FCRCS_REGNUM)
else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
{
from = (char *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (regno)];
to = (char *) (*fpregsetp + 32);
@ -232,7 +231,7 @@ fill_fpregset (elf_fpregset_t *fpregsetp, int regno)
for (regi = 0; regi < 32; regi++)
fill_fpregset (fpregsetp, FP0_REGNUM + regi);
fill_fpregset(fpregsetp, FCRCS_REGNUM);
fill_fpregset(fpregsetp, mips_regnum (current_gdbarch)->fp_control_status);
}
}
@ -249,21 +248,22 @@ mips_linux_register_addr (int regno, CORE_ADDR blockend)
if (regno < 32)
regaddr = regno;
else if ((regno >= FP0_REGNUM) && (regno < FP0_REGNUM + 32))
regaddr = FPR_BASE + (regno - FP0_REGNUM);
else if (regno == PC_REGNUM)
else if ((regno >= mips_regnum (current_gdbarch)->fp0)
&& (regno < mips_regnum (current_gdbarch)->fp0 + 32))
regaddr = FPR_BASE + (regno - mips_regnum (current_gdbarch)->fp0);
else if (regno == mips_regnum (current_gdbarch)->pc)
regaddr = PC;
else if (regno == CAUSE_REGNUM)
else if (regno == mips_regnum (current_gdbarch)->cause)
regaddr = CAUSE;
else if (regno == BADVADDR_REGNUM)
else if (regno == mips_regnum (current_gdbarch)->badvaddr)
regaddr = BADVADDR;
else if (regno == LO_REGNUM)
else if (regno == mips_regnum (current_gdbarch)->lo)
regaddr = MMLO;
else if (regno == HI_REGNUM)
else if (regno == mips_regnum (current_gdbarch)->hi)
regaddr = MMHI;
else if (regno == FCRCS_REGNUM)
else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
regaddr = FPC_CSR;
else if (regno == FCRIR_REGNUM)
else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
regaddr = FPC_EIR;
else
error ("Unknowable register number %d.", regno);
@ -386,13 +386,18 @@ mips64_supply_gregset (mips64_elf_gregset_t *gregsetp)
for (regi = MIPS64_EF_REG0; regi <= MIPS64_EF_REG31; regi++)
supply_register ((regi - MIPS64_EF_REG0), (char *)(regp + regi));
supply_register (LO_REGNUM, (char *)(regp + MIPS64_EF_LO));
supply_register (HI_REGNUM, (char *)(regp + MIPS64_EF_HI));
supply_register (mips_regnum (current_gdbarch)->lo,
(char *)(regp + MIPS64_EF_LO));
supply_register (mips_regnum (current_gdbarch)->hi,
(char *)(regp + MIPS64_EF_HI));
supply_register (PC_REGNUM, (char *)(regp + MIPS64_EF_CP0_EPC));
supply_register (BADVADDR_REGNUM, (char *)(regp + MIPS64_EF_CP0_BADVADDR));
supply_register (mips_regnum (current_gdbarch)->pc,
(char *)(regp + MIPS64_EF_CP0_EPC));
supply_register (mips_regnum (current_gdbarch)->badvaddr,
(char *)(regp + MIPS64_EF_CP0_BADVADDR));
supply_register (PS_REGNUM, (char *)(regp + MIPS64_EF_CP0_STATUS));
supply_register (CAUSE_REGNUM, (char *)(regp + MIPS64_EF_CP0_CAUSE));
supply_register (mips_regnum (current_gdbarch)->cause,
(char *)(regp + MIPS64_EF_CP0_CAUSE));
/* Fill inaccessible registers with zero. */
supply_register (UNUSED_REGNUM, zerobuf);
@ -414,12 +419,12 @@ mips64_fill_gregset (mips64_elf_gregset_t *gregsetp, int regno)
memset (regp, 0, sizeof (mips64_elf_gregset_t));
for (regi = 0; regi < 32; regi++)
mips64_fill_gregset (gregsetp, regi);
mips64_fill_gregset (gregsetp, LO_REGNUM);
mips64_fill_gregset (gregsetp, HI_REGNUM);
mips64_fill_gregset (gregsetp, PC_REGNUM);
mips64_fill_gregset (gregsetp, BADVADDR_REGNUM);
mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->lo);
mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->hi);
mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->pc);
mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->badvaddr);
mips64_fill_gregset (gregsetp, PS_REGNUM);
mips64_fill_gregset (gregsetp, CAUSE_REGNUM);
mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->cause);
return;
}
@ -431,28 +436,20 @@ mips64_fill_gregset (mips64_elf_gregset_t *gregsetp, int regno)
return;
}
regaddr = -1;
switch (regno)
{
case LO_REGNUM:
if (regno == mips_regnum (current_gdbarch)->lo)
regaddr = MIPS64_EF_LO;
break;
case HI_REGNUM:
else if (regno == mips_regnum (current_gdbarch)->hi)
regaddr = MIPS64_EF_HI;
break;
case PC_REGNUM:
else if (regno == mips_regnum (current_gdbarch)->pc)
regaddr = MIPS64_EF_CP0_EPC;
break;
case BADVADDR_REGNUM:
else if (regno == mips_regnum (current_gdbarch)->badvaddr)
regaddr = MIPS64_EF_CP0_BADVADDR;
break;
case PS_REGNUM:
else if (regno == PS_REGNUM)
regaddr = MIPS64_EF_CP0_STATUS;
break;
case CAUSE_REGNUM:
else if (regno == mips_regnum (current_gdbarch)->cause)
regaddr = MIPS64_EF_CP0_CAUSE;
break;
}
else
regaddr = -1;
if (regaddr != -1)
{
@ -475,10 +472,12 @@ mips64_supply_fpregset (mips64_elf_fpregset_t *fpregsetp)
supply_register (FP0_REGNUM + regi,
(char *)(*fpregsetp + regi));
supply_register (FCRCS_REGNUM, (char *)(*fpregsetp + 32));
supply_register (mips_regnum (current_gdbarch)->fp_control_status,
(char *)(*fpregsetp + 32));
/* FIXME: how can we supply FCRIR_REGNUM? The ABI doesn't tell us. */
supply_register (FCRIR_REGNUM, zerobuf);
/* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
supply_register (mips_regnum (current_gdbarch)->fp_implementation_revision,
zerobuf);
}
/* Likewise, pack one or all floating point registers into an
@ -495,7 +494,7 @@ mips64_fill_fpregset (mips64_elf_fpregset_t *fpregsetp, int regno)
to = (char *) (*fpregsetp + regno - FP0_REGNUM);
memcpy (to, from, DEPRECATED_REGISTER_RAW_SIZE (regno - FP0_REGNUM));
}
else if (regno == FCRCS_REGNUM)
else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
{
from = (char *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (regno)];
to = (char *) (*fpregsetp + 32);
@ -507,7 +506,8 @@ mips64_fill_fpregset (mips64_elf_fpregset_t *fpregsetp, int regno)
for (regi = 0; regi < 32; regi++)
mips64_fill_fpregset (fpregsetp, FP0_REGNUM + regi);
mips64_fill_fpregset(fpregsetp, FCRCS_REGNUM);
mips64_fill_fpregset(fpregsetp,
mips_regnum (current_gdbarch)->fp_control_status);
}
}
@ -525,21 +525,22 @@ mips64_linux_register_addr (int regno, CORE_ADDR blockend)
if (regno < 32)
regaddr = regno;
else if ((regno >= FP0_REGNUM) && (regno < FP0_REGNUM + 32))
else if ((regno >= mips_regnum (current_gdbarch)->fp0)
&& (regno < mips_regnum (current_gdbarch)->fp0 + 32))
regaddr = MIPS64_FPR_BASE + (regno - FP0_REGNUM);
else if (regno == PC_REGNUM)
else if (regno == mips_regnum (current_gdbarch)->pc)
regaddr = MIPS64_PC;
else if (regno == CAUSE_REGNUM)
else if (regno == mips_regnum (current_gdbarch)->cause)
regaddr = MIPS64_CAUSE;
else if (regno == BADVADDR_REGNUM)
else if (regno == mips_regnum (current_gdbarch)->badvaddr)
regaddr = MIPS64_BADVADDR;
else if (regno == LO_REGNUM)
else if (regno == mips_regnum (current_gdbarch)->lo)
regaddr = MIPS64_MMLO;
else if (regno == HI_REGNUM)
else if (regno == mips_regnum (current_gdbarch)->hi)
regaddr = MIPS64_MMHI;
else if (regno == FCRCS_REGNUM)
else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
regaddr = MIPS64_FPC_CSR;
else if (regno == FCRIR_REGNUM)
else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
regaddr = MIPS64_FPC_EIR;
else
error ("Unknowable register number %d.", regno);

18
gdb/mips-nat.c
View file

@ -55,12 +55,12 @@ static int
register_ptrace_addr (int regno)
{
return (regno < 32 ? GPR_BASE + regno
: regno == PC_REGNUM ? PC
: regno == CAUSE_REGNUM ? CAUSE
: regno == HI_REGNUM ? MMHI
: regno == LO_REGNUM ? MMLO
: regno == FCRCS_REGNUM ? FPC_CSR
: regno == FCRIR_REGNUM ? FPC_EIR
: regno == mips_regnum (current_gdbarch)->pc ? PC
: regno == mips_regnum (current_gdbarch)->cause ? CAUSE
: regno == mips_regnum (current_gdbarch)->hi ? MMHI
: regno == mips_regnum (current_gdbarch)->lo ? MMLO
: regno == mips_regnum (current_gdbarch)->fp_control_status ? FPC_CSR
: regno == mips_regnum (current_gdbarch)->fp_implementation_revision ? FPC_EIR
: regno >= FP0_REGNUM ? FPR_BASE + (regno - FP0_REGNUM)
: 0);
}
@ -110,8 +110,10 @@ store_inferior_registers (int regno)
if (regno > 0)
{
if (regno == ZERO_REGNUM || regno == PS_REGNUM
|| regno == BADVADDR_REGNUM || regno == CAUSE_REGNUM
|| regno == FCRIR_REGNUM || regno == DEPRECATED_FP_REGNUM
|| regno == mips_regnum (current_gdbarch)->badvaddr
|| regno == mips_regnum (current_gdbarch)->cause
|| regno == mips_regnum (current_gdbarch)->fp_implementation_revision
|| regno == DEPRECATED_FP_REGNUM
|| (regno >= FIRST_EMBED_REGNUM && regno <= LAST_EMBED_REGNUM))
return;
regaddr = register_ptrace_addr (regno);

162
gdb/mips-tdep.c
View file

@ -138,8 +138,24 @@ struct gdbarch_tdep
/* Is the target using 64-bit raw integer registers but only
storing a left-aligned 32-bit value in each? */
int mips64_transfers_32bit_regs_p;
/* Indexes for various registers. IRIX and embedded have
different values. This contains the "public" fields. Don't
add any that do not need to be public. */
const struct mips_regnum *regnum;
};
const struct mips_regnum *
mips_regnum (struct gdbarch *gdbarch)
{
return gdbarch_tdep (gdbarch)->regnum;
}
static int
mips_fpa0_regnum (struct gdbarch *gdbarch)
{
return mips_regnum (gdbarch)->fp0 + 12;
}
#define MIPS_EABI (gdbarch_tdep (current_gdbarch)->mips_abi == MIPS_ABI_EABI32 \
|| gdbarch_tdep (current_gdbarch)->mips_abi == MIPS_ABI_EABI64)
@ -324,7 +340,7 @@ mips2_fp_compat (void)
{
/* MIPS1 and MIPS2 have only 32 bit FPRs, and the FR bit is not
meaningful. */
if (register_size (current_gdbarch, FP0_REGNUM) == 4)
if (register_size (current_gdbarch, mips_regnum (current_gdbarch)->fp0) == 4)
return 0;
#if 0
@ -687,7 +703,7 @@ mips_convert_register_p (int regnum, struct type *type)
{
return (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
&& register_size (current_gdbarch, regnum) == 4
&& (regnum) >= FP0_REGNUM && (regnum) < FP0_REGNUM + 32
&& (regnum) >= mips_regnum (current_gdbarch)->fp0 && (regnum) < mips_regnum (current_gdbarch)->fp0 + 32
&& TYPE_CODE(type) == TYPE_CODE_FLT
&& TYPE_LENGTH(type) == 8);
}
@ -715,8 +731,8 @@ static struct type *
mips_register_type (struct gdbarch *gdbarch, int regnum)
{
gdb_assert (regnum >= 0 && regnum < 2 * NUM_REGS);
if ((regnum % NUM_REGS) >= FP0_REGNUM
&& (regnum % NUM_REGS) < FP0_REGNUM + 32)
if ((regnum % NUM_REGS) >= mips_regnum (current_gdbarch)->fp0
&& (regnum % NUM_REGS) < mips_regnum (current_gdbarch)->fp0 + 32)
{
/* The floating-point registers raw, or cooked, always match
mips_regsize(), and also map 1:1, byte for byte. */
@ -737,7 +753,7 @@ mips_register_type (struct gdbarch *gdbarch, int regnum)
internal_error (__FILE__, __LINE__, "bad switch");
}
}
else if (regnum >= (NUM_REGS + FCRCS_REGNUM)
else if (regnum >= (NUM_REGS + mips_regnum (current_gdbarch)->fp_control_status)
&& regnum <= NUM_REGS + LAST_EMBED_REGNUM)
/* The pseudo/cooked view of the embedded registers is always
32-bit. The raw view is handled below. */
@ -1065,7 +1081,7 @@ mips32_next_pc (CORE_ADDR pc)
{
int tf = itype_rt (inst) & 0x01;
int cnum = itype_rt (inst) >> 2;
int fcrcs = read_signed_register (FCRCS_REGNUM);
int fcrcs = read_signed_register (mips_regnum (current_gdbarch)->fp_control_status);
int cond = ((fcrcs >> 24) & 0x0e) | ((fcrcs >> 23) & 0x01);
if (((cond >> cnum) & 0x01) == tf)
@ -1549,7 +1565,7 @@ mips_find_saved_regs (struct frame_info *fci)
CORE_ADDR reg_position = (get_frame_base (fci)
+ SIGFRAME_FPREGSAVE_OFF
+ ireg * SIGFRAME_REG_SIZE);
set_reg_offset (saved_regs, FP0_REGNUM + ireg, reg_position);
set_reg_offset (saved_regs, mips_regnum (current_gdbarch)->fp0 + ireg, reg_position);
}
set_reg_offset (saved_regs, PC_REGNUM, get_frame_base (fci) + SIGFRAME_PC_OFF);
@ -1697,14 +1713,14 @@ mips_find_saved_regs (struct frame_info *fci)
reg_position is decremented each time through the
loop). */
if ((ireg & 1))
set_reg_offset (saved_regs, FP0_REGNUM + ireg,
set_reg_offset (saved_regs, mips_regnum (current_gdbarch)->fp0 + ireg,
reg_position - MIPS_SAVED_REGSIZE);
else
set_reg_offset (saved_regs, FP0_REGNUM + ireg,
set_reg_offset (saved_regs, mips_regnum (current_gdbarch)->fp0 + ireg,
reg_position + MIPS_SAVED_REGSIZE);
}
else
set_reg_offset (saved_regs, FP0_REGNUM + ireg, reg_position);
set_reg_offset (saved_regs, mips_regnum (current_gdbarch)->fp0 + ireg, reg_position);
reg_position -= MIPS_SAVED_REGSIZE;
}
@ -2804,7 +2820,7 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
/* Initialize the integer and float register pointers. */
argreg = A0_REGNUM;
float_argreg = FPA0_REGNUM;
float_argreg = mips_fpa0_regnum (current_gdbarch);
/* The struct_return pointer occupies the first parameter-passing reg. */
if (struct_return)
@ -3065,7 +3081,7 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
/* Initialize the integer and float register pointers. */
argreg = A0_REGNUM;
float_argreg = FPA0_REGNUM;
float_argreg = mips_fpa0_regnum (current_gdbarch);
/* The struct_return pointer occupies the first parameter-passing reg. */
if (struct_return)
@ -3297,7 +3313,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
/* Initialize the integer and float register pointers. */
argreg = A0_REGNUM;
float_argreg = FPA0_REGNUM;
float_argreg = mips_fpa0_regnum (current_gdbarch);
/* The struct_return pointer occupies the first parameter-passing reg. */
if (struct_return)
@ -3606,7 +3622,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
/* Initialize the integer and float register pointers. */
argreg = A0_REGNUM;
float_argreg = FPA0_REGNUM;
float_argreg = mips_fpa0_regnum (current_gdbarch);
/* The struct_return pointer occupies the first parameter-passing reg. */
if (struct_return)
@ -3896,7 +3912,7 @@ mips_pop_frame (void)
/* Floating point registers must not be sign extended,
in case MIPS_SAVED_REGSIZE = 4 but sizeof (FP0_REGNUM) == 8. */
if (FP0_REGNUM <= regnum && regnum < FP0_REGNUM + 32)
if (mips_regnum (current_gdbarch)->fp0 <= regnum && regnum < mips_regnum (current_gdbarch)->fp0 + 32)
write_register (regnum,
read_memory_unsigned_integer (deprecated_get_frame_saved_regs (frame)[regnum],
MIPS_SAVED_REGSIZE));
@ -3931,14 +3947,14 @@ mips_pop_frame (void)
xfree (pi_ptr);
write_register (HI_REGNUM,
write_register (mips_regnum (current_gdbarch)->hi,
read_memory_integer (new_sp - 2 * MIPS_SAVED_REGSIZE,
MIPS_SAVED_REGSIZE));
write_register (LO_REGNUM,
write_register (mips_regnum (current_gdbarch)->lo,
read_memory_integer (new_sp - 3 * MIPS_SAVED_REGSIZE,
MIPS_SAVED_REGSIZE));
if (MIPS_FPU_TYPE != MIPS_FPU_NONE)
write_register (FCRCS_REGNUM,
write_register (mips_regnum (current_gdbarch)->fp_control_status,
read_memory_integer (new_sp - 4 * MIPS_SAVED_REGSIZE,
MIPS_SAVED_REGSIZE));
}
@ -4042,7 +4058,7 @@ mips_read_fp_register_double (struct frame_info *frame, int regno,
}
else
{
if ((regno - FP0_REGNUM) & 1)
if ((regno - mips_regnum (current_gdbarch)->fp0) & 1)
internal_error (__FILE__, __LINE__,
"mips_read_fp_register_double: bad access to "
"odd-numbered FP register");
@ -4070,7 +4086,7 @@ mips_print_fp_register (struct ui_file *file, struct frame_info *frame,
double doub, flt1, flt2; /* doubles extracted from raw hex data */
int inv1, inv2, namelen;
raw_buffer = (char *) alloca (2 * register_size (current_gdbarch, FP0_REGNUM));
raw_buffer = (char *) alloca (2 * register_size (current_gdbarch, mips_regnum (current_gdbarch)->fp0));
fprintf_filtered (file, "%s:", REGISTER_NAME (regnum));
fprintf_filtered (file, "%*s", 4 - (int) strlen (REGISTER_NAME (regnum)),
@ -4578,11 +4594,11 @@ return_value_location (struct type *valtype,
lo->buf_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
hi->buf_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 0 : 4;
lo->reg_offset = ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
&& register_size (current_gdbarch, FP0_REGNUM) == 8)
&& register_size (current_gdbarch, mips_regnum (current_gdbarch)->fp0) == 8)
? 4 : 0);
hi->reg_offset = lo->reg_offset;
lo->reg = FP0_REGNUM + 0;
hi->reg = FP0_REGNUM + 1;
lo->reg = mips_regnum (current_gdbarch)->fp0 + 0;
hi->reg = mips_regnum (current_gdbarch)->fp0 + 1;
lo->len = 4;
hi->len = 4;
}
@ -4591,10 +4607,10 @@ return_value_location (struct type *valtype,
/* The floating point value fits in a single floating-point
register. */
lo->reg_offset = ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
&& register_size (current_gdbarch, FP0_REGNUM) == 8
&& register_size (current_gdbarch, mips_regnum (current_gdbarch)->fp0) == 8
&& len == 4)
? 4 : 0);
lo->reg = FP0_REGNUM;
lo->reg = mips_regnum (current_gdbarch)->fp0;
lo->len = len;
lo->buf_offset = 0;
hi->len = 0;
@ -4764,7 +4780,7 @@ mips_o32_xfer_return_value (struct type *type,
least significant part of FP0. */
if (mips_debug)
fprintf_unfiltered (gdb_stderr, "Return float in $fp0\n");
mips_xfer_register (regcache, NUM_REGS + FP0_REGNUM, TYPE_LENGTH (type),
mips_xfer_register (regcache, NUM_REGS + mips_regnum (current_gdbarch)->fp0, TYPE_LENGTH (type),
TARGET_BYTE_ORDER, in, out, 0);
}
else if (TYPE_CODE (type) == TYPE_CODE_FLT
@ -4779,15 +4795,15 @@ mips_o32_xfer_return_value (struct type *type,
switch (TARGET_BYTE_ORDER)
{
case BFD_ENDIAN_LITTLE:
mips_xfer_register (regcache, NUM_REGS + FP0_REGNUM + 0, 4,
mips_xfer_register (regcache, NUM_REGS + mips_regnum (current_gdbarch)->fp0 + 0, 4,
TARGET_BYTE_ORDER, in, out, 0);
mips_xfer_register (regcache, NUM_REGS + FP0_REGNUM + 1, 4,
mips_xfer_register (regcache, NUM_REGS + mips_regnum (current_gdbarch)->fp0 + 1, 4,
TARGET_BYTE_ORDER, in, out, 4);
break;
case BFD_ENDIAN_BIG:
mips_xfer_register (regcache, NUM_REGS + FP0_REGNUM + 1, 4,
mips_xfer_register (regcache, NUM_REGS + mips_regnum (current_gdbarch)->fp0 + 1, 4,
TARGET_BYTE_ORDER, in, out, 0);
mips_xfer_register (regcache, NUM_REGS + FP0_REGNUM + 0, 4,
mips_xfer_register (regcache, NUM_REGS + mips_regnum (current_gdbarch)->fp0 + 0, 4,
TARGET_BYTE_ORDER, in, out, 4);
break;
default:
@ -4814,7 +4830,7 @@ mips_o32_xfer_return_value (struct type *type,
bfd_byte reg[MAX_REGISTER_SIZE];
int regnum;
int field;
for (field = 0, regnum = FP0_REGNUM;
for (field = 0, regnum = mips_regnum (current_gdbarch)->fp0;
field < TYPE_NFIELDS (type);
field++, regnum += 2)
{
@ -4905,7 +4921,7 @@ mips_n32n64_xfer_return_value (struct type *type,
of FP0. */
if (mips_debug)
fprintf_unfiltered (gdb_stderr, "Return float in $fp0\n");
mips_xfer_register (regcache, NUM_REGS + FP0_REGNUM, TYPE_LENGTH (type),
mips_xfer_register (regcache, NUM_REGS + mips_regnum (current_gdbarch)->fp0, TYPE_LENGTH (type),
TARGET_BYTE_ORDER, in, out, 0);
}
else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
@ -4927,7 +4943,7 @@ mips_n32n64_xfer_return_value (struct type *type,
bfd_byte reg[MAX_REGISTER_SIZE];
int regnum;
int field;
for (field = 0, regnum = FP0_REGNUM;
for (field = 0, regnum = mips_regnum (current_gdbarch)->fp0;
field < TYPE_NFIELDS (type);
field++, regnum += 2)
{
@ -5561,11 +5577,11 @@ mips_stab_reg_to_regnum (int num)
if (num >= 0 && num < 32)
regnum = num;
else if (num >= 38 && num < 70)
regnum = num + FP0_REGNUM - 38;
regnum = num + mips_regnum (current_gdbarch)->fp0 - 38;
else if (num == 70)
regnum = HI_REGNUM;
regnum = mips_regnum (current_gdbarch)->hi;
else if (num == 71)
regnum = LO_REGNUM;
regnum = mips_regnum (current_gdbarch)->lo;
else
/* This will hopefully (eventually) provoke a warning. Should
we be calling complaint() here? */
@ -5584,11 +5600,11 @@ mips_dwarf_dwarf2_ecoff_reg_to_regnum (int num)
if (num >= 0 && num < 32)
regnum = num;
else if (num >= 32 && num < 64)
regnum = num + FP0_REGNUM - 32;
regnum = num + mips_regnum (current_gdbarch)->fp0 - 32;
else if (num == 64)
regnum = HI_REGNUM;
regnum = mips_regnum (current_gdbarch)->hi;
else if (num == 65)
regnum = LO_REGNUM;
regnum = mips_regnum (current_gdbarch)->lo;
else
/* This will hopefully (eventually) provoke a warning. Should we
be calling complaint() here? */
@ -5809,13 +5825,42 @@ mips_gdbarch_init (struct gdbarch_info info,
set_gdbarch_elf_make_msymbol_special (gdbarch,
mips_elf_make_msymbol_special);
/* Fill in the OS dependant register numbers. */
{
struct mips_regnum *regnum = GDBARCH_OBSTACK_ZALLOC (gdbarch,
struct mips_regnum);
tdep->regnum = regnum;
if (info.osabi == GDB_OSABI_IRIX)
{
regnum->fp0 = 32;
regnum->pc = 64;
regnum->cause = 65;
regnum->badvaddr = 66;
regnum->hi = 67;
regnum->lo = 68;
regnum->fp_control_status = 69;
regnum->fp_implementation_revision = 70;
num_regs = 71;
}
else
{
regnum->lo = MIPS_EMBED_LO_REGNUM;
regnum->hi = MIPS_EMBED_HI_REGNUM;
regnum->badvaddr = MIPS_EMBED_BADVADDR_REGNUM;
regnum->cause = MIPS_EMBED_CAUSE_REGNUM;
regnum->pc = MIPS_EMBED_PC_REGNUM;
regnum->fp0 = MIPS_EMBED_FP0_REGNUM;
regnum->fp_control_status = 70;
regnum->fp_implementation_revision = 71;
num_regs = 90;
}
/* FIXME: cagney/2003-11-15: For MIPS, hasn't PC_REGNUM been
replaced by read_pc? */
set_gdbarch_pc_regnum (gdbarch, regnum->pc);
set_gdbarch_fp0_regnum (gdbarch, regnum->fp0);
set_gdbarch_num_regs (gdbarch, num_regs);
set_gdbarch_num_pseudo_regs (gdbarch, num_regs);
}
switch (mips_abi)
{
@ -5827,7 +5872,7 @@ mips_gdbarch_init (struct gdbarch_info info,
tdep->mips_default_stack_argsize = 4;
tdep->mips_fp_register_double = 0;
tdep->mips_last_arg_regnum = A0_REGNUM + 4 - 1;
tdep->mips_last_fp_arg_regnum = FPA0_REGNUM + 4 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 4 - 1;
tdep->default_mask_address_p = 0;
set_gdbarch_long_bit (gdbarch, 32);
set_gdbarch_ptr_bit (gdbarch, 32);
@ -5845,7 +5890,7 @@ mips_gdbarch_init (struct gdbarch_info info,
tdep->mips_default_stack_argsize = 8;
tdep->mips_fp_register_double = 1;
tdep->mips_last_arg_regnum = A0_REGNUM + 4 - 1;
tdep->mips_last_fp_arg_regnum = FPA0_REGNUM + 4 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 4 - 1;
tdep->default_mask_address_p = 0;
set_gdbarch_long_bit (gdbarch, 32);
set_gdbarch_ptr_bit (gdbarch, 32);
@ -5862,7 +5907,7 @@ mips_gdbarch_init (struct gdbarch_info info,
tdep->mips_default_stack_argsize = 4;
tdep->mips_fp_register_double = 0;
tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
tdep->mips_last_fp_arg_regnum = FPA0_REGNUM + 8 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
tdep->default_mask_address_p = 0;
set_gdbarch_long_bit (gdbarch, 32);
set_gdbarch_ptr_bit (gdbarch, 32);
@ -5880,7 +5925,7 @@ mips_gdbarch_init (struct gdbarch_info info,
tdep->mips_default_stack_argsize = 8;
tdep->mips_fp_register_double = 1;
tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
tdep->mips_last_fp_arg_regnum = FPA0_REGNUM + 8 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
tdep->default_mask_address_p = 0;
set_gdbarch_long_bit (gdbarch, 64);
set_gdbarch_ptr_bit (gdbarch, 64);
@ -5898,7 +5943,7 @@ mips_gdbarch_init (struct gdbarch_info info,
tdep->mips_default_stack_argsize = 8;
tdep->mips_fp_register_double = 1;
tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
tdep->mips_last_fp_arg_regnum = FPA0_REGNUM + 8 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
tdep->default_mask_address_p = 0;
set_gdbarch_long_bit (gdbarch, 32);
set_gdbarch_ptr_bit (gdbarch, 32);
@ -5916,7 +5961,7 @@ mips_gdbarch_init (struct gdbarch_info info,
tdep->mips_default_stack_argsize = 8;
tdep->mips_fp_register_double = 1;
tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
tdep->mips_last_fp_arg_regnum = FPA0_REGNUM + 8 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
tdep->default_mask_address_p = 0;
set_gdbarch_long_bit (gdbarch, 64);
set_gdbarch_ptr_bit (gdbarch, 64);
@ -6170,10 +6215,6 @@ mips_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
fprintf_unfiltered (file,
"mips_dump_tdep: MIPS_EABI = %d\n",
MIPS_EABI);
fprintf_unfiltered (file,
"mips_dump_tdep: MIPS_LAST_FP_ARG_REGNUM = %d (%d regs)\n",
MIPS_LAST_FP_ARG_REGNUM,
MIPS_LAST_FP_ARG_REGNUM - FPA0_REGNUM + 1);
fprintf_unfiltered (file,
"mips_dump_tdep: MIPS_FPU_TYPE = %d (%s)\n",
MIPS_FPU_TYPE,
@ -6202,33 +6243,15 @@ mips_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
fprintf_unfiltered (file,
"mips_dump_tdep: ATTACH_DETACH # %s\n",
XSTRING (ATTACH_DETACH));
fprintf_unfiltered (file,
"mips_dump_tdep: BADVADDR_REGNUM = %d\n",
BADVADDR_REGNUM);
fprintf_unfiltered (file,
"mips_dump_tdep: CAUSE_REGNUM = %d\n",
CAUSE_REGNUM);
fprintf_unfiltered (file,
"mips_dump_tdep: DWARF_REG_TO_REGNUM # %s\n",
XSTRING (DWARF_REG_TO_REGNUM (REGNUM)));
fprintf_unfiltered (file,
"mips_dump_tdep: ECOFF_REG_TO_REGNUM # %s\n",
XSTRING (ECOFF_REG_TO_REGNUM (REGNUM)));
fprintf_unfiltered (file,
"mips_dump_tdep: FCRCS_REGNUM = %d\n",
FCRCS_REGNUM);
fprintf_unfiltered (file,
"mips_dump_tdep: FCRIR_REGNUM = %d\n",
FCRIR_REGNUM);
fprintf_unfiltered (file,
"mips_dump_tdep: FIRST_EMBED_REGNUM = %d\n",
FIRST_EMBED_REGNUM);
fprintf_unfiltered (file,
"mips_dump_tdep: FPA0_REGNUM = %d\n",
FPA0_REGNUM);
fprintf_unfiltered (file,
"mips_dump_tdep: HI_REGNUM = %d\n",
HI_REGNUM);
fprintf_unfiltered (file,
"mips_dump_tdep: IGNORE_HELPER_CALL # %s\n",
XSTRING (IGNORE_HELPER_CALL (PC)));
@ -6241,9 +6264,6 @@ mips_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
fprintf_unfiltered (file,
"mips_dump_tdep: LAST_EMBED_REGNUM = %d\n",
LAST_EMBED_REGNUM);
fprintf_unfiltered (file,
"mips_dump_tdep: LO_REGNUM = %d\n",
LO_REGNUM);
#ifdef MACHINE_CPROC_FP_OFFSET
fprintf_unfiltered (file,
"mips_dump_tdep: MACHINE_CPROC_FP_OFFSET = %d\n",

23
gdb/mips-tdep.h
View file

@ -47,4 +47,27 @@ extern CORE_ADDR mips_next_pc (CORE_ADDR pc);
architecture's word size. */
extern int mips_regsize (struct gdbarch *gdbarch);
/* Return the current index for various MIPS registers. */
struct mips_regnum
{
int pc;
int fp0;
int fp_implementation_revision;
int fp_control_status;
int badvaddr; /* Bad vaddr for addressing exception. */
int cause; /* Describes last exception. */
int hi; /* Multiply/divide temp. */
int lo; /* ... */
};
extern const struct mips_regnum *mips_regnum (struct gdbarch *gdbarch);
enum {
MIPS_EMBED_LO_REGNUM = 33,
MIPS_EMBED_HI_REGNUM = 34,
MIPS_EMBED_BADVADDR_REGNUM = 35,
MIPS_EMBED_CAUSE_REGNUM = 36,
MIPS_EMBED_PC_REGNUM = 37,
MIPS_EMBED_FP0_REGNUM = 38
};
#endif /* MIPS_TDEP_H */

11
gdb/mipsnbsd-tdep.c
View file

@ -66,7 +66,9 @@ mipsnbsd_supply_fpreg (char *fpregs, int regno)
{
int i;
for (i = FP0_REGNUM; i <= FCRIR_REGNUM; i++)
for (i = FP0_REGNUM;
i <= mips_regnum (current_gdbarch)->fp_implementation_revision;
i++)
{
if (regno == i || regno == -1)
{
@ -83,7 +85,8 @@ mipsnbsd_fill_fpreg (char *fpregs, int regno)
{
int i;
for (i = FP0_REGNUM; i <= FCRCS_REGNUM; i++)
for (i = FP0_REGNUM; i <= mips_regnum (current_gdbarch)->fp_control_status;
i++)
if ((regno == i || regno == -1) && ! CANNOT_STORE_REGISTER (i))
regcache_collect (i, fpregs + ((i - FP0_REGNUM) * mips_regsize (current_gdbarch)));
}
@ -259,14 +262,14 @@ static int
mipsnbsd_cannot_fetch_register (int regno)
{
return (regno == ZERO_REGNUM
|| regno == FCRIR_REGNUM);
|| regno == mips_regnum (current_gdbarch)->fp_implementation_revision);
}
static int
mipsnbsd_cannot_store_register (int regno)
{
return (regno == ZERO_REGNUM
|| regno == FCRIR_REGNUM);
|| regno == mips_regnum (current_gdbarch)->fp_implementation_revision);
}
/* NetBSD/mips uses a slightly different link_map structure from the

52
gdb/mipsv4-nat.c
View file

@ -53,14 +53,18 @@ supply_gregset (gregset_t *gregsetp)
for (regi = 0; regi <= CXT_RA; regi++)
supply_register (regi, (char *) (regp + regi));
supply_register (PC_REGNUM, (char *) (regp + CXT_EPC));
supply_register (HI_REGNUM, (char *) (regp + CXT_MDHI));
supply_register (LO_REGNUM, (char *) (regp + CXT_MDLO));
supply_register (CAUSE_REGNUM, (char *) (regp + CXT_CAUSE));
supply_register (mips_regnum (current_gdbarch)->pc,
(char *) (regp + CXT_EPC));
supply_register (mips_regnum (current_gdbarch)->hi,
(char *) (regp + CXT_MDHI));
supply_register (mips_regnum (current_gdbarch)->lo,
(char *) (regp + CXT_MDLO));
supply_register (mips_regnum (current_gdbarch)->cause,
(char *) (regp + CXT_CAUSE));
/* Fill inaccessible registers with zero. */
supply_register (PS_REGNUM, zerobuf);
supply_register (BADVADDR_REGNUM, zerobuf);
supply_register (mips_regnum (current_gdbarch)->badvaddr, zerobuf);
supply_register (DEPRECATED_FP_REGNUM, zerobuf);
supply_register (UNUSED_REGNUM, zerobuf);
for (regi = FIRST_EMBED_REGNUM; regi <= LAST_EMBED_REGNUM; regi++)
@ -77,22 +81,22 @@ fill_gregset (gregset_t *gregsetp, int regno)
if ((regno == -1) || (regno == regi))
*(regp + regi) = *(greg_t *) & deprecated_registers[DEPRECATED_REGISTER_BYTE (regi)];
if ((regno == -1) || (regno == PC_REGNUM))
*(regp + CXT_EPC) = *(greg_t *) & deprecated_registers[DEPRECATED_REGISTER_BYTE (PC_REGNUM)];
if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->pc))
*(regp + CXT_EPC) = *(greg_t *) & deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->pc)];
if ((regno == -1) || (regno == CAUSE_REGNUM))
*(regp + CXT_CAUSE) = *(greg_t *) & deprecated_registers[DEPRECATED_REGISTER_BYTE (CAUSE_REGNUM)];
if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->cause))
*(regp + CXT_CAUSE) = *(greg_t *) & deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->cause)];
if ((regno == -1) || (regno == HI_REGNUM))
*(regp + CXT_MDHI) = *(greg_t *) & deprecated_registers[DEPRECATED_REGISTER_BYTE (HI_REGNUM)];
if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->hi))
*(regp + CXT_MDHI) = *(greg_t *) & deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->hi)];
if ((regno == -1) || (regno == LO_REGNUM))
*(regp + CXT_MDLO) = *(greg_t *) & deprecated_registers[DEPRECATED_REGISTER_BYTE (LO_REGNUM)];
if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->lo))
*(regp + CXT_MDLO) = *(greg_t *) & deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->lo)];
}
/*
* Now we do the same thing for floating-point registers.
* We don't bother to condition on FP0_REGNUM since any
* We don't bother to condition on FP0 regnum since any
* reasonable MIPS configuration has an R3010 in it.
*
* Again, see the comments in m68k-tdep.c.
@ -106,13 +110,15 @@ supply_fpregset (fpregset_t *fpregsetp)
memset (zerobuf, 0, MAX_REGISTER_SIZE);
for (regi = 0; regi < 32; regi++)
supply_register (FP0_REGNUM + regi,
supply_register (mips_regnum (current_gdbarch)->fp0 + regi,
(char *) &fpregsetp->fp_r.fp_regs[regi]);
supply_register (FCRCS_REGNUM, (char *) &fpregsetp->fp_csr);
supply_register (mips_regnum (current_gdbarch)->fp_control_status,
(char *) &fpregsetp->fp_csr);
/* FIXME: how can we supply FCRIR_REGNUM? The ABI doesn't tell us. */
supply_register (FCRIR_REGNUM, zerobuf);
/* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
supply_register (mips_regnum (current_gdbarch)->fp_implementation_revision,
zerobuf);
}
void
@ -121,18 +127,20 @@ fill_fpregset (fpregset_t *fpregsetp, int regno)
int regi;
char *from, *to;
for (regi = FP0_REGNUM; regi < FP0_REGNUM + 32; regi++)
for (regi = mips_regnum (current_gdbarch)->fp0;
regi < mips_regnum (current_gdbarch)->fp0 + 32; regi++)
{
if ((regno == -1) || (regno == regi))
{
from = (char *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (regi)];
to = (char *) &(fpregsetp->fp_r.fp_regs[regi - FP0_REGNUM]);
to = (char *) &(fpregsetp->fp_r.fp_regs[regi - mips_regnum (current_gdbarch)->fp0]);
memcpy (to, from, DEPRECATED_REGISTER_RAW_SIZE (regi));
}
}
if ((regno == -1) || (regno == FCRCS_REGNUM))
fpregsetp->fp_csr = *(unsigned *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (FCRCS_REGNUM)];
if ((regno == -1)
|| (regno == mips_regnum (current_gdbarch)->fp_control_status))
fpregsetp->fp_csr = *(unsigned *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->fp_control_status)];
}

23
gdb/remote-mips.c
View file

@ -36,6 +36,7 @@
#include "gdb_stat.h"
#include "regcache.h"
#include <ctype.h>
#include "mips-tdep.h"
/* Breakpoint types. Values 0, 1, and 2 must agree with the watch
@ -1902,27 +1903,25 @@ mips_map_regno (int regno)
{
if (regno < 32)
return regno;
if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
return regno - FP0_REGNUM + 32;
switch (regno)
{
case PC_REGNUM:
if (regno >= mips_regnum (current_gdbarch)->fp0
&& regno < mips_regnum (current_gdbarch)->fp0 + 32)
return regno - mips_regnum (current_gdbarch)->fp0 + 32;
else if (regno == mips_regnum (current_gdbarch)->pc)
return REGNO_OFFSET + 0;
case CAUSE_REGNUM:
else if (regno == mips_regnum (current_gdbarch)->cause)
return REGNO_OFFSET + 1;
case HI_REGNUM:
else if (regno == mips_regnum (current_gdbarch)->hi)
return REGNO_OFFSET + 2;
case LO_REGNUM:
else if (regno == mips_regnum (current_gdbarch)->lo)
return REGNO_OFFSET + 3;
case FCRCS_REGNUM:
else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
return REGNO_OFFSET + 4;
case FCRIR_REGNUM:
else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
return REGNO_OFFSET + 5;
default:
else
/* FIXME: Is there a way to get the status register? */
return 0;
}
}
/* Fetch the remote registers. */

24
gdb/remote-vxmips.c
View file

@ -111,11 +111,11 @@ vx_read_register (int regno)
bcopy (&mips_greg_packet[MIPS_R_SR],
&deprecated_registers[DEPRECATED_REGISTER_BYTE (PS_REGNUM)], MIPS_GREG_SIZE);
bcopy (&mips_greg_packet[MIPS_R_LO],
&deprecated_registers[DEPRECATED_REGISTER_BYTE (LO_REGNUM)], MIPS_GREG_SIZE);
&deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->lo)], MIPS_GREG_SIZE);
bcopy (&mips_greg_packet[MIPS_R_HI],
&deprecated_registers[DEPRECATED_REGISTER_BYTE (HI_REGNUM)], MIPS_GREG_SIZE);
&deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->hi)], MIPS_GREG_SIZE);
bcopy (&mips_greg_packet[MIPS_R_PC],
&deprecated_registers[DEPRECATED_REGISTER_BYTE (PC_REGNUM)], MIPS_GREG_SIZE);
&deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->pc)], MIPS_GREG_SIZE);
/* If the target has floating point registers, fetch them.
Otherwise, zero the floating point register values in
@ -136,15 +136,15 @@ vx_read_register (int regno)
/* Copy the floating point control/status register (fpcsr). */
bcopy (&mips_fpreg_packet[MIPS_R_FPCSR],
&deprecated_registers[DEPRECATED_REGISTER_BYTE (FCRCS_REGNUM)],
DEPRECATED_REGISTER_RAW_SIZE (FCRCS_REGNUM));
&deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->fp_control_status)],
DEPRECATED_REGISTER_RAW_SIZE (mips_regnum (current_gdbarch)->fp_control_status));
}
else
{
memset (&deprecated_registers[DEPRECATED_REGISTER_BYTE (FP0_REGNUM)],
0, DEPRECATED_REGISTER_RAW_SIZE (FP0_REGNUM) * 32);
memset (&deprecated_registers[DEPRECATED_REGISTER_BYTE (FCRCS_REGNUM)],
0, DEPRECATED_REGISTER_RAW_SIZE (FCRCS_REGNUM));
memset (&deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->fp_control_status)],
0, DEPRECATED_REGISTER_RAW_SIZE (mips_regnum (current_gdbarch)->fp_control_status));
}
/* Mark the register cache valid. */
@ -170,11 +170,11 @@ vx_write_register (int regno)
bcopy (&deprecated_registers[DEPRECATED_REGISTER_BYTE (PS_REGNUM)],
&mips_greg_packet[MIPS_R_SR], MIPS_GREG_SIZE);
bcopy (&deprecated_registers[DEPRECATED_REGISTER_BYTE (LO_REGNUM)],
bcopy (&deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->lo)],
&mips_greg_packet[MIPS_R_LO], MIPS_GREG_SIZE);
bcopy (&deprecated_registers[DEPRECATED_REGISTER_BYTE (HI_REGNUM)],
bcopy (&deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->hi)],
&mips_greg_packet[MIPS_R_HI], MIPS_GREG_SIZE);
bcopy (&deprecated_registers[DEPRECATED_REGISTER_BYTE (PC_REGNUM)],
bcopy (&deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->pc)],
&mips_greg_packet[MIPS_R_PC], MIPS_GREG_SIZE);
net_write_registers (mips_greg_packet, MIPS_GREG_PLEN, PTRACE_SETREGS);
@ -191,9 +191,9 @@ vx_write_register (int regno)
/* Copy the floating point control/status register (fpcsr). */
bcopy (&deprecated_registers[DEPRECATED_REGISTER_BYTE (FCRCS_REGNUM)],
bcopy (&deprecated_registers[DEPRECATED_REGISTER_BYTE (mips_regnum (current_gdbarch)->fp_control_status)],
&mips_fpreg_packet[MIPS_R_FPCSR],
DEPRECATED_REGISTER_RAW_SIZE (FCRCS_REGNUM));
DEPRECATED_REGISTER_RAW_SIZE (mips_regnum (current_gdbarch)->fp_control_status));
net_write_registers (mips_fpreg_packet, MIPS_FPREG_PLEN,
PTRACE_SETFPREGS);