(handle_v6_thumb_insn): New function.
(ARMul_ThumbDecode): Call handle_v6_thumb_insn() when an undefined instruction binary is encountered.
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2 changed files with 78 additions and 15 deletions
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@ -1,3 +1,9 @@
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2005-05-24 Nick Clifton <nickc@redhat.com>
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* thumbemu.c (handle_v6_thumb_insn): New function.
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(ARMul_ThumbDecode): Call handle_v6_thumb_insn() when an undefined
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instruction binary is encountered.
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2005-05-12 Nick Clifton <nickc@redhat.com>
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2005-05-12 Nick Clifton <nickc@redhat.com>
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* Update the address and phone number of the FSF organization in
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* Update the address and phone number of the FSF organization in
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@ -31,20 +31,74 @@ existing ARM simulator. */
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#include "armemu.h"
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#include "armemu.h"
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#include "armos.h"
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#include "armos.h"
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/* Attempt to emulate an ARMv6 instruction.
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Stores t_branch into PVALUE upon success or t_undefined otherwise. */
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static void
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handle_v6_thumb_insn (ARMul_State * state,
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ARMword tinstr,
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tdstate * pvalid)
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{
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ARMword Rd;
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ARMword Rm;
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if (! state->is_v6)
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{
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* pvalid = t_undefined;
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return;
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}
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switch (tinstr & 0xFFC0)
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{
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case 0xb660: /* cpsie */
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case 0xb670: /* cpsid */
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case 0x4600: /* cpy */
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case 0xba00: /* rev */
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case 0xba40: /* rev16 */
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case 0xbac0: /* revsh */
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case 0xb650: /* setend */
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default:
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printf ("Unhandled v6 thumb insn: %04x\n", tinstr);
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* pvalid = t_undefined;
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return;
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case 0xb200: /* sxth */
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Rm = state->Reg [(tinstr & 0x38) >> 3];
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if (Rm & 0x8000)
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state->Reg [(tinstr & 0x7)] = (Rm & 0xffff) | 0xffff0000;
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else
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state->Reg [(tinstr & 0x7)] = Rm & 0xffff;
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break;
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case 0xb240: /* sxtb */
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Rm = state->Reg [(tinstr & 0x38) >> 3];
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if (Rm & 0x80)
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state->Reg [(tinstr & 0x7)] = (Rm & 0xff) | 0xffffff00;
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else
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state->Reg [(tinstr & 0x7)] = Rm & 0xff;
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break;
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case 0xb280: /* uxth */
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Rm = state->Reg [(tinstr & 0x38) >> 3];
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state->Reg [(tinstr & 0x7)] = Rm & 0xffff;
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break;
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case 0xb2c0: /* uxtb */
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Rm = state->Reg [(tinstr & 0x38) >> 3];
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state->Reg [(tinstr & 0x7)] = Rm & 0xff;
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break;
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}
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/* Indicate that the instruction has been processed. */
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* pvalid = t_branch;
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}
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/* Decode a 16bit Thumb instruction. The instruction is in the low
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/* Decode a 16bit Thumb instruction. The instruction is in the low
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16-bits of the tinstr field, with the following Thumb instruction
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16-bits of the tinstr field, with the following Thumb instruction
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held in the high 16-bits. Passing in two Thumb instructions allows
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held in the high 16-bits. Passing in two Thumb instructions allows
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easier simulation of the special dual BL instruction. */
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easier simulation of the special dual BL instruction. */
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tdstate ARMul_ThumbDecode (state, pc, tinstr, ainstr)
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tdstate
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ARMul_State *
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ARMul_ThumbDecode (ARMul_State * state,
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state;
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ARMword pc,
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ARMword
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ARMword tinstr,
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pc;
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ARMword * ainstr)
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ARMword
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tinstr;
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ARMword *
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ainstr;
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{
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{
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tdstate valid = t_decoded; /* default assumes a valid instruction */
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tdstate valid = t_decoded; /* default assumes a valid instruction */
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ARMword next_instr;
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ARMword next_instr;
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@ -222,7 +276,7 @@ tdstate ARMul_ThumbDecode (state, pc, tinstr, ainstr)
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case 0x0: /* UNDEFINED */
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case 0x0: /* UNDEFINED */
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case 0x4: /* UNDEFINED */
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case 0x4: /* UNDEFINED */
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case 0x8: /* UNDEFINED */
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case 0x8: /* UNDEFINED */
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valid = t_undefined;
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handle_v6_thumb_insn (state, tinstr, & valid);
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break;
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break;
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}
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}
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}
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}
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@ -370,7 +424,7 @@ tdstate ARMul_ThumbDecode (state, pc, tinstr, ainstr)
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/* Drop through. */
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/* Drop through. */
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default:
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default:
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/* Everything else is an undefined instruction. */
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/* Everything else is an undefined instruction. */
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valid = t_undefined;
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handle_v6_thumb_insn (state, tinstr, & valid);
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break;
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break;
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}
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}
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break;
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break;
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@ -460,8 +514,9 @@ tdstate ARMul_ThumbDecode (state, pc, tinstr, ainstr)
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}
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}
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valid = t_branch;
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valid = t_branch;
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}
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}
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else /* UNDEFINED : cc=1110(AL) uses different format */
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else
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valid = t_undefined;
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/* UNDEFINED : cc=1110(AL) uses different format. */
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handle_v6_thumb_insn (state, tinstr, & valid);
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break;
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break;
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case 28: /* B */
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case 28: /* B */
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/* Format 18 */
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/* Format 18 */
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@ -476,7 +531,7 @@ tdstate ARMul_ThumbDecode (state, pc, tinstr, ainstr)
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{
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{
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if (tinstr & 1)
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if (tinstr & 1)
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{
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{
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valid = t_undefined;
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handle_v6_thumb_insn (state, tinstr, & valid);
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break;
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break;
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}
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}
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/* Drop through. */
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/* Drop through. */
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@ -499,8 +554,10 @@ tdstate ARMul_ThumbDecode (state, pc, tinstr, ainstr)
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break;
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break;
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}
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}
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}
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}
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valid = t_undefined;
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handle_v6_thumb_insn (state, tinstr, & valid);
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break;
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break;
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case 30: /* BL instruction 1 */
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case 30: /* BL instruction 1 */
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/* Format 19 */
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/* Format 19 */
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/* There is no single ARM instruction equivalent for this Thumb
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/* There is no single ARM instruction equivalent for this Thumb
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