* Merely eliminated silly duplicated code, to raise test coverage.
* sky-pke.c (pke_issue): Move interrupt-handling into decode logic. (pke_code_*): Remove duplicated interrupt-handling code.
This commit is contained in:
parent
a859684b25
commit
5068e793ef
1 changed files with 29 additions and 174 deletions
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@ -587,6 +587,7 @@ pke_issue(SIM_DESC sd, struct pke_device* me)
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me->flags &= ~PKE_FLAG_INT_NOLOOP;
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/* mask interrupt bit from instruction word so re-decoded instructions don't stall */
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BIT_MASK_SET(fw, PKE_OPCODE_I_B, PKE_OPCODE_I_E, 0);
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intr = 0;
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}
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else /* new interrupt-flagged instruction */
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{
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@ -603,48 +604,56 @@ pke_issue(SIM_DESC sd, struct pke_device* me)
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if(PKE_REG_MASK_GET(me, STAT, PPS) == PKE_REG_STAT_PPS_IDLE)
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_DECODE);
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/* handle [new - first time] interrupts */
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if(intr)
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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/* presume stall state follows; only PKEMARK may go ahead anyway */
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}
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/* decode & execute */
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if(IS_PKE_CMD(cmd, PKENOP))
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if(IS_PKE_CMD(cmd, PKENOP) && !intr)
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pke_code_nop(me, fw);
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else if(IS_PKE_CMD(cmd, STCYCL))
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else if(IS_PKE_CMD(cmd, STCYCL) && !intr)
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pke_code_stcycl(me, fw);
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else if(me->pke_number == 1 && IS_PKE_CMD(cmd, OFFSET))
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else if(me->pke_number == 1 && IS_PKE_CMD(cmd, OFFSET) && !intr)
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pke_code_offset(me, fw);
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else if(me->pke_number == 1 && IS_PKE_CMD(cmd, BASE))
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else if(me->pke_number == 1 && IS_PKE_CMD(cmd, BASE) && !intr)
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pke_code_base(me, fw);
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else if(IS_PKE_CMD(cmd, ITOP))
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else if(IS_PKE_CMD(cmd, ITOP) && !intr)
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pke_code_itop(me, fw);
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else if(IS_PKE_CMD(cmd, STMOD))
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else if(IS_PKE_CMD(cmd, STMOD) && !intr)
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pke_code_stmod(me, fw);
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else if(me->pke_number == 1 && IS_PKE_CMD(cmd, MSKPATH3))
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else if(me->pke_number == 1 && IS_PKE_CMD(cmd, MSKPATH3) && !intr)
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pke_code_mskpath3(me, fw);
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else if(IS_PKE_CMD(cmd, PKEMARK))
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pke_code_pkemark(me, fw);
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else if(IS_PKE_CMD(cmd, FLUSHE))
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else if(IS_PKE_CMD(cmd, FLUSHE) && !intr)
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pke_code_flushe(me, fw);
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else if(me->pke_number == 1 && IS_PKE_CMD(cmd, FLUSH))
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else if(me->pke_number == 1 && IS_PKE_CMD(cmd, FLUSH) && !intr)
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pke_code_flush(me, fw);
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else if(me->pke_number == 1 && IS_PKE_CMD(cmd, FLUSHA))
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else if(me->pke_number == 1 && IS_PKE_CMD(cmd, FLUSHA) && !intr)
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pke_code_flusha(me, fw);
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else if(IS_PKE_CMD(cmd, PKEMSCAL))
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else if(IS_PKE_CMD(cmd, PKEMSCAL) && !intr)
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pke_code_pkemscal(me, fw);
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else if(IS_PKE_CMD(cmd, PKEMSCNT))
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else if(IS_PKE_CMD(cmd, PKEMSCNT) && !intr)
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pke_code_pkemscnt(me, fw);
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else if(me->pke_number == 1 && IS_PKE_CMD(cmd, PKEMSCALF))
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else if(me->pke_number == 1 && IS_PKE_CMD(cmd, PKEMSCALF) && !intr)
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pke_code_pkemscalf(me, fw);
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else if(IS_PKE_CMD(cmd, STMASK))
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else if(IS_PKE_CMD(cmd, STMASK) && !intr)
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pke_code_stmask(me, fw);
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else if(IS_PKE_CMD(cmd, STROW))
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else if(IS_PKE_CMD(cmd, STROW) && !intr)
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pke_code_strow(me, fw);
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else if(IS_PKE_CMD(cmd, STCOL))
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else if(IS_PKE_CMD(cmd, STCOL) && !intr)
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pke_code_stcol(me, fw);
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else if(IS_PKE_CMD(cmd, MPG))
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else if(IS_PKE_CMD(cmd, MPG) && !intr)
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pke_code_mpg(me, fw);
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else if(IS_PKE_CMD(cmd, DIRECT))
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else if(IS_PKE_CMD(cmd, DIRECT) && !intr)
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pke_code_direct(me, fw);
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else if(IS_PKE_CMD(cmd, DIRECTHL))
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else if(IS_PKE_CMD(cmd, DIRECTHL) && !intr)
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pke_code_directhl(me, fw);
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else if(IS_PKE_CMD(cmd, UNPACK))
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else if(IS_PKE_CMD(cmd, UNPACK) && !intr)
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pke_code_unpack(me, fw);
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/* ... no other commands ... */
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else
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@ -931,14 +940,6 @@ pke_flip_dbf(struct pke_device* me)
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void
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pke_code_nop(struct pke_device* me, unsigned_4 pkecode)
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{
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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/* done */
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pke_pc_advance(me, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_IDLE);
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@ -950,14 +951,6 @@ pke_code_stcycl(struct pke_device* me, unsigned_4 pkecode)
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{
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int imm = BIT_MASK_GET(pkecode, PKE_OPCODE_IMM_B, PKE_OPCODE_IMM_E);
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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/* copy immediate value into CYCLE reg */
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PKE_REG_MASK_SET(me, CYCLE, WL, BIT_MASK_GET(imm, 8, 15));
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PKE_REG_MASK_SET(me, CYCLE, CL, BIT_MASK_GET(imm, 0, 7));
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@ -972,14 +965,6 @@ pke_code_offset(struct pke_device* me, unsigned_4 pkecode)
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{
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int imm = BIT_MASK_GET(pkecode, PKE_OPCODE_IMM_B, PKE_OPCODE_IMM_E);
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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/* copy 10 bits to OFFSET field */
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PKE_REG_MASK_SET(me, OFST, OFFSET, BIT_MASK_GET(imm, 0, 9));
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/* clear DBF bit */
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@ -999,14 +984,6 @@ pke_code_base(struct pke_device* me, unsigned_4 pkecode)
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{
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int imm = BIT_MASK_GET(pkecode, PKE_OPCODE_IMM_B, PKE_OPCODE_IMM_E);
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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/* copy 10 bits to BASE field */
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PKE_REG_MASK_SET(me, BASE, BASE, BIT_MASK_GET(imm, 0, 9));
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/* done */
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@ -1020,14 +997,6 @@ pke_code_itop(struct pke_device* me, unsigned_4 pkecode)
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{
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int imm = BIT_MASK_GET(pkecode, PKE_OPCODE_IMM_B, PKE_OPCODE_IMM_E);
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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/* copy 10 bits to ITOPS field */
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PKE_REG_MASK_SET(me, ITOPS, ITOPS, BIT_MASK_GET(imm, 0, 9));
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/* done */
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@ -1041,14 +1010,6 @@ pke_code_stmod(struct pke_device* me, unsigned_4 pkecode)
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{
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int imm = BIT_MASK_GET(pkecode, PKE_OPCODE_IMM_B, PKE_OPCODE_IMM_E);
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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/* copy 2 bits to MODE register */
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PKE_REG_MASK_SET(me, MODE, MDE, BIT_MASK_GET(imm, 0, 2));
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/* done */
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@ -1063,14 +1024,6 @@ pke_code_mskpath3(struct pke_device* me, unsigned_4 pkecode)
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int imm = BIT_MASK_GET(pkecode, PKE_OPCODE_IMM_B, PKE_OPCODE_IMM_E);
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unsigned_4 gif_mode;
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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/* set appropriate bit */
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if(BIT_MASK_GET(imm, PKE_REG_MSKPATH3_B, PKE_REG_MSKPATH3_E) != 0)
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gif_mode = GIF_REG_MODE_M3R_MASK;
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@ -1089,8 +1042,6 @@ pke_code_mskpath3(struct pke_device* me, unsigned_4 pkecode)
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void
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pke_code_pkemark(struct pke_device* me, unsigned_4 pkecode)
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{
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/* ignore possible interrupt stall */
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int imm = BIT_MASK_GET(pkecode, PKE_OPCODE_IMM_B, PKE_OPCODE_IMM_E);
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/* copy 16 bits to MARK register */
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PKE_REG_MASK_SET(me, MARK, MARK, BIT_MASK_GET(imm, 0, 15));
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@ -1105,14 +1056,6 @@ pke_code_pkemark(struct pke_device* me, unsigned_4 pkecode)
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void
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pke_code_flushe(struct pke_device* me, unsigned_4 pkecode)
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{
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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/* compute next PEW bit */
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if(pke_check_stall(me, chk_vu))
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{
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@ -1136,14 +1079,6 @@ pke_code_flush(struct pke_device* me, unsigned_4 pkecode)
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{
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int something_busy = 0;
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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/* compute next PEW, PGW bits */
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if(pke_check_stall(me, chk_vu))
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{
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@ -1183,14 +1118,6 @@ pke_code_flusha(struct pke_device* me, unsigned_4 pkecode)
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{
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int something_busy = 0;
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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/* compute next PEW, PGW bits */
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if(pke_check_stall(me, chk_vu))
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{
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@ -1228,14 +1155,6 @@ pke_code_flusha(struct pke_device* me, unsigned_4 pkecode)
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void
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pke_code_pkemscal(struct pke_device* me, unsigned_4 pkecode)
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{
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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/* compute next PEW bit */
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if(pke_check_stall(me, chk_vu))
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{
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@ -1280,14 +1199,6 @@ pke_code_pkemscal(struct pke_device* me, unsigned_4 pkecode)
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void
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pke_code_pkemscnt(struct pke_device* me, unsigned_4 pkecode)
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{
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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/* compute next PEW bit */
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if(pke_check_stall(me, chk_vu))
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{
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@ -1334,14 +1245,6 @@ pke_code_pkemscalf(struct pke_device* me, unsigned_4 pkecode)
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{
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int something_busy = 0;
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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/* compute next PEW, PGW bits */
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if(pke_check_stall(me, chk_vu))
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{
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@ -1402,14 +1305,6 @@ pke_code_stmask(struct pke_device* me, unsigned_4 pkecode)
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{
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unsigned_4* mask;
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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/* check that FIFO has one more word for STMASK operand */
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mask = pke_pc_operand(me, 1);
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if(mask != NULL)
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@ -1445,14 +1340,6 @@ pke_code_strow(struct pke_device* me, unsigned_4 pkecode)
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/* check that FIFO has four more words for STROW operand */
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unsigned_4* last_op;
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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last_op = pke_pc_operand(me, 4);
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if(last_op != NULL)
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{
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@ -1490,14 +1377,6 @@ pke_code_stcol(struct pke_device* me, unsigned_4 pkecode)
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/* check that FIFO has four more words for STCOL operand */
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unsigned_4* last_op;
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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last_op = pke_pc_operand(me, 4);
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if(last_op != NULL)
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{
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@ -1540,14 +1419,6 @@ pke_code_mpg(struct pke_device* me, unsigned_4 pkecode)
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if(me->qw_pc != 3 && me->qw_pc != 1)
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return pke_code_error(me, pkecode);
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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/* map zero to max+1 */
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if(num==0) num=0x100;
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@ -1657,14 +1528,6 @@ pke_code_direct(struct pke_device* me, unsigned_4 pkecode)
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if(me->qw_pc != 3)
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return pke_code_error(me, pkecode);
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/* handle interrupts */
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if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
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{
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PKE_REG_MASK_SET(me, STAT, PIS, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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return;
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}
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/* map zero to max+1 */
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if(imm==0) imm=0x10000;
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@ -1735,14 +1598,6 @@ pke_code_unpack(struct pke_device* me, unsigned_4 pkecode)
|
|||
int n, num_operands;
|
||||
unsigned_4* last_operand_word = NULL;
|
||||
|
||||
/* handle interrupts */
|
||||
if(BIT_MASK_GET(pkecode, PKE_OPCODE_I_B, PKE_OPCODE_I_E))
|
||||
{
|
||||
PKE_REG_MASK_SET(me, STAT, PIS, 1);
|
||||
PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
|
||||
return;
|
||||
}
|
||||
|
||||
/* compute PKEcode length, as given in CPU2 spec, v2.1 pg. 11 */
|
||||
if(wl <= cl)
|
||||
n = num;
|
||||
|
|
Loading…
Reference in a new issue