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Fix display of RL78 MOVW instructions that use the stack pointer.

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* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

	* testsuite/gas/rl78/sp-relative-movw.s: New test.
	* testsuite/gas/rl78/sp-relative-movw.d: Expected disassembly.
	* testsuite/gas/rl78/rl78.exp: Run the new test.
This commit is contained in:
Nick Clifton 2016-01-14 16:23:35 +00:00
parent e7cf25a8ab
commit 4d82fe66e8
8 changed files with 53 additions and 3 deletions
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6
gas/ChangeLog
View file

@ -1,3 +1,9 @@
2016-01-14 Nick Clifton <nickc@redhat.com>
* testsuite/gas/rl78/sp-relative-movw.s: New test.
* testsuite/gas/rl78/sp-relative-movw.d: Expected disassembly.
* testsuite/gas/rl78/rl78.exp: Run the new test.
2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
* testsuite/gas/aarch64/illegal-sysreg-2.l: New.

1
gas/testsuite/gas/rl78/rl78.exp
View file

@ -22,4 +22,5 @@ if [expr [istarget "rl78-*-*"]] then {
run_dump_test "pr19157"
run_dump_test "pr19158"
run_dump_test "pr19159"
run_dump_test "sp-relative-movw"
}

14
gas/testsuite/gas/rl78/sp-relative-movw.d Normal file
View file

@ -0,0 +1,14 @@
#objdump: -d --prefix-addresses --show-raw-insn
#name: RL78: correct display of SP-relative movw instructions
.*: +file format .*rl78.*
Disassembly of section .text:
0x0+000 cb f8 34 12[ ]+movw sp, #0x1234
0x0+004 ae f8[ ]+movw ax, sp
0x0+006 be f8[ ]+movw sp, ax
0x0+008 af f8 ff[ ]+movw ax, !0x000ffff8
0x0+00b bf f8 ff[ ]+movw !0x000ffff8, ax
0x0+00e fb f8 ff[ ]+movw hl, sp
0x0+011 db f8 ff[ ]+movw bc, sp
0x0+014 eb f8 ff[ ]+movw de, sp

9
gas/testsuite/gas/rl78/sp-relative-movw.s Normal file
View file

@ -0,0 +1,9 @@
movw sp, #0x1234
movw ax, sp
movw sp, ax
movw ax, !0xffff8
movw !0xffff8, ax
movw hl, sp
movw bc, sp
movw de, sp

8
opcodes/ChangeLog
View file

@ -1,3 +1,11 @@
2016-01-14 Nick Clifton <nickc@redhat.com>
* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
instructions that can support stack pointer operations.
* rl78-decode.c: Regenerate.
* rl78-dis.c: Fix display of stack pointer in MOVW based
instructions.
2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals

2
opcodes/rl78-decode.c
View file

@ -5347,7 +5347,7 @@ rl78_decode_opcode (unsigned long pc AU,
op[0]);
printf (" ra = 0x%x\n", ra);
}
SYNTAX("movw %0, %e!1");
SYNTAX("movw %0, %es!1");
#line 886 "rl78-decode.opc"
ID(mov); W(); DRW(ra); SM(None, IMMU(2));

2
opcodes/rl78-decode.opc
View file

@ -882,7 +882,7 @@ rl78_decode_opcode (unsigned long pc AU,
/** 1010 1110 movw %0, %s1 */
ID(mov); W(); DR(AX); SM(None, SFR);
/** 11ra 1011 movw %0, %e!1 */
/** 11ra 1011 movw %0, %es!1 */
ID(mov); W(); DRW(ra); SM(None, IMMU(2));
/** 11ra 1010 movw %0, %1 */

12
opcodes/rl78-dis.c
View file

@ -227,7 +227,17 @@ print_insn_rl78_common (bfd_vma addr, disassemble_info * dis, RL78_Dis_Isa isa)
}
if (do_bang)
{
/* If we are going to display SP by name, we must omit the bang. */
if ((oper->type == RL78_Operand_Indirect || RL78_Operand_BitIndirect)
&& oper->reg == RL78_Reg_None
&& do_sfr
&& ((oper->addend == 0xffff8 && opcode.size == RL78_Word)
|| (oper->addend == 0x0fff8 && do_es && opcode.size == RL78_Word)))
;
else
PC ('!');
}
if (do_cond)
{
@ -265,6 +275,8 @@ print_insn_rl78_common (bfd_vma addr, disassemble_info * dis, RL78_Dis_Isa isa)
PR (PS, "psw");
else if (oper->addend == 0xffff8 && do_sfr && opcode.size == RL78_Word)
PR (PS, "sp");
else if (oper->addend == 0x0fff8 && do_sfr && do_es && opcode.size == RL78_Word)
PR (PS, "sp");
else if (oper->addend == 0xffff8 && do_sfr && opcode.size == RL78_Byte)
PR (PS, "spl");
else if (oper->addend == 0xffff9 && do_sfr && opcode.size == RL78_Byte)