* config/tc-mips.c (set_at): Fix handling of 64bit register loads.
(macro): Likewise. Fix la/dla address expansions for EMBEDDED_PIC and NO_PIC cases. Code cleanup. (macro2): Fix handling of 64bit register loads. * mips-gp64-fp32-pic.d: Fix test of 64bit register loads. * mips-gp64-fp32-pic.s: Likewise. * mips-gp64-fp32.d: Likewise. * mips-gp64-fp32.s: Likewise. * mips-gp64-fp64-pic.d: Likewise. * mips-gp64-fp64-pic.s: Likewise. * mips-gp64-fp64.d: Likewise. * mips-gp64-fp64.s: Likewise.
This commit is contained in:
Thiemo Seufer
parent
9e32ca895c
commit
4d34fb5fed
11 changed files with 231 additions and 187 deletions
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@ -1,3 +1,10 @@
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2002-02-25 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
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* config/tc-mips.c (set_at): Fix handling of 64bit register loads.
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(macro): Likewise. Fix la/dla address expansions for EMBEDDED_PIC
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and NO_PIC cases. Code cleanup.
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(macro2): Fix handling of 64bit register loads.
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2002-02-25 David Mosberger <davidm@hpl.hp.com>
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* doc/as.texinfo: Add entry for IA64.
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@ -3257,7 +3257,7 @@ set_at (counter, reg, unsignedp)
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"t,r,j", AT, reg, (int) BFD_RELOC_LO16);
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else
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{
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load_register (counter, AT, &imm_expr, 0);
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load_register (counter, AT, &imm_expr, HAVE_64BIT_GPRS);
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macro_build ((char *) NULL, counter, (expressionS *) NULL,
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unsignedp ? "sltu" : "slt",
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"d,v,t", AT, reg, AT);
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@ -4024,7 +4024,7 @@ macro (ip)
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0);
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return;
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}
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load_register (&icnt, AT, &imm_expr, 0);
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load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS);
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macro_build ((char *) NULL, &icnt, &offset_expr, s, "s,t,p", sreg, AT);
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break;
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@ -4616,11 +4616,11 @@ macro (ip)
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macro_build ((char *) NULL, &icnt, &offset_expr, "lui", "t,u",
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tempreg, (int) BFD_RELOC_PCREL_HI16_S);
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macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
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HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
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(dbl || HAVE_64BIT_ADDRESSES) ? "daddu" : "addu",
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"d,v,t", tempreg, tempreg, breg);
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}
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macro_build ((char *) NULL, &icnt, &offset_expr,
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HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
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(dbl || HAVE_64BIT_ADDRESSES) ? "daddiu" : "addiu",
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"t,r,j", treg, tempreg, (int) BFD_RELOC_PCREL_LO16);
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if (! used_at)
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return;
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@ -4635,7 +4635,10 @@ macro (ip)
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}
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if (offset_expr.X_op == O_constant)
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load_register (&icnt, tempreg, &offset_expr, dbl);
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load_register (&icnt, tempreg, &offset_expr,
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((mips_pic == EMBEDDED_PIC || mips_pic == NO_PIC)
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? (dbl || HAVE_64BIT_ADDRESSES)
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: HAVE_64BIT_ADDRESSES));
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else if (mips_pic == NO_PIC)
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{
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/* If this is a reference to a GP relative symbol, we want
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@ -4707,8 +4710,7 @@ macro (ip)
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&& ! nopic_need_relax (offset_expr.X_add_symbol, 1))
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{
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frag_grow (20);
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macro_build ((char *) NULL, &icnt, &offset_expr,
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HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
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macro_build ((char *) NULL, &icnt, &offset_expr, "addiu",
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"t,r,j", tempreg, GP, (int) BFD_RELOC_GPREL16);
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p = frag_var (rs_machine_dependent, 8, 0,
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RELAX_ENCODE (4, 8, 0, 4, 0,
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@ -4718,8 +4720,7 @@ macro (ip)
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macro_build_lui (p, &icnt, &offset_expr, tempreg);
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if (p != NULL)
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p += 4;
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macro_build (p, &icnt, &offset_expr,
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HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
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macro_build (p, &icnt, &offset_expr, "addiu",
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"t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16);
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}
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}
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@ -4760,7 +4761,8 @@ macro (ip)
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frag_grow (32);
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if (expr1.X_add_number == 0 && tempreg == PIC_CALL_REG)
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lw_reloc_type = (int) BFD_RELOC_MIPS_CALL16;
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macro_build ((char *) NULL, &icnt, &offset_expr, dbl ? "ld" : "lw",
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macro_build ((char *) NULL, &icnt, &offset_expr,
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HAVE_32BIT_ADDRESSES ? "lw" : "ld",
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"t,o(b)", tempreg, lw_reloc_type, GP);
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if (expr1.X_add_number == 0)
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{
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@ -4915,7 +4917,7 @@ macro (ip)
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HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
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"d,v,t", tempreg, tempreg, GP);
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macro_build ((char *) NULL, &icnt, &offset_expr,
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dbl ? "ld" : "lw",
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HAVE_32BIT_ADDRESSES ? "lw" : "ld",
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"t,o(b)", tempreg, lw_reloc_type, tempreg);
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if (expr1.X_add_number == 0)
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{
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@ -5018,7 +5020,7 @@ macro (ip)
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p += 4;
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}
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macro_build (p, &icnt, &offset_expr,
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dbl ? "ld" : "lw",
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HAVE_32BIT_ADDRESSES ? "lw" : "ld",
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"t,o(b)", tempreg, (int) BFD_RELOC_MIPS_GOT16, GP);
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p += 4;
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if (expr1.X_add_number >= -0x8000
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@ -5079,9 +5081,17 @@ macro (ip)
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abort ();
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if (breg != 0)
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macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
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HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
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{
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char *s;
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if (mips_pic == EMBEDDED_PIC || mips_pic == NO_PIC)
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s = (dbl || HAVE_64BIT_ADDRESSES) ? "daddu" : "addu";
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else
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s = HAVE_64BIT_ADDRESSES ? "daddu" : "addu";
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macro_build ((char *) NULL, &icnt, (expressionS *) NULL, s,
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"d,v,t", treg, tempreg, breg);
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}
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if (! used_at)
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return;
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@ -6751,7 +6761,7 @@ macro2 (ip)
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}
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else
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{
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load_register (&icnt, AT, &imm_expr, 0);
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load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS);
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macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "xor",
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"d,v,t", dreg, sreg, AT);
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used_at = 1;
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@ -6787,7 +6797,7 @@ macro2 (ip)
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}
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else
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{
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load_register (&icnt, AT, &imm_expr, 0);
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load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS);
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macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
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mask == M_SGE_I ? "slt" : "sltu", "d,v,t", dreg, sreg,
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AT);
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@ -6815,7 +6825,7 @@ macro2 (ip)
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case M_SGTU_I:
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s = "sltu";
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sgti:
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load_register (&icnt, AT, &imm_expr, 0);
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load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS);
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macro_build ((char *) NULL, &icnt, (expressionS *) NULL, s, "d,v,t",
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dreg, AT, sreg);
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break;
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@ -6838,7 +6848,7 @@ macro2 (ip)
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case M_SLEU_I:
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s = "sltu";
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slei:
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load_register (&icnt, AT, &imm_expr, 0);
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load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS);
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macro_build ((char *) NULL, &icnt, (expressionS *) NULL, s, "d,v,t",
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dreg, AT, sreg);
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macro_build ((char *) NULL, &icnt, &expr1, "xori", "t,r,i", dreg, dreg,
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@ -6854,7 +6864,7 @@ macro2 (ip)
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dreg, sreg, (int) BFD_RELOC_LO16);
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return;
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}
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load_register (&icnt, AT, &imm_expr, 0);
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load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS);
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macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "slt", "d,v,t",
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dreg, sreg, AT);
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break;
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@ -6868,7 +6878,7 @@ macro2 (ip)
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dreg, sreg, (int) BFD_RELOC_LO16);
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return;
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}
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load_register (&icnt, AT, &imm_expr, 0);
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load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS);
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macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sltu",
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"d,v,t", dreg, sreg, AT);
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break;
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@ -6925,7 +6935,7 @@ macro2 (ip)
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}
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else
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{
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load_register (&icnt, AT, &imm_expr, 0);
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load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS);
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macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "xor",
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"d,v,t", dreg, sreg, AT);
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used_at = 1;
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@ -6990,7 +7000,7 @@ macro2 (ip)
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case M_TNE_I:
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s = "tne";
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trap:
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load_register (&icnt, AT, &imm_expr, 0);
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load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS);
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macro_build ((char *) NULL, &icnt, (expressionS *) NULL, s, "s,t", sreg,
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AT);
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break;
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@ -1,3 +1,14 @@
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2002-02-25 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
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* mips-gp64-fp32-pic.d: Fix test of 64bit register loads.
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* mips-gp64-fp32-pic.s: Likewise.
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* mips-gp64-fp32.d: Likewise.
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* mips-gp64-fp32.s: Likewise.
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* mips-gp64-fp64-pic.d: Likewise.
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* mips-gp64-fp64-pic.s: Likewise.
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* mips-gp64-fp64.d: Likewise.
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* mips-gp64-fp64.s: Likewise.
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2002-02-25 Alan Modra <amodra@bigpond.net.au>
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* gas/hppa/reloc/reloc.exp: Update copyright date.
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@ -22,12 +22,12 @@ Disassembly of section .text:
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30: 24840000 addiu a0,a0,0
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34: 8f840000 lw a0,0\(gp\)
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38: 00000000 nop
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3c: 24840228 addiu a0,a0,552
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40: 10000079 b 228 <[^>]*>
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3c: 24840230 addiu a0,a0,560
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40: 1000007b b 230 <[^>]*>
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44: 00000000 nop
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48: 8f990000 lw t9,0\(gp\)
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4c: 00000000 nop
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50: 27390228 addiu t9,t9,552
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50: 27390230 addiu t9,t9,560
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54: 0320f809 jalr t9
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58: 00000000 nop
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5c: 8fbc0008 lw gp,8\(sp\)
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@ -41,7 +41,7 @@ Disassembly of section .text:
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7c: 8c840000 lw a0,0\(a0\)
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80: 8f840000 lw a0,0\(gp\)
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84: 00000000 nop
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88: 24840228 addiu a0,a0,552
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88: 24840230 addiu a0,a0,560
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8c: 8c840000 lw a0,0\(a0\)
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90: 8f840000 lw a0,0\(gp\)
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94: 00000000 nop
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@ -53,7 +53,7 @@ Disassembly of section .text:
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ac: dc840000 ld a0,0\(a0\)
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b0: 8f840000 lw a0,0\(gp\)
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b4: 00000000 nop
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b8: 24840228 addiu a0,a0,552
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b8: 24840230 addiu a0,a0,560
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bc: dc840000 ld a0,0\(a0\)
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c0: 8f810000 lw at,0\(gp\)
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c4: 00000000 nop
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@ -111,10 +111,10 @@ Disassembly of section .text:
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194: 64a40064 daddiu a0,a1,100
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198: 0004202b sltu a0,zero,a0
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19c: 00a0202d move a0,a1
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1a0: df840000 ld a0,0\(gp\)
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1a0: 8f840000 lw a0,0\(gp\)
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1a4: 00000000 nop
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1a8: 24840000 addiu a0,a0,0
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1ac: df840000 ld a0,0\(gp\)
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1ac: 8f840000 lw a0,0\(gp\)
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1b0: 00000000 nop
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1b4: 24840000 addiu a0,a0,0
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1b8: 8f810000 lw at,0\(gp\)
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@ -127,24 +127,26 @@ Disassembly of section .text:
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1d4: 24210000 addiu at,at,0
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1d8: b0240000 sdl a0,0\(at\)
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1dc: b4240007 sdr a0,7\(at\)
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1e0: 3c018000 lui at,0x8000
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1e4: 0081082a slt at,a0,at
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1e8: 1020000f beqz at,228 <[^>]*>
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1ec: 00000000 nop
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1f0: 34018000 li at,0x8000
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1f4: 00010c78 dsll at,at,0x11
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1f8: 0081082b sltu at,a0,at
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1fc: 1020000a beqz at,228 <[^>]*>
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200: 00000000 nop
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204: 3c018000 lui at,0x8000
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208: 0081082a slt at,a0,at
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20c: 14200006 bnez at,228 <[^>]*>
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210: 00000000 nop
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214: 34018000 li at,0x8000
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218: 00010c78 dsll at,at,0x11
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21c: 0081082b sltu at,a0,at
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220: 14200001 bnez at,228 <[^>]*>
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224: 00000000 nop
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1e0: 34018000 li at,0x8000
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1e4: 00010c38 dsll at,at,0x10
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1e8: 0081082a slt at,a0,at
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1ec: 10200010 beqz at,230 <[^>]*>
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1f0: 00000000 nop
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1f4: 34018000 li at,0x8000
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1f8: 00010c78 dsll at,at,0x11
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1fc: 0081082b sltu at,a0,at
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200: 1020000b beqz at,230 <[^>]*>
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204: 00000000 nop
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208: 34018000 li at,0x8000
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20c: 00010c38 dsll at,at,0x10
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210: 0081082a slt at,a0,at
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214: 14200006 bnez at,230 <[^>]*>
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218: 00000000 nop
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21c: 34018000 li at,0x8000
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220: 00010c78 dsll at,at,0x11
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224: 0081082b sltu at,a0,at
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228: 14200001 bnez at,230 <[^>]*>
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22c: 00000000 nop
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|
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0+0228 <[^>]*>:
|
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0+0230 <[^>]*>:
|
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...
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|
|
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@ -120,10 +120,10 @@ func:
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# 0198 sltu a0,zero,a0
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move $4, $5 # 019c move a0,a1
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dla $4, shared # 01a0 ld a0,got(.sdata)(gp)
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dla $4, shared # 01a0 lw a0,got(.sdata)(gp)
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# 01a4 nop
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# 01a8 addiu a0,a0,lo(shared)
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dla $4, unshared # 01ac ld a0,got(.data)(gp)
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dla $4, unshared # 01ac lw a0,got(.data)(gp)
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# 01b0 nop
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# 01b4 addiu a0,a0,lo(unshared)
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uld $4, unshared # 01b8 lw at,got(.data)(gp)
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|
|
@ -137,24 +137,26 @@ func:
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# 01d8 sdl a0,0(at)
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# 01dc sdr a0,7(at)
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bgt $4, 0x7fffffff, end # 01e0 lui at,0x8000
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# 01e4 slt at,a0,at
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# 01e8 beqz at,end
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# 01ec nop
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bgtu $4, 0xffffffff, end # 01f0 li at,0x8000
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# 01f4 dsll at,at,17
|
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# 01f8 sltu at,a0,at
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# 01fc beqz at,end
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# 0200 nop
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ble $4, 0x7fffffff, end # 0204 lui at,0x8000
|
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# 0208 slt at,a0,at
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# 020c bnez at,end
|
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# 0210 nop
|
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bleu $4, 0xffffffff, end # 0214 li at,0x8000
|
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# 0218 dsll at,at,17
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# 021c sltu at,a0,at
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# 0220 bnez at,end
|
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# 0224 nop
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bgt $4, 0x7fffffff, end # 01e0 li at,0x8000
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# 01e4 dsll at,at,0x10
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# 01e8 slt at,a0,at
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# 01ec beqz at,end
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# 01f0 nop
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bgtu $4, 0xffffffff, end # 01f4 li at,0x8000
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# 01f8 dsll at,at,17
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# 01fc sltu at,a0,at
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# 0200 beqz at,end
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# 0204 nop
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ble $4, 0x7fffffff, end # 0208 li at,0x8000
|
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# 020c dsll at,at,0x10
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# 0210 slt at,a0,at
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# 0214 bnez at,end
|
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# 0218 nop
|
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bleu $4, 0xffffffff, end # 021c li at,0x8000
|
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# 0220 dsll at,at,17
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# 0224 sltu at,a0,at
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# 0228 bnez at,end
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# 022c nop
|
||||
|
||||
# Should produce warnings given -mfp32
|
||||
# add.d $f1, $f2, $f3
|
||||
|
|
|
|||
|
|
@ -13,19 +13,19 @@ Disassembly of section .text:
|
|||
c: 3c040000 lui a0,0x0
|
||||
10: 24840000 addiu a0,a0,0
|
||||
14: 3c040000 lui a0,0x0
|
||||
18: 24840154 addiu a0,a0,340
|
||||
1c: 08000055 j 154 <[^>]*>
|
||||
20: 0c000055 jal 154 <[^>]*>
|
||||
18: 2484015c addiu a0,a0,348
|
||||
1c: 08000057 j 15c <[^>]*>
|
||||
20: 0c000057 jal 15c <[^>]*>
|
||||
24: 8f84c000 lw a0,-16384\(gp\)
|
||||
28: 3c040000 lui a0,0x0
|
||||
2c: 8c840000 lw a0,0\(a0\)
|
||||
30: 3c040000 lui a0,0x0
|
||||
34: 8c840154 lw a0,340\(a0\)
|
||||
34: 8c84015c lw a0,348\(a0\)
|
||||
38: df84c000 ld a0,-16384\(gp\)
|
||||
3c: 3c040000 lui a0,0x0
|
||||
40: dc840000 ld a0,0\(a0\)
|
||||
44: 3c040000 lui a0,0x0
|
||||
48: dc840154 ld a0,340\(a0\)
|
||||
48: dc84015c ld a0,348\(a0\)
|
||||
4c: af84c000 sw a0,-16384\(gp\)
|
||||
50: 3c010000 lui at,0x0
|
||||
54: ac240000 sw a0,0\(at\)
|
||||
|
|
@ -78,20 +78,22 @@ Disassembly of section .text:
|
|||
110: 24210000 addiu at,at,0
|
||||
114: b0240000 sdl a0,0\(at\)
|
||||
118: b4240007 sdr a0,7\(at\)
|
||||
11c: 3c018000 lui at,0x8000
|
||||
120: 0081082a slt at,a0,at
|
||||
124: 1020000b beqz at,154 <[^>]*>
|
||||
128: 34018000 li at,0x8000
|
||||
12c: 00010c78 dsll at,at,0x11
|
||||
130: 0081082b sltu at,a0,at
|
||||
134: 10200007 beqz at,154 <[^>]*>
|
||||
138: 3c018000 lui at,0x8000
|
||||
13c: 0081082a slt at,a0,at
|
||||
140: 14200004 bnez at,154 <[^>]*>
|
||||
144: 34018000 li at,0x8000
|
||||
148: 00010c78 dsll at,at,0x11
|
||||
14c: 0081082b sltu at,a0,at
|
||||
150: 14200000 bnez at,154 <[^>]*>
|
||||
11c: 34018000 li at,0x8000
|
||||
120: 00010c38 dsll at,at,0x10
|
||||
124: 0081082a slt at,a0,at
|
||||
128: 1020000c beqz at,15c <[^>]*>
|
||||
12c: 34018000 li at,0x8000
|
||||
130: 00010c78 dsll at,at,0x11
|
||||
134: 0081082b sltu at,a0,at
|
||||
138: 10200008 beqz at,15c <[^>]*>
|
||||
13c: 34018000 li at,0x8000
|
||||
140: 00010c38 dsll at,at,0x10
|
||||
144: 0081082a slt at,a0,at
|
||||
148: 14200004 bnez at,15c <[^>]*>
|
||||
14c: 34018000 li at,0x8000
|
||||
150: 00010c78 dsll at,at,0x11
|
||||
154: 0081082b sltu at,a0,at
|
||||
158: 14200000 bnez at,15c <[^>]*>
|
||||
|
||||
0+0154 <[^>]*>:
|
||||
0+015c <[^>]*>:
|
||||
...
|
||||
|
|
|
|||
|
|
@ -85,20 +85,22 @@ func:
|
|||
# 0114 sdl a0,0(at)
|
||||
# 0118 sdr a0,7(at)
|
||||
|
||||
bgt $4, 0x7fffffff, end # 011c lui at,0x8000
|
||||
# 0120 slt at,a0,at
|
||||
# 0124 beqz at,end
|
||||
bgtu $4, 0xffffffff, end # 0128 li at,0x8000
|
||||
# 012c dsll at,at,17
|
||||
# 0130 sltu at,a0,at
|
||||
# 0134 beqz at,end
|
||||
ble $4, 0x7fffffff, end # 0138 lui at,0x8000
|
||||
# 013c slt at,a0,at
|
||||
# 0140 bnez at,end
|
||||
bleu $4, 0xffffffff, end # 0144 li at,0x8000
|
||||
# 0148 dsll at,at,17
|
||||
# 014c sltu at,a0,at
|
||||
# 0150 bnez at,end
|
||||
bgt $4, 0x7fffffff, end # 011c li at,0x8000
|
||||
# 0120 dsll at,at,0x10
|
||||
# 0124 slt at,a0,at
|
||||
# 0128 beqz at,end
|
||||
bgtu $4, 0xffffffff, end # 012c li at,0x8000
|
||||
# 0130 dsll at,at,17
|
||||
# 0134 sltu at,a0,at
|
||||
# 0138 beqz at,end
|
||||
ble $4, 0x7fffffff, end # 013c li at,0x8000
|
||||
# 0140 dsll at,at,0x10
|
||||
# 0144 slt at,a0,at
|
||||
# 0148 bnez at,end
|
||||
bleu $4, 0xffffffff, end # 014c li at,0x8000
|
||||
# 0150 dsll at,at,17
|
||||
# 0154 sltu at,a0,at
|
||||
# 0158 bnez at,end
|
||||
|
||||
# Should produce warnings given -mfp32
|
||||
# add.d $f1, $f2, $f3
|
||||
|
|
|
|||
|
|
@ -22,12 +22,12 @@ Disassembly of section .text:
|
|||
30: 24840000 addiu a0,a0,0
|
||||
34: 8f840000 lw a0,0\(gp\)
|
||||
38: 00000000 nop
|
||||
3c: 2484022c addiu a0,a0,556
|
||||
40: 1000007a b 22c <[^>]*>
|
||||
3c: 24840234 addiu a0,a0,564
|
||||
40: 1000007c b 234 <[^>]*>
|
||||
44: 00000000 nop
|
||||
48: 8f990000 lw t9,0\(gp\)
|
||||
4c: 00000000 nop
|
||||
50: 2739022c addiu t9,t9,556
|
||||
50: 27390234 addiu t9,t9,564
|
||||
54: 0320f809 jalr t9
|
||||
58: 00000000 nop
|
||||
5c: 8fbc0008 lw gp,8\(sp\)
|
||||
|
|
@ -41,7 +41,7 @@ Disassembly of section .text:
|
|||
7c: 8c840000 lw a0,0\(a0\)
|
||||
80: 8f840000 lw a0,0\(gp\)
|
||||
84: 00000000 nop
|
||||
88: 2484022c addiu a0,a0,556
|
||||
88: 24840234 addiu a0,a0,564
|
||||
8c: 8c840000 lw a0,0\(a0\)
|
||||
90: 8f840000 lw a0,0\(gp\)
|
||||
94: 00000000 nop
|
||||
|
|
@ -53,7 +53,7 @@ Disassembly of section .text:
|
|||
ac: dc840000 ld a0,0\(a0\)
|
||||
b0: 8f840000 lw a0,0\(gp\)
|
||||
b4: 00000000 nop
|
||||
b8: 2484022c addiu a0,a0,556
|
||||
b8: 24840234 addiu a0,a0,564
|
||||
bc: dc840000 ld a0,0\(a0\)
|
||||
c0: 8f810000 lw at,0\(gp\)
|
||||
c4: 00000000 nop
|
||||
|
|
@ -111,10 +111,10 @@ Disassembly of section .text:
|
|||
194: 64a40064 daddiu a0,a1,100
|
||||
198: 0004202b sltu a0,zero,a0
|
||||
19c: 00a0202d move a0,a1
|
||||
1a0: df840000 ld a0,0\(gp\)
|
||||
1a0: 8f840000 lw a0,0\(gp\)
|
||||
1a4: 00000000 nop
|
||||
1a8: 24840000 addiu a0,a0,0
|
||||
1ac: df840000 ld a0,0\(gp\)
|
||||
1ac: 8f840000 lw a0,0\(gp\)
|
||||
1b0: 00000000 nop
|
||||
1b4: 24840000 addiu a0,a0,0
|
||||
1b8: 8f810000 lw at,0\(gp\)
|
||||
|
|
@ -127,25 +127,27 @@ Disassembly of section .text:
|
|||
1d4: 24210000 addiu at,at,0
|
||||
1d8: b0240000 sdl a0,0\(at\)
|
||||
1dc: b4240007 sdr a0,7\(at\)
|
||||
1e0: 3c018000 lui at,0x8000
|
||||
1e4: 0081082a slt at,a0,at
|
||||
1e8: 10200010 beqz at,22c <[^>]*>
|
||||
1ec: 00000000 nop
|
||||
1f0: 34018000 li at,0x8000
|
||||
1f4: 00010c78 dsll at,at,0x11
|
||||
1f8: 0081082b sltu at,a0,at
|
||||
1fc: 1020000b beqz at,22c <[^>]*>
|
||||
200: 00000000 nop
|
||||
204: 3c018000 lui at,0x8000
|
||||
208: 0081082a slt at,a0,at
|
||||
20c: 14200007 bnez at,22c <[^>]*>
|
||||
210: 00000000 nop
|
||||
214: 34018000 li at,0x8000
|
||||
218: 00010c78 dsll at,at,0x11
|
||||
21c: 0081082b sltu at,a0,at
|
||||
220: 14200002 bnez at,22c <[^>]*>
|
||||
224: 00000000 nop
|
||||
228: 46231040 add.d \$f1,\$f2,\$f3
|
||||
1e0: 34018000 li at,0x8000
|
||||
1e4: 00010c38 dsll at,at,0x10
|
||||
1e8: 0081082a slt at,a0,at
|
||||
1ec: 10200011 beqz at,234 <[^>]*>
|
||||
1f0: 00000000 nop
|
||||
1f4: 34018000 li at,0x8000
|
||||
1f8: 00010c78 dsll at,at,0x11
|
||||
1fc: 0081082b sltu at,a0,at
|
||||
200: 1020000c beqz at,234 <[^>]*>
|
||||
204: 00000000 nop
|
||||
208: 34018000 li at,0x8000
|
||||
20c: 00010c38 dsll at,at,0x10
|
||||
210: 0081082a slt at,a0,at
|
||||
214: 14200007 bnez at,234 <[^>]*>
|
||||
218: 00000000 nop
|
||||
21c: 34018000 li at,0x8000
|
||||
220: 00010c78 dsll at,at,0x11
|
||||
224: 0081082b sltu at,a0,at
|
||||
228: 14200002 bnez at,234 <[^>]*>
|
||||
22c: 00000000 nop
|
||||
230: 46231040 add.d \$f1,\$f2,\$f3
|
||||
|
||||
0+022c <[^>]*>:
|
||||
0+0234 <[^>]*>:
|
||||
...
|
||||
|
|
|
|||
|
|
@ -120,10 +120,10 @@ func:
|
|||
# 0198 sltu a0,zero,a0
|
||||
move $4, $5 # 019c move a0,a1
|
||||
|
||||
dla $4, shared # 01a0 ld a0,got(.sdata)(gp)
|
||||
dla $4, shared # 01a0 lw a0,got(.sdata)(gp)
|
||||
# 01a4 nop
|
||||
# 01a8 addiu a0,a0,lo(shared)
|
||||
dla $4, unshared # 01ac ld a0,got(.data)(gp)
|
||||
dla $4, unshared # 01ac lw a0,got(.data)(gp)
|
||||
# 01b0 nop
|
||||
# 01b4 addiu a0,a0,lo(unshared)
|
||||
uld $4, unshared # 01b8 lw at,got(.data)(gp)
|
||||
|
|
@ -137,26 +137,28 @@ func:
|
|||
# 01d8 sdl a0,0(at)
|
||||
# 01dc sdr a0,7(at)
|
||||
|
||||
bgt $4, 0x7fffffff, end # 01e0 lui at,0x8000
|
||||
# 01e4 slt at,a0,at
|
||||
# 01e8 beqz at,end
|
||||
# 01ec nop
|
||||
bgtu $4, 0xffffffff, end # 01f0 li at,0x8000
|
||||
# 01f4 dsll at,at,17
|
||||
# 01f8 sltu at,a0,at
|
||||
# 01fc beqz at,end
|
||||
# 0200 nop
|
||||
ble $4, 0x7fffffff, end # 0204 lui at,0x8000
|
||||
# 0208 slt at,a0,at
|
||||
# 020c bnez at,end
|
||||
# 0210 nop
|
||||
bleu $4, 0xffffffff, end # 0214 li at,0x8000
|
||||
# 0218 dsll at,at,17
|
||||
# 021c sltu at,a0,at
|
||||
# 0220 bnez at,end
|
||||
# 0224 nop
|
||||
bgt $4, 0x7fffffff, end # 01e0 li at,0x8000
|
||||
# 01e4 dsll at,at,0x10
|
||||
# 01e8 slt at,a0,at
|
||||
# 01ec beqz at,end
|
||||
# 01f0 nop
|
||||
bgtu $4, 0xffffffff, end # 01f4 li at,0x8000
|
||||
# 01f8 dsll at,at,17
|
||||
# 01fc sltu at,a0,at
|
||||
# 0200 beqz at,end
|
||||
# 0204 nop
|
||||
ble $4, 0x7fffffff, end # 0208 li at,0x8000
|
||||
# 020c dsll at,at,0x10
|
||||
# 0210 slt at,a0,at
|
||||
# 0214 bnez at,end
|
||||
# 0218 nop
|
||||
bleu $4, 0xffffffff, end # 021c li at,0x8000
|
||||
# 0220 dsll at,at,17
|
||||
# 0224 sltu at,a0,at
|
||||
# 0228 bnez at,end
|
||||
# 022c nop
|
||||
|
||||
add.d $f1, $f2, $f3 # 0228 add.d $f1,$f2,$f3
|
||||
add.d $f1, $f2, $f3 # 0230 add.d $f1,$f2,$f3
|
||||
|
||||
.end func
|
||||
end:
|
||||
|
|
|
|||
|
|
@ -13,19 +13,19 @@ Disassembly of section .text:
|
|||
c: 3c040000 lui a0,0x0
|
||||
10: 24840000 addiu a0,a0,0
|
||||
14: 3c040000 lui a0,0x0
|
||||
18: 24840158 addiu a0,a0,344
|
||||
1c: 08000056 j 158 <[^>]*>
|
||||
20: 0c000056 jal 158 <[^>]*>
|
||||
18: 24840160 addiu a0,a0,352
|
||||
1c: 08000058 j 160 <[^>]*>
|
||||
20: 0c000058 jal 160 <[^>]*>
|
||||
24: 8f84c000 lw a0,-16384\(gp\)
|
||||
28: 3c040000 lui a0,0x0
|
||||
2c: 8c840000 lw a0,0\(a0\)
|
||||
30: 3c040000 lui a0,0x0
|
||||
34: 8c840158 lw a0,344\(a0\)
|
||||
34: 8c840160 lw a0,352\(a0\)
|
||||
38: df84c000 ld a0,-16384\(gp\)
|
||||
3c: 3c040000 lui a0,0x0
|
||||
40: dc840000 ld a0,0\(a0\)
|
||||
44: 3c040000 lui a0,0x0
|
||||
48: dc840158 ld a0,344\(a0\)
|
||||
48: dc840160 ld a0,352\(a0\)
|
||||
4c: af84c000 sw a0,-16384\(gp\)
|
||||
50: 3c010000 lui at,0x0
|
||||
54: ac240000 sw a0,0\(at\)
|
||||
|
|
@ -78,21 +78,23 @@ Disassembly of section .text:
|
|||
110: 24210000 addiu at,at,0
|
||||
114: b0240000 sdl a0,0\(at\)
|
||||
118: b4240007 sdr a0,7\(at\)
|
||||
11c: 3c018000 lui at,0x8000
|
||||
120: 0081082a slt at,a0,at
|
||||
124: 1020000c beqz at,158 <[^>]*>
|
||||
128: 34018000 li at,0x8000
|
||||
12c: 00010c78 dsll at,at,0x11
|
||||
130: 0081082b sltu at,a0,at
|
||||
134: 10200008 beqz at,158 <[^>]*>
|
||||
138: 3c018000 lui at,0x8000
|
||||
13c: 0081082a slt at,a0,at
|
||||
140: 14200005 bnez at,158 <[^>]*>
|
||||
144: 34018000 li at,0x8000
|
||||
148: 00010c78 dsll at,at,0x11
|
||||
14c: 0081082b sltu at,a0,at
|
||||
150: 14200001 bnez at,158 <[^>]*>
|
||||
154: 46231040 add.d \$f1,\$f2,\$f3
|
||||
11c: 34018000 li at,0x8000
|
||||
120: 00010c38 dsll at,at,0x10
|
||||
124: 0081082a slt at,a0,at
|
||||
128: 1020000d beqz at,160 <[^>]*>
|
||||
12c: 34018000 li at,0x8000
|
||||
130: 00010c78 dsll at,at,0x11
|
||||
134: 0081082b sltu at,a0,at
|
||||
138: 10200009 beqz at,160 <[^>]*>
|
||||
13c: 34018000 li at,0x8000
|
||||
140: 00010c38 dsll at,at,0x10
|
||||
144: 0081082a slt at,a0,at
|
||||
148: 14200005 bnez at,160 <[^>]*>
|
||||
14c: 34018000 li at,0x8000
|
||||
150: 00010c78 dsll at,at,0x11
|
||||
154: 0081082b sltu at,a0,at
|
||||
158: 14200001 bnez at,160 <[^>]*>
|
||||
15c: 46231040 add.d \$f1,\$f2,\$f3
|
||||
|
||||
0+0158 <[^>]*>:
|
||||
0+0160 <[^>]*>:
|
||||
...
|
||||
|
|
|
|||
|
|
@ -85,22 +85,24 @@ func:
|
|||
# 0114 sdl a0,0(at)
|
||||
# 0118 sdr a0,7(at)
|
||||
|
||||
bgt $4, 0x7fffffff, end # 011c lui at,0x8000
|
||||
# 0120 slt at,a0,at
|
||||
# 0124 beqz at,end
|
||||
bgtu $4, 0xffffffff, end # 0128 li at,0x8000
|
||||
# 012c dsll at,at,17
|
||||
# 0130 sltu at,a0,at
|
||||
# 0134 beqz at,end
|
||||
ble $4, 0x7fffffff, end # 0138 lui at,0x8000
|
||||
# 013c slt at,a0,at
|
||||
# 0140 bnez at,end
|
||||
bleu $4, 0xffffffff, end # 0144 li at,0x8000
|
||||
# 0148 dsll at,at,17
|
||||
# 014c sltu at,a0,at
|
||||
# 0150 bnez at,end
|
||||
bgt $4, 0x7fffffff, end # 011c li at,0x8000
|
||||
# 0120 dsll at,at,0x10
|
||||
# 0124 slt at,a0,at
|
||||
# 0128 beqz at,end
|
||||
bgtu $4, 0xffffffff, end # 012c li at,0x8000
|
||||
# 0130 dsll at,at,17
|
||||
# 0134 sltu at,a0,at
|
||||
# 0138 beqz at,end
|
||||
ble $4, 0x7fffffff, end # 013c li at,0x8000
|
||||
# 0140 dsll at,at,0x10
|
||||
# 0144 slt at,a0,at
|
||||
# 0148 bnez at,end
|
||||
bleu $4, 0xffffffff, end # 014c li at,0x8000
|
||||
# 0150 dsll at,at,17
|
||||
# 0154 sltu at,a0,at
|
||||
# 0158 bnez at,end
|
||||
|
||||
add.d $f1, $f2, $f3 # 0154 add.d $f1,$f2,$f3
|
||||
add.d $f1, $f2, $f3 # 015c add.d $f1,$f2,$f3
|
||||
end:
|
||||
|
||||
# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
|
||||
|
|
|
|||
Loading…
Reference in a new issue