* elf32-arm.h: Fix comment typos.
* elf32-d30v.c: Likewise. * elf32-dlx.c: Likewise. * elf32-h8300.c: Likewise. * elf32-i370.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-mcore.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-sh.c: Likewise. * elf32-v850.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-mips.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-sparc.c: Likewise. * elflink.c: Likewise. * elflink.h: Likewise. * elfn32-mips.c: Likewise. * elfxx-ia64.c: Likewise. * elfxx-mips.c: Likewise.
This commit is contained in:
parent
e4e9607c60
commit
4cc11e7607
29 changed files with 75 additions and 75 deletions
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@ -788,7 +788,7 @@ struct elf_backend_data
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(bfd *, void *, asymbol *);
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/* This function, if defined, is called after all local symbols and
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global symbols converted to locals are emited into the symtab
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global symbols converted to locals are emitted into the symtab
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section. It allows the backend to emit special global symbols
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not handled in the hash table. */
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bfd_boolean (*elf_backend_output_arch_syms)
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@ -1123,7 +1123,7 @@ elf_hppa_remark_useless_dynamic_symbols (struct elf_link_hash_entry *h,
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the generic code will warn that it is undefined.
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This behavior is undesirable on HPs since the standard shared
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libraries contain reerences to undefined symbols.
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libraries contain references to undefined symbols.
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So we twiddle the flags associated with such symbols so that they
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will not trigger the warning. ?!? FIXME. This is horribly fragile.
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@ -1261,7 +1261,7 @@ elf_hppa_final_link (bfd *abfd, struct bfd_link_info *info)
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hppa_info->data_segment_base = (bfd_vma)-1;
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/* HP's shared libraries have references to symbols that are not
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defined anywhere. The generic ELF BFD linker code will complaim
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defined anywhere. The generic ELF BFD linker code will complain
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about such symbols.
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So we detect the losing case and arrange for the flags on the symbol
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@ -469,7 +469,7 @@ mn10200_elf_relocate_section (output_bfd, info, input_bfd, input_section,
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/* This function handles relaxing for the mn10200.
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There's quite a few relaxing opportunites available on the mn10200:
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There are quite a few relaxing opportunities available on the mn10200:
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* jsr:24 -> jsr:16 2 bytes
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@ -918,7 +918,7 @@ mn10200_elf_relax_section (abfd, sec, link_info, again)
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if (value & 0x8000)
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continue;
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/* Note that we've changed the reldection contents, etc. */
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/* Note that we've changed the relocation contents, etc. */
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elf_section_data (sec)->relocs = internal_relocs;
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elf_section_data (sec)->this_hdr.contents = contents;
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symtab_hdr->contents = (unsigned char *) isymbuf;
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@ -957,7 +957,7 @@ mn10200_elf_relax_section (abfd, sec, link_info, again)
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case 0x40:
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case 0x44:
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case 0xc8:
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/* Note that we've changed the reldection contents, etc. */
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/* Note that we've changed the relocation contents, etc. */
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elf_section_data (sec)->relocs = internal_relocs;
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elf_section_data (sec)->this_hdr.contents = contents;
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symtab_hdr->contents = (unsigned char *) isymbuf;
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@ -1040,7 +1040,7 @@ mn10200_elf_relax_section (abfd, sec, link_info, again)
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&& (value & 0x8000) != 0)
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continue;
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/* Note that we've changed the reldection contents, etc. */
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/* Note that we've changed the relocation contents, etc. */
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elf_section_data (sec)->relocs = internal_relocs;
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elf_section_data (sec)->this_hdr.contents = contents;
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symtab_hdr->contents = (unsigned char *) isymbuf;
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@ -85,7 +85,7 @@ struct elf32_mn10300_link_hash_entry {
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to the target when it's valid and profitable to do so. */
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unsigned char movm_args;
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/* For funtion symbols, the amount of stack space that would be allocated
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/* For function symbols, the amount of stack space that would be allocated
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by the movm instruction. This is redundant with movm_args, but we
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add it to the hash table to avoid computing it over and over. */
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unsigned char movm_stack_size;
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@ -1749,7 +1749,7 @@ elf32_mn10300_finish_hash_table_entry (gen_entry, in_args)
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byte_count += 4;
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/* If using "call" will result in larger code, then turn all
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the associated "call" instructions into "calls" instrutions. */
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the associated "call" instructions into "calls" instructions. */
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if (byte_count < entry->direct_calls)
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entry->flags |= MN10300_CONVERT_CALL_TO_CALLS;
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@ -1759,7 +1759,7 @@ elf32_mn10300_finish_hash_table_entry (gen_entry, in_args)
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/* This function handles relaxing for the mn10300.
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There's quite a few relaxing opportunites available on the mn10300:
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There are quite a few relaxing opportunities available on the mn10300:
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* calls:32 -> calls:16 2 bytes
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* call:32 -> call:16 2 bytes
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@ -3487,7 +3487,7 @@ compute_function_info (abfd, hash, addr, contents)
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}
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/* Now figure out how much stack space will be allocated by the movm
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instruction. We need this kept separate from the funtion's normal
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instruction. We need this kept separate from the function's normal
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stack space. */
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if (hash->movm_args)
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{
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@ -4008,7 +4008,7 @@ static const bfd_byte elf_mn10300_pic_plt_entry[PIC_PLT_ENTRY_SIZE] =
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/* Return offset of the GOT id in PLT0 entry. */
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#define elf_mn10300_plt0_gotid_offset(info) 9
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/* Return offset of the tempoline in PLT entry */
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/* Return offset of the temporary in PLT entry */
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#define elf_mn10300_plt_temp_offset(info) 8
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/* Return offset of the symbol in PLT entry. */
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@ -4677,7 +4677,7 @@ copy_private_bfd_data (bfd *ibfd, bfd *obfd)
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if (IS_SOLARIS_PT_INTERP (segment, section))
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{
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/* Mininal change so that the normal section to segment
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assigment code will work. */
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assignment code will work. */
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segment->p_vaddr = section->vma;
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break;
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}
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@ -235,13 +235,13 @@ struct elf32_arm_link_hash_table
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/* The main hash table. */
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struct elf_link_hash_table root;
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/* The size in bytes of the section containg the Thumb-to-ARM glue. */
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/* The size in bytes of the section containing the Thumb-to-ARM glue. */
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bfd_size_type thumb_glue_size;
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/* The size in bytes of the section containg the ARM-to-Thumb glue. */
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/* The size in bytes of the section containing the ARM-to-Thumb glue. */
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bfd_size_type arm_glue_size;
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/* An arbitary input BFD chosen to hold the glue sections. */
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/* An arbitrary input BFD chosen to hold the glue sections. */
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bfd * bfd_of_glue_owner;
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/* A boolean indicating whether knowledge of the ARM's pipeline
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@ -965,7 +965,7 @@ error_return:
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instruction.
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It takes two thumb instructions to encode the target address. Each has
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11 bits to invest. The upper 11 bits are stored in one (identifed by
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11 bits to invest. The upper 11 bits are stored in one (identified by
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H-0.. see below), the lower 11 bits are stored in the other (identified
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by H-1).
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@ -2610,7 +2610,7 @@ elf32_arm_print_private_bfd_data (abfd, ptr)
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switch (EF_ARM_EABI_VERSION (flags))
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{
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case EF_ARM_EABI_UNKNOWN:
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/* The following flag bits are GNU extenstions and not part of the
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/* The following flag bits are GNU extensions and not part of the
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official ARM ELF extended ABI. Hence they are only decoded if
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the EABI version is not set. */
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if (flags & EF_ARM_INTERWORK)
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@ -3985,7 +3985,7 @@ elf32_arm_finish_dynamic_sections (output_bfd, info)
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name = info->fini_function;
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get_sym:
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/* If it wasn't set by elf_bfd_final_link
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then there is nothing to ajdust. */
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then there is nothing to adjust. */
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if (dyn.d_un.d_val != 0)
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{
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struct elf_link_hash_entry * eh;
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@ -293,7 +293,7 @@ bfd_elf_d30v_reloc (abfd, reloc_entry, symbol, data, input_section, output_bfd,
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if (reloc_entry->address > input_section->_cooked_size)
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return bfd_reloc_outofrange;
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/* Work out which section the relocation is targetted at and the
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/* Work out which section the relocation is targeted at and the
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initial relocation command value. */
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/* Get symbol value. (Common symbols are special.) */
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@ -402,7 +402,7 @@ bfd_elf_d30v_reloc_21 (abfd, reloc_entry, symbol, data, input_section, output_bf
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if (reloc_entry->address > input_section->_cooked_size)
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return bfd_reloc_outofrange;
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/* Work out which section the relocation is targetted at and the
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/* Work out which section the relocation is targeted at and the
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initial relocation command value. */
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/* Get symbol value. (Common symbols are special.) */
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@ -228,7 +228,7 @@ HOWTO (R_DLX_RELOC_16_LO, /* type */
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FALSE); /* pcrel_offset */
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/* The gas default beheaver is not to preform the %hi modifier so that the
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/* The gas default behavior is not to preform the %hi modifier so that the
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GNU assembler can have the lower 16 bits offset placed in the insn, BUT
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we do like the gas to indicate it is %hi reloc type so when we in the link
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loader phase we can have the corrected hi16 vale replace the buggous lo16
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@ -493,7 +493,7 @@ elf32_dlx_relocate26 (abfd, reloc_entry, symbol, data,
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More about this table - for dlx elf relocation we do not really
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need this table, if we have a rtype defined in this table will
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caused tc_gen_relocate confused and die on us, but if we remove
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this table it will caused more problem, so for now simple soulation
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this table it will caused more problem, so for now simple solution
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is to remove those entries which may cause problem. */
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struct elf_reloc_map
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{
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@ -649,7 +649,7 @@ elf32_h8_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
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/* This function handles relaxing for the H8..
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There's a few relaxing opportunites available on the H8:
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There are a few relaxing opportunities available on the H8:
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jmp/jsr:24 -> bra/bsr:8 2 bytes
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The jmp may be completely eliminated if the previous insn is a
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/* FALLTHRU */
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/* This is a 24/32bit absolute address in a "mov" insn, which may
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become a 16bit absoulte address if it is in the right range. */
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become a 16-bit absolute address if it is in the right range. */
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case R_H8_DIR32A16:
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{
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bfd_vma value;
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@ -834,7 +834,7 @@ i370_elf_size_dynamic_sections (output_bfd, info)
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FIXME: We assume that there will never be relocations to
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locations in linker-created sections that do not have
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externally-visible names. Instead, we should work out precisely
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which sections relocations are targetted at. */
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which sections relocations are targeted at. */
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if (info->shared)
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{
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int c;
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@ -1007,7 +1007,7 @@ ip2k_elf_relax_section_page (abfd, sec, again, misc, page_start, page_end)
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int switch_table_128;
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int switch_table_256;
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/* Walk thru the section looking for relaxation opertunities. */
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/* Walk thru the section looking for relaxation opportunities. */
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for (irel = misc->irelbase; irel < irelend; irel++)
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{
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if (ELF32_R_TYPE (irel->r_info) != (int) R_IP2K_PAGE3)
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@ -1388,7 +1388,7 @@ ip2k_final_link_relocate (howto, input_bfd, input_section, contents, rel,
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case R_IP2K_ADDR16CJP:
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if (BASEADDR (input_section) + rel->r_offset != page_addr + 2)
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{
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/* No preceeding page instruction, verify that it isn't needed. */
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/* No preceding page instruction, verify that it isn't needed. */
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if (PAGENO (relocation + rel->r_addend) !=
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ip2k_nominal_page_bits (input_bfd, input_section,
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rel->r_offset, contents))
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@ -1398,7 +1398,7 @@ ip2k_final_link_relocate (howto, input_bfd, input_section, contents, rel,
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}
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else if (ip2k_relaxed)
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{
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/* Preceeding page instruction. Verify that the page instruction is
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/* Preceding page instruction. Verify that the page instruction is
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really needed. One reason for the relaxation to miss a page is if
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the section is not marked as executable. */
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if (!ip2k_is_switch_table_128 (input_bfd, input_section, rel->r_offset - 2, contents) &&
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@ -954,7 +954,7 @@ m68hc11_elf_relax_section (bfd *abfd, asection *sec,
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{
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unsigned long old_sec_size = sec->_cooked_size;
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/* Note that we've changed the reldection contents, etc. */
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/* Note that we've changed the relocation contents, etc. */
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elf_section_data (sec)->relocs = internal_relocs;
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free_relocs = NULL;
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@ -985,7 +985,7 @@ m68hc11_elf_relax_section (bfd *abfd, asection *sec,
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continue;
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}
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/* Note that we've changed the reldection contents, etc. */
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/* Note that we've changed the relocation contents, etc. */
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elf_section_data (sec)->relocs = internal_relocs;
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free_relocs = NULL;
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@ -1030,7 +1030,7 @@ m68hc11_elf_relax_section (bfd *abfd, asection *sec,
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if ((offset & 0xff80) == 0 || (offset & 0xff80) == 0xff80)
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{
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/* Note that we've changed the reldection contents, etc. */
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/* Note that we've changed the relocation contents, etc. */
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elf_section_data (sec)->relocs = internal_relocs;
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free_relocs = NULL;
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@ -84,7 +84,7 @@ static reloc_howto_type mcore_elf_howto_raw[] =
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0, /* bitpos */
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complain_overflow_bitfield, /* complain_on_overflow */
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bfd_elf_generic_reloc, /* special_function */
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"ADDR32", /* name *//* For compatability with coff/pe port. */
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"ADDR32", /* name *//* For compatibility with coff/pe port. */
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FALSE, /* partial_inplace */
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0x0, /* src_mask */
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0xffffffff, /* dst_mask */
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@ -1764,7 +1764,7 @@ ppc_elf_relax_section (bfd *abfd,
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}
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isym = isymbuf + ELF32_R_SYM (irel->r_info);
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if (isym->st_shndx == SHN_UNDEF)
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continue; /* We can't do anthing with undefined symbols. */
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continue; /* We can't do anything with undefined symbols. */
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else if (isym->st_shndx == SHN_ABS)
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tsec = bfd_abs_section_ptr;
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else if (isym->st_shndx == SHN_COMMON)
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@ -4919,7 +4919,7 @@ ppc_elf_relocate_section (bfd *output_bfd,
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branch_bit = BRANCH_PREDICT_BIT;
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/* Fall thru */
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/* Branch not taken predicition relocations. */
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/* Branch not taken prediction relocations. */
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case R_PPC_ADDR14_BRNTAKEN:
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case R_PPC_REL14_BRNTAKEN:
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insn = bfd_get_32 (output_bfd, contents + rel->r_offset);
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|
|
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@ -484,7 +484,7 @@ elf_s390_is_local_label_name (abfd, name)
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Word 1 is a pointer to a structure describing the object
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Word 2 is used to point to the loader entry address.
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The code for position independand PLT entries looks like this:
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The code for position independent PLT entries looks like this:
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r12 holds addr of the current GOT at entry to the PLT
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|
|
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@ -457,7 +457,7 @@ static reloc_howto_type sh_elf_howto_table[] =
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TRUE), /* pcrel_offset */
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/* The assembler will generate this reloc before a block of
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instructions. A section should be processed as assumining it
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instructions. A section should be processed as assuming it
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contains data, unless this reloc is seen. */
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HOWTO (R_SH_CODE, /* type */
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0, /* rightshift */
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|
@ -2718,7 +2718,7 @@ sh_elf_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr,
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/* The addend will be against the section symbol, thus
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for adjusting the addend, the relevant start is the
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start of the section.
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N.B. If we want to abandom in-place changes here and
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N.B. If we want to abandon in-place changes here and
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test directly using symbol + addend, we have to take into
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account that the addend has already been adjusted by -4. */
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if (stop > addr && stop < toaddr)
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|
@ -3412,7 +3412,7 @@ movi_shori_putval (bfd *output_bfd, unsigned long value, char *addr)
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#if 1
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/* Note - this code has been "optimised" not to use r2. r2 is used by
|
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GCC to return the address of large strutcures, so it should not be
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GCC to return the address of large structures, so it should not be
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corrupted here. This does mean however, that this PLT does not conform
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to the SH PIC ABI. That spec says that r0 contains the type of the PLT
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and r2 contains the GOT id. This version stores the GOT id in r0 and
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|
@ -3635,7 +3635,7 @@ static const bfd_byte *elf_sh_pic_plt_entry;
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/* Return offset of the GOT id in PLT0 entry. */
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#define elf_sh_plt0_gotid_offset(info) 24
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/* Return offset of the tempoline in PLT entry */
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/* Return offset of the temporary in PLT entry */
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#define elf_sh_plt_temp_offset(info) 8
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/* Return offset of the symbol in PLT entry. */
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|
|
|
@ -893,7 +893,7 @@ find_remembered_hi16s_reloc (addend, already_found)
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/* Extract the address. */
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addr = match->address;
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/* Remeber if this entry has already been used before. */
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/* Remember if this entry has already been used before. */
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if (already_found)
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* already_found = match->found;
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|
@ -904,7 +904,7 @@ find_remembered_hi16s_reloc (addend, already_found)
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}
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||||
|
||||
/* FIXME: The code here probably ought to be removed and the code in reloc.c
|
||||
allowed to do its stuff instead. At least for most of the relocs, anwyay. */
|
||||
allowed to do its stuff instead. At least for most of the relocs, anyway. */
|
||||
|
||||
static bfd_reloc_status_type
|
||||
v850_elf_perform_relocation (abfd, r_type, addend, address)
|
||||
|
@ -1362,7 +1362,7 @@ v850_elf_reloc (abfd, reloc, symbol, data, isection, obfd, err)
|
|||
if (reloc->address > isection->_cooked_size)
|
||||
return bfd_reloc_outofrange;
|
||||
|
||||
/* Work out which section the relocation is targetted at and the
|
||||
/* Work out which section the relocation is targeted at and the
|
||||
initial relocation command value. */
|
||||
|
||||
if (reloc->howto->pc_relative)
|
||||
|
|
|
@ -1714,7 +1714,7 @@ bfd_elf_xtensa_reloc (abfd, reloc_entry, symbol, data, input_section,
|
|||
/ bfd_octets_per_byte (abfd)))
|
||||
return bfd_reloc_outofrange;
|
||||
|
||||
/* Work out which section the relocation is targetted at and the
|
||||
/* Work out which section the relocation is targeted at and the
|
||||
initial relocation command value. */
|
||||
|
||||
/* Get symbol value. (Common symbols are special.) */
|
||||
|
@ -4171,7 +4171,7 @@ analyze_relocations (link_info)
|
|||
expensive and unnecessary unless the target section is actually going
|
||||
to be relaxed. This pass identifies all such sections by checking if
|
||||
they have L32Rs pointing to them. In the process, the total number
|
||||
of relocations targetting each section is also counted so that we
|
||||
of relocations targeting each section is also counted so that we
|
||||
know how much space to allocate for source_relocs against each
|
||||
relaxable literal section. */
|
||||
|
||||
|
|
|
@ -3640,7 +3640,7 @@ elf64_alpha_size_got_sections (info)
|
|||
if (this_got == NULL)
|
||||
continue;
|
||||
|
||||
/* We are assuming no merging has yet ocurred. */
|
||||
/* We are assuming no merging has yet occurred. */
|
||||
BFD_ASSERT (this_got == i);
|
||||
|
||||
if (alpha_elf_tdata (this_got)->total_got_size > MAX_GOT_SIZE)
|
||||
|
|
|
@ -975,7 +975,7 @@ elf64_hppa_dynamic_symbol_p (h, info)
|
|||
return FALSE;
|
||||
}
|
||||
|
||||
/* Mark all funtions exported by this file so that we can later allocate
|
||||
/* Mark all functions exported by this file so that we can later allocate
|
||||
entries in .opd for them. */
|
||||
|
||||
static bfd_boolean
|
||||
|
@ -1211,7 +1211,7 @@ elf64_hppa_post_process_headers (abfd, link_info)
|
|||
}
|
||||
|
||||
/* Create function descriptor section (.opd). This section is called .opd
|
||||
because it contains "official prodecure descriptors". The "official"
|
||||
because it contains "official procedure descriptors". The "official"
|
||||
refers to the fact that these descriptors are used when taking the address
|
||||
of a procedure, thus ensuring a unique address for each procedure. */
|
||||
|
||||
|
@ -2281,7 +2281,7 @@ elf64_hppa_finalize_dlt (dyn_h, data)
|
|||
bfd_put_64 (sdlt->owner, value, sdlt->contents + dyn_h->dlt_offset);
|
||||
}
|
||||
|
||||
/* Create a relocation for the DLT entry assocated with this symbol.
|
||||
/* Create a relocation for the DLT entry associated with this symbol.
|
||||
When building a shared library the symbol does not have to be dynamic. */
|
||||
if (dyn_h->want_dlt
|
||||
&& (elf64_hppa_dynamic_symbol_p (dyn_h->h, info) || info->shared))
|
||||
|
|
|
@ -475,7 +475,7 @@ static reloc_howto_type mips_elf64_howto_table_rel[] =
|
|||
0x0000ffff, /* dst_mask */
|
||||
FALSE), /* pcrel_offset */
|
||||
|
||||
/* 64 bit substraction. */
|
||||
/* 64 bit subtraction. */
|
||||
HOWTO (R_MIPS_SUB, /* type */
|
||||
0, /* rightshift */
|
||||
4, /* size (0 = byte, 1 = short, 2 = long) */
|
||||
|
@ -970,7 +970,7 @@ static reloc_howto_type mips_elf64_howto_table_rela[] =
|
|||
0x0000ffff, /* dst_mask */
|
||||
FALSE), /* pcrel_offset */
|
||||
|
||||
/* 64 bit substraction. */
|
||||
/* 64 bit subtraction. */
|
||||
HOWTO (R_MIPS_SUB, /* type */
|
||||
0, /* rightshift */
|
||||
4, /* size (0 = byte, 1 = short, 2 = long) */
|
||||
|
|
|
@ -1280,7 +1280,7 @@ mmix_elf_reloc (abfd, reloc_entry, symbol, data, input_section,
|
|||
if (reloc_entry->address > input_section->_cooked_size)
|
||||
return bfd_reloc_outofrange;
|
||||
|
||||
/* Work out which section the relocation is targetted at and the
|
||||
/* Work out which section the relocation is targeted at and the
|
||||
initial relocation command value. */
|
||||
|
||||
/* Get symbol value. (Common symbols are special.) */
|
||||
|
|
|
@ -2641,7 +2641,7 @@ struct plt_entry
|
|||
pointers must reference the descriptor. Thus, a function pointer
|
||||
initialized to the address of a function in a shared library will
|
||||
either require a copy reloc, or a dynamic reloc. Using a copy reloc
|
||||
redefines the function desctriptor symbol to point to the copy. This
|
||||
redefines the function descriptor symbol to point to the copy. This
|
||||
presents a problem as a plt entry for that function is also
|
||||
initialized from the function descriptor symbol and the copy reloc
|
||||
may not be initialized first. */
|
||||
|
|
|
@ -1502,7 +1502,7 @@ sparc64_elf_add_symbol_hook (abfd, info, sym, namep, flagsp, secp, valp)
|
|||
return TRUE;
|
||||
}
|
||||
|
||||
/* This function takes care of emiting STT_REGISTER symbols
|
||||
/* This function takes care of emitting STT_REGISTER symbols
|
||||
which we cannot easily keep in the symbol hash table. */
|
||||
|
||||
static bfd_boolean
|
||||
|
|
|
@ -795,7 +795,7 @@ _bfd_elf_merge_symbol (bfd *abfd,
|
|||
else
|
||||
olddef = TRUE;
|
||||
|
||||
/* We need to rememeber if a symbol has a definition in a dynamic
|
||||
/* We need to remember if a symbol has a definition in a dynamic
|
||||
object or is weak in all dynamic objects. Internal and hidden
|
||||
visibility will make it unavailable to dynamic objects. */
|
||||
if (newdyn && (h->elf_link_hash_flags & ELF_LINK_DYNAMIC_DEF) == 0)
|
||||
|
@ -858,7 +858,7 @@ _bfd_elf_merge_symbol (bfd *abfd,
|
|||
return TRUE;
|
||||
}
|
||||
|
||||
/* We need to treat weak definiton right, depending on if there is a
|
||||
/* We need to treat weak definition right, depending on if there is a
|
||||
definition from a dynamic object. */
|
||||
if (bind == STB_WEAK)
|
||||
{
|
||||
|
@ -1127,7 +1127,7 @@ _bfd_elf_merge_symbol (bfd *abfd,
|
|||
h->size, abfd, bfd_link_hash_common, sym->st_size)))
|
||||
return FALSE;
|
||||
|
||||
/* If the predumed common symbol in the dynamic object is
|
||||
/* If the presumed common symbol in the dynamic object is
|
||||
larger, pretend that the new symbol has its size. */
|
||||
|
||||
if (h->size > *pvalue)
|
||||
|
@ -1257,7 +1257,7 @@ _bfd_elf_add_default_symbol (bfd *abfd,
|
|||
|
||||
if (override)
|
||||
{
|
||||
/* We are overridden by an old defition. We need to check if we
|
||||
/* We are overridden by an old definition. We need to check if we
|
||||
need to create the indirect symbol from the default name. */
|
||||
hi = elf_link_hash_lookup (elf_hash_table (info), name, TRUE,
|
||||
FALSE, FALSE);
|
||||
|
@ -1416,7 +1416,7 @@ nondefault:
|
|||
{
|
||||
/* Here SHORTNAME is a versioned name, so we don't expect to see
|
||||
the type of override we do in the case above unless it is
|
||||
overridden by a versioned definiton. */
|
||||
overridden by a versioned definition. */
|
||||
if (hi->root.type != bfd_link_hash_defined
|
||||
&& hi->root.type != bfd_link_hash_defweak)
|
||||
(*_bfd_error_handler)
|
||||
|
|
|
@ -875,7 +875,7 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info)
|
|||
{
|
||||
/* This should be impossible, since ELF requires that all
|
||||
global symbols follow all local symbols, and that sh_info
|
||||
point to the first global symbol. Unfortunatealy, Irix 5
|
||||
point to the first global symbol. Unfortunately, Irix 5
|
||||
screws this up. */
|
||||
continue;
|
||||
}
|
||||
|
@ -1174,7 +1174,7 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info)
|
|||
int new_flag;
|
||||
|
||||
/* Check the alignment when a common symbol is involved. This
|
||||
can change when a common symbol is overriden by a normal
|
||||
can change when a common symbol is overridden by a normal
|
||||
definition or a common symbol is ignored due to the old
|
||||
normal definition. We need to make sure the maximum
|
||||
alignment is maintained. */
|
||||
|
@ -1832,7 +1832,7 @@ compute_bucket_count (struct bfd_link_info *info)
|
|||
|
||||
# if 1
|
||||
/* Variant 1: optimize for short chains. We add the squares
|
||||
of all the chain lengths (which favous many small chain
|
||||
of all the chain lengths (which favors many small chain
|
||||
over a few long chains). */
|
||||
for (j = 0; j < i; ++j)
|
||||
max += counts[j] * counts[j];
|
||||
|
@ -2056,7 +2056,7 @@ NAME(bfd_elf,size_dynamic_sections) (bfd *output_bfd,
|
|||
return FALSE;
|
||||
}
|
||||
|
||||
/* Make all global versions with definiton. */
|
||||
/* Make all global versions with definition. */
|
||||
for (t = verdefs; t != NULL; t = t->next)
|
||||
for (d = t->globals.list; d != NULL; d = d->next)
|
||||
if (!d->symver && d->symbol)
|
||||
|
@ -2121,7 +2121,7 @@ NAME(bfd_elf,size_dynamic_sections) (bfd *output_bfd,
|
|||
|
||||
if (!info->allow_undefined_version)
|
||||
{
|
||||
/* Check if all global versions have a definiton. */
|
||||
/* Check if all global versions have a definition. */
|
||||
all_defined = TRUE;
|
||||
for (t = verdefs; t != NULL; t = t->next)
|
||||
for (d = t->globals.list; d != NULL; d = d->next)
|
||||
|
@ -5674,7 +5674,7 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *idxptr)
|
|||
return TRUE;
|
||||
}
|
||||
|
||||
/* Propogate collected vtable information. This is called through
|
||||
/* Propagate collected vtable information. This is called through
|
||||
elf_link_hash_traverse. */
|
||||
|
||||
static bfd_boolean
|
||||
|
@ -5840,7 +5840,7 @@ elf_gc_sections (bfd *abfd, struct bfd_link_info *info)
|
|||
return TRUE;
|
||||
}
|
||||
|
||||
/* Called from check_relocs to record the existance of a VTINHERIT reloc. */
|
||||
/* Called from check_relocs to record the existence of a VTINHERIT reloc. */
|
||||
|
||||
bfd_boolean
|
||||
elf_gc_record_vtinherit (bfd *abfd,
|
||||
|
@ -5896,7 +5896,7 @@ elf_gc_record_vtinherit (bfd *abfd,
|
|||
return TRUE;
|
||||
}
|
||||
|
||||
/* Called from check_relocs to record the existance of a VTENTRY reloc. */
|
||||
/* Called from check_relocs to record the existence of a VTENTRY reloc. */
|
||||
|
||||
bfd_boolean
|
||||
elf_gc_record_vtentry (bfd *abfd ATTRIBUTE_UNUSED,
|
||||
|
|
|
@ -941,7 +941,7 @@ static reloc_howto_type elf_mips_howto_table_rela[] =
|
|||
0x0000ffff, /* dst_mask */
|
||||
FALSE), /* pcrel_offset */
|
||||
|
||||
/* 64 bit substraction. */
|
||||
/* 64 bit subtraction. */
|
||||
HOWTO (R_MIPS_SUB, /* type */
|
||||
0, /* rightshift */
|
||||
4, /* size (0 = byte, 1 = short, 2 = long) */
|
||||
|
|
|
@ -53,7 +53,7 @@
|
|||
descriptor for a MIN_PLT entry, and requires one IPLT reloc.
|
||||
|
||||
MIN_PLT Created by PLTOFF entries against dynamic symbols. This
|
||||
does not reqire dynamic relocations. */
|
||||
does not require dynamic relocations. */
|
||||
|
||||
#define NELEMS(a) ((int) (sizeof (a) / sizeof ((a)[0])))
|
||||
|
||||
|
@ -81,7 +81,7 @@ struct elfNN_ia64_dyn_sym_info
|
|||
bfd_vma dtpmod_offset;
|
||||
bfd_vma dtprel_offset;
|
||||
|
||||
/* The symbol table entry, if any, that this was derrived from. */
|
||||
/* The symbol table entry, if any, that this was derived from. */
|
||||
struct elf_link_hash_entry *h;
|
||||
|
||||
/* Used to count non-got, non-plt relocations for delayed sizing
|
||||
|
@ -804,7 +804,7 @@ elfNN_ia64_relax_section (abfd, sec, link_info, again)
|
|||
|
||||
isym = isymbuf + ELFNN_R_SYM (irel->r_info);
|
||||
if (isym->st_shndx == SHN_UNDEF)
|
||||
continue; /* We can't do anthing with undefined symbols. */
|
||||
continue; /* We can't do anything with undefined symbols. */
|
||||
else if (isym->st_shndx == SHN_ABS)
|
||||
tsec = bfd_abs_section_ptr;
|
||||
else if (isym->st_shndx == SHN_COMMON)
|
||||
|
@ -852,7 +852,7 @@ elfNN_ia64_relax_section (abfd, sec, link_info, again)
|
|||
|
||||
else
|
||||
{
|
||||
/* We can't do anthing with undefined symbols. */
|
||||
/* We can't do anything with undefined symbols. */
|
||||
if (h->root.type == bfd_link_hash_undefined
|
||||
|| h->root.type == bfd_link_hash_undefweak)
|
||||
continue;
|
||||
|
@ -1954,7 +1954,7 @@ get_got (abfd, info, ia64_info)
|
|||
}
|
||||
|
||||
/* Create function descriptor section (.opd). This section is called .opd
|
||||
because it contains "official prodecure descriptors". The "official"
|
||||
because it contains "official procedure descriptors". The "official"
|
||||
refers to the fact that these descriptors are used when taking the address
|
||||
of a procedure, thus ensuring a unique address for each procedure. */
|
||||
|
||||
|
|
|
@ -2319,7 +2319,7 @@ mips_elf_merge_gots (bfd2got_, p)
|
|||
first available global GOT entry in G. VALUE must contain the size
|
||||
of a GOT entry in bytes. For each global GOT entry that requires a
|
||||
dynamic relocation, NEEDED_RELOCS is incremented, and the symbol is
|
||||
marked as not elligible for lazy resolution through a function
|
||||
marked as not eligible for lazy resolution through a function
|
||||
stub. */
|
||||
static int
|
||||
mips_elf_set_global_got_offset (entryp, p)
|
||||
|
@ -2738,7 +2738,7 @@ _bfd_mips_elf_sign_extend (value, bits)
|
|||
}
|
||||
|
||||
/* Return non-zero if the indicated VALUE has overflowed the maximum
|
||||
range expressable by a signed number with the indicated number of
|
||||
range expressible by a signed number with the indicated number of
|
||||
BITS. */
|
||||
|
||||
static bfd_boolean
|
||||
|
|
Loading…
Reference in a new issue