Rewrite SPU overlay handling code. Put overlay calls stubs in the
overlays where possible. Use a faster call stub, or optionally at compile time, a more compact stub. Double size of _ovly_buf_table so that low bit of _ovly_table.buf can be used as a "present" bit. Reserve an extra _ovly_table entry for index zero.
This commit is contained in:
Alan Modra
parent
8693ff0ffb
commit
47f6dab9a3
10 changed files with 1147 additions and 1292 deletions
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@ -1,3 +1,46 @@
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2008-01-28 Alan Modra <amodra@bigpond.net.au>
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Rewrite SPU overlay handling code. Put overlay calls stubs in the
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overlays where possible. Use a faster call stub, or optionally at
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compile time, a more compact stub. Double size of _ovly_buf_table
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so that low bit of _ovly_table.buf can be used as a "present" bit.
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Reserve an extra _ovly_table entry for index zero.
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* elf32-spu.c: (struct spu_link_hash_table): Delete a number of fields,
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add new ones.
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(struct got_entry): New.
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(struct spu_stub_hash_entry): Delete.
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(stub_hash_newfunc, spu_elf_link_hash_table_free): Delete.
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(spu_elf_link_hash_table_create): Adjust for struct changes.
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(spu_stub_name): Delete.
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(spu_elf_find_overlays): Don't track sections from overlay regions.
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Instead set ovl_buf number in spu elf section data. Error if
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overlays in one region don't start at the same address. Adjust
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for struct _spu_elf_section_data changes.
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(SIZEOF_STUB1, SIZEOF_STUB2, ILA_79, ILA_78): Delete.
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(OVL_STUB_SIZE, BRSL, LNOP, ILA): Define.
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(needs_ovl_stub): Adjust for struct _spu_elf_section_data changes.
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(enum _insn_type): New.
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(count_stub, build_stub): New functions.
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(allocate_spuear_stubs): Use count_stub.
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(build_spuear_stubs): Use build_stub.
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(populate_stubs, sort_stubs): Delete.
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(process_stubs): New function.
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(write_one_stub): Delete.
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(spu_elf_size_stubs, spu_elf_build_stubs): Rewrite.
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(alloc_stack_info): Adjust for struct _spu_elf_section_data changes.
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(maybe_insert_function, check_function_ranges): Likewise.
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(find_function, pasted_function, build_call_tree): Likewise.
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(spu_elf_stack_analysis, spu_elf_modify_segment_map): Likewise.
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(spu_elf_modify_program_headers): Likewise.
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(interesting_section): Detect stub sections differently. Delete
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htab param, adjust all callers.
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(spu_elf_relocate_section): Rewrite stub handling.
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(spu_elf_output_symbol_hook): Likewise.
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(bfd_elf32_bfd_link_hash_table_free): Delete.
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* elf32-spu.h (struct _spu_elf_section_data): Move input-only and
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output-only fields into a union. Add ovl_buf.
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(spu_elf_size_stubs, spu_elf_build_stubs): Update prototypes.
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2008-01-25 DJ Delorie <dj@redhat.com>
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* elf32-m32c.c (_bfd_m32c_elf_eh_frame_address_size): New.
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1148
bfd/elf32-spu.c
1148
bfd/elf32-spu.c
File diff suppressed because it is too large
Load diff
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@ -26,12 +26,20 @@ struct _spu_elf_section_data
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{
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struct bfd_elf_section_data elf;
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/* Stack analysis info kept for this section. */
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union {
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/* Info kept for input sections. */
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struct {
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/* Stack analysis info kept for this section. */
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struct spu_elf_stack_info *stack_info;
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} i;
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struct spu_elf_stack_info *stack_info;
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/* Non-zero for overlay output sections. */
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unsigned int ovl_index;
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/* Info kept for output sections. */
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struct {
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/* Non-zero for overlay output sections. */
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unsigned int ovl_index;
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unsigned int ovl_buf;
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} o;
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} u;
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};
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#define spu_elf_section_data(sec) \
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@ -49,9 +57,8 @@ extern bfd_boolean spu_elf_open_builtin_lib (bfd **,
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extern bfd_boolean spu_elf_create_sections (bfd *,
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struct bfd_link_info *, int, int);
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extern bfd_boolean spu_elf_find_overlays (bfd *, struct bfd_link_info *);
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extern bfd_boolean spu_elf_size_stubs (bfd *, struct bfd_link_info *, int, int,
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asection **, asection **,
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asection **);
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extern bfd_boolean spu_elf_build_stubs (struct bfd_link_info *, int,
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asection *);
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extern int spu_elf_size_stubs (bfd *, struct bfd_link_info *,
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void (*) (asection *, asection *, const char *),
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int);
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extern bfd_boolean spu_elf_build_stubs (struct bfd_link_info *, int);
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extern asection *spu_elf_check_vma (bfd *, bfd_vma, bfd_vma);
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12
ld/ChangeLog
12
ld/ChangeLog
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@ -1,3 +1,15 @@
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2008-01-28 Alan Modra <amodra@bigpond.net.au>
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* emultempl/spu_ovl.S: Rewrite.
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* emultempl/spu_ovl.o: Regenerate.
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* emultempl/spuelf.em (toe): Delete.
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(spu_place_special_section): Add param to control section placement.
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Adjust callers.
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(spu_elf_load_ovl_mgr): Adjust for struct _spu_elf_section_data
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changes.
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(spu_before_allocation): Adjust spu_elf_size_stubs call.
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(gld${EMULATION_NAME}_finish): Adjust spu_elf_build_stubs call.
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2008-01-25 H.J. Lu <hongjiu.lu@intel.com>
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PR ld/5670
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@ -19,295 +19,242 @@
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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/**
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* MFC DMA defn's.
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*/
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/* MFC DMA defn's. */
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#define MFC_GET_CMD 0x40
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#define MFC_MAX_DMA_SIZE 0x4000
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#define MFC_TAG_UPDATE_ALL 2
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#define MFC_TAG_ID 0
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/* Register usage. */
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#define reserved1 $75
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#define parm $75
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#define tab1 reserved1
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#define tab2 reserved1
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#define vma reserved1
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#define oldvma reserved1
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#define newmask reserved1
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#define map reserved1
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/**
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* Temporary register allocations.
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* These are saved/restored here.
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*/
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#define tab $75
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#define cgbits $75
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#define add64 $75
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#define ealo $75
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#define newmask $75
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#define tagstat $75
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#define bchn $75
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#define rv1 $75
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#define reserved2 $76
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#define off1 reserved2
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#define off2 reserved2
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#define present1 reserved2
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#define present2 reserved2
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#define sz reserved2
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#define cmp reserved2
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#define add64 reserved2
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#define cgbits reserved2
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#define off3 reserved2
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#define off4 reserved2
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#define off5 reserved2
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#define tagstat reserved2
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#define off $76
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#define off64 $76
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#define maxsize $76
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#define oldmask $76
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#define sz $76
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#define lnkr $76
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#define rv2 $76
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#define reserved3 $77
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#define buf1 reserved3
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#define buf2 reserved3
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#define rv3 reserved3
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#define ealo reserved3
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#define cmd reserved3
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#define off64 reserved3
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#define tab3 reserved3
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#define tab4 reserved3
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#define tab5 reserved3
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#define cur $77
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#define cmp $77
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#define buf $77
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#define genwi $77
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#define tagid $77
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#define cmd $77
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#define rv3 $77
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#define reserved4 $78
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#define ovl reserved4
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#define rv2 reserved4
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#define rv5 reserved4
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#define cgshuf reserved4
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#define newovl reserved4
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#define cgshuf $78
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#define reserved5 $79
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#define target reserved5
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#define vma $6
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#define save1 $72
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#define rv4 save1
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#define rv7 save1
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#define tagid save1
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#define maxsize save1
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#define pbyte save1
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#define pbit save1
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#define map $7
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#define osize $7
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#define cmp2 $7
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#define save2 $73
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#define cur save2
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#define rv6 save2
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#define osize save2
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#define zovl save2
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#define oldovl save2
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#define newvma save2
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#define ea64 $8
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#define retval $8
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#define save3 $74
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#define rv1 save3
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#define ea64 save3
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#define buf3 save3
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#define genwi save3
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#define newmap save3
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#define oldmask save3
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#ifdef OVLY_IRQ_SAVE
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#define irqtmp $8
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#define irq_stat $9
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#endif
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# Stack quadword minux N
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#define SQWM1 -16*1
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#define SQWM2 -16*2
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#define SQWM3 -16*3
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#define SQWM4 -16*4
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#define SQWM5 -16*5
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#define SQWM6 -16*6
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#define SQWM7 -16*7
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#define SQWM8 -16*8
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#define SQWM9 -16*9
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#define SQWM10 -16*10
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#define SQWM11 -16*11
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#define SQWM12 -16*12
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#define SQWM13 -16*13
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#define SQWM14 -16*14
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#define SQWM15 -16*15
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#define SQWM16 -16*16
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.extern _ovly_table
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.extern _ovly_buf_table
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#ifdef OVLY_PRINTFS
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#define SPE_C99_VPRINTF 37
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__entry_event_format:
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.string "In entry_event_hook segment=0x%08x entry-address=0x%08x\n"
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__debug_event_format:
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.string "In debug_event_hook link-register=0x%08x %08x %08x %08x\n"
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__dma_event_format:
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.string "In dma_event_hook vma=0x%08x ea=%08x%08x sz=%08x\n"
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__ovly_buf_table_format:
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.string "_ovly_buf_table[%08x]=%08x\n"
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#endif
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.text
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.align 4
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.type __rv_pattern, @object
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.size __rv_pattern, 16
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.align 4
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.type __rv_pattern, @object
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.size __rv_pattern, 16
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__rv_pattern:
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.word 0x00010203, 0x1c1d1e1f, 0x00010203, 0x10111213
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.type __cg_pattern, @object
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.size __cg_pattern, 16
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__cg_pattern:
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.word 0x04050607, 0x80808080, 0x80808080, 0x80808080
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.word 0x00010203, 0x10111213, 0x80808080, 0x80808080
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/**
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.type __cg_pattern, @object
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.size __cg_pattern, 16
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__cg_pattern:
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.word 0x04050607, 0x80808080, 0x80808080, 0x80808080
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.type __ovly_current, @object
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.size __ovly_current, 16
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__ovly_current:
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.space 16
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/*
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* __ovly_return - stub for returning from overlay functions.
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*
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* inputs:
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* $lr link register
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* On entry the four slots of $lr are:
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* __ovly_return, prev ovl index, caller return addr, undefined.
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*
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* outputs:
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* $78 old partition number, to be reloaded
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* $79 return address in old partion number
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* Load the previous overlay and jump to the caller return address.
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* Updates __ovly_current.
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*/
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.global __ovly_return
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.type __ovly_return, @function
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.word 0
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.align 4
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.global __ovly_return
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.type __ovly_return, @function
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__ovly_return:
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shlqbyi $78, $lr, 4
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shlqbyi $79, $lr, 8
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biz $78, $79
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.size __ovly_return, . - __ovly_return
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ila tab1, _ovly_table - 16 # 0,2 0
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shlqbyi ovl, $lr, 4 # 1,4 0
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#nop
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shlqbyi target, $lr, 8 # 1,4 1
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#nop; lnop
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#nop; lnop
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shli off1, ovl, 4 # 0,4 4
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#lnop
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#nop
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hbr ovly_ret9, target # 1,15 5
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#nop; lnop
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#nop; lnop
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#nop
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lqx vma, tab1, off1 # 1,6 8
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#nop; lnop
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#nop; lnop
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#nop; lnop
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#nop; lnop
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#nop; lnop
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#nop
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rotqbyi buf1, vma, 12 # 1,4 14
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#nop
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stqd save3, -48($sp) # 1,6 15
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#nop
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stqd save2, -32($sp) # 1,6 16
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#nop
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stqd save1, -16($sp) # 1,6 17
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andi present1, buf1, 1 # 0,2 18
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stqd ovl, (__ovly_current - __ovly_return)($lr) # 1,6 18
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#nop; lnop
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#nop
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brz present1, __ovly_load_event # 1,4 20
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ovly_ret9:
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#nop
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bi target # 1,4 21
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/**
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/*
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* __ovly_load - copy an overlay partion to local store.
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*
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* inputs:
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* $78 partition number to be loaded.
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* $79 branch target in new partition.
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* $lr link register, containing return addr.
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* On entry $75 points to a word consisting of the overlay index in
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* the top 14 bits, and the target address in the bottom 18 bits.
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*
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* outputs:
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* $lr new link register, returning through __ovly_return.
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*
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* Copy a new overlay partition into local store, or return
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* immediately if the partition is already resident.
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* Sets up $lr to return via __ovly_return.
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* Updates __ovly_current.
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*/
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.global __ovly_load
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.type __ovly_load, @function
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.align 3
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.global __ovly_load
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.type __ovly_load, @function
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__ovly_load:
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/* Save temporary registers to stack. */
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stqd $6, -16($sp)
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stqd $7, -32($sp)
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stqd $8, -48($sp)
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#ifdef OVLY_IRQ_SAVE
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/* Save irq state, then disable interrupts. */
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stqd $9, -64($sp)
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ila irqtmp, __ovly_irq_save
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rdch irq_stat, $SPU_RdMachStat
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bid irqtmp
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__ovly_irq_save:
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#if OVL_STUB_SIZE == 8
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########
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#nop
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lqd target, 0(parm) # 1,6 -11
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#nop; lnop
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#nop; lnop
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#nop; lnop
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#nop; lnop
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#nop; lnop
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#nop
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rotqby target, target, parm # 1,4 -5
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ila tab2, _ovly_table - 16 # 0,2 -4
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stqd save3, -48($sp) # 1,6 -4
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#nop
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stqd save2, -32($sp) # 1,6 -3
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#nop
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stqd save1, -16($sp) # 1,6 -2
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rotmi ovl, target, -18 # 0,4 -1
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hbr ovly_load9, target # 1,15 -1
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ila rv1, __ovly_return # 0,2 0
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#lnop
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#nop; lnop
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#nop
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lqd cur, (__ovly_current - __ovly_return)(rv1) # 1,6 2
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shli off2, ovl, 4 # 0,4 3
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stqd ovl, (__ovly_current - __ovly_return)(rv1) # 1,6 3
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ceq rv2, $lr, rv1 # 0,2 4
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lqd rv3, (__rv_pattern - __ovly_return)(rv1) # 1,6 4
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#nop; lnop
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#nop; lnop
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#nop
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lqx vma, tab2, off2 # 1,6 7
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########
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#else /* OVL_STUB_SIZE == 16 */
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########
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ila tab2, _ovly_table - 16 # 0,2 0
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stqd save3, -48($sp) # 1,6 0
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ila rv1, __ovly_return # 0,2 1
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stqd save2, -32($sp) # 1,6 1
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shli off2, ovl, 4 # 0,4 2
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lqa cur, __ovly_current # 1,6 2
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nop
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stqa ovl, __ovly_current # 1,6 3
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ceq rv2, $lr, rv1 # 0,2 4
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lqd rv3, (__rv_pattern - __ovly_return)(rv1) # 1,6 4
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#nop
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hbr ovly_load9, target # 1,15 5
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#nop
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lqx vma, tab2, off2 # 1,6 6
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#nop
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stqd save1, -16($sp) # 1,6 7
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########
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#endif
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#ifdef OVLY_PRINTFS
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//==============================================
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// In entry_event_hook segment=0x%08x entry-address=0x%08x
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//==============================================
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# save registers
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||||
stqd $10, SQWM5($sp)
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stqd $11, SQWM6($sp)
|
||||
stqd $12, SQWM7($sp)
|
||||
# Place input parameters onto the stack to form the
|
||||
# local storage memory image.
|
||||
ila $10, __entry_event_format
|
||||
stqd $10, SQWM12($sp)
|
||||
ai $10, $sp, SQWM9
|
||||
stqd $10, SQWM11($sp)
|
||||
stqd $sp, SQWM10($sp)
|
||||
stqd $78, SQWM9($sp)
|
||||
stqd $79, SQWM8($sp)
|
||||
# Construct a message consisting of the 8-bit opcode
|
||||
# and 24-bit local store pointer to the input
|
||||
# parameters and place it forllowing the stop and signal
|
||||
ila $10, 0x3ffff # address mask
|
||||
ilhu $11, SPE_C99_VPRINTF << 8
|
||||
ai $12, $sp, SQWM12 # parameter pointer
|
||||
selb $11, $11, $12, $10 # combine command & address ptr
|
||||
brsl $10, next1a
|
||||
next1a:
|
||||
.type next1a, @function
|
||||
lqr $12, message1a
|
||||
cwd $10, message1a-next1a($10)
|
||||
shufb $11, $11, $12, $10 # insert msg into inst word
|
||||
stqr $11, message1a # store cmd/ptr into msg word
|
||||
dsync
|
||||
# Notify the PPE to perform the assisted call request
|
||||
# by issing a stop and signal with a signal code
|
||||
# of 0x2100 (C99 class)
|
||||
stop 0x2100
|
||||
message1a:
|
||||
.word 0
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
#nop
|
||||
shufb rv4, rv1, cur, rv3 # 1,4 10
|
||||
#nop
|
||||
fsmb rv5, rv2 # 1,4 11
|
||||
#nop
|
||||
rotqmbyi rv6, $lr, -8 # 1,4 12
|
||||
#nop
|
||||
rotqbyi buf2, vma, 12 # 1,4 13
|
||||
#nop
|
||||
lqd save3, -48($sp) # 1,6 14
|
||||
#nop; lnop
|
||||
or rv7, rv4, rv6 # 0,2 16
|
||||
lqd save2, -32($sp) # 1,6 16
|
||||
andi present2, buf2, 1 # 0,2 17
|
||||
lnop # 1,0 17
|
||||
selb $lr, rv7, $lr, rv5 # 0,2 18
|
||||
lqd save1, -16($sp) # 1,6 18
|
||||
#nop
|
||||
brz present2, __ovly_load_event # 1,4 19
|
||||
ovly_load9:
|
||||
#nop
|
||||
bi target # 1,4 20
|
||||
|
||||
# save registers
|
||||
stqd $13, SQWM8($sp)
|
||||
stqd $14, SQWM9($sp)
|
||||
stqd $15, SQWM10($sp)
|
||||
stqd $16, SQWM11($sp)
|
||||
|
||||
# initialize loop
|
||||
il $13, 1
|
||||
ila $14, _ovly_buf_table
|
||||
ila $15, _ovly_buf_table_end
|
||||
|
||||
loop_start1:
|
||||
# Place input parameters onto the stack to form the
|
||||
# local storage memory image.
|
||||
ila $10, __ovly_buf_table_format
|
||||
stqd $10, SQWM16($sp)
|
||||
ai $10, $sp, SQWM13
|
||||
stqd $10, SQWM15($sp)
|
||||
stqd $sp, SQWM14($sp)
|
||||
stqd $13, SQWM13($sp)
|
||||
lqd $16, 0($14)
|
||||
rotqby $16, $16, $14
|
||||
stqd $16, SQWM12($sp)
|
||||
# Construct a message consisting of the 8-bit opcode
|
||||
# and 24-bit local store pointer to the input
|
||||
# parameters and place it forllowing the stop and signal
|
||||
ila $10, 0x3ffff # address mask
|
||||
ilhu $11, SPE_C99_VPRINTF << 8
|
||||
ai $12, $sp, SQWM16 # parameter pointer
|
||||
selb $11, $11, $12, $10 # combine command & address ptr
|
||||
brsl $10, next1b
|
||||
next1b:
|
||||
.type next1b, @function
|
||||
lqr $12, message1b
|
||||
cwd $10, message1b-next1b($10)
|
||||
shufb $11, $11, $12, $10 # insert msg into inst word
|
||||
stqr $11, message1b # store cmd/ptr into msg word
|
||||
dsync
|
||||
# Notify the PPE to perform the assisted call request
|
||||
# by issing a stop and signal with a signal code
|
||||
# of 0x2100 (C99 class)
|
||||
stop 0x2100
|
||||
message1b:
|
||||
.word 0
|
||||
|
||||
# move to next entry
|
||||
ai $13, $13, 1
|
||||
ai $14, $14, 4
|
||||
clgt $16, $15, $14
|
||||
brnz $16, loop_start1
|
||||
|
||||
# restore registers
|
||||
lqd $16, SQWM11($sp)
|
||||
lqd $15, SQWM10($sp)
|
||||
lqd $14, SQWM9($sp)
|
||||
lqd $13, SQWM8($sp)
|
||||
lqd $12, SQWM7($sp)
|
||||
lqd $11, SQWM6($sp)
|
||||
lqd $10, SQWM5($sp)
|
||||
//==============================================
|
||||
#endif
|
||||
|
||||
/* Set branch hint to overlay target. */
|
||||
hbr __ovly_load_ret, $79
|
||||
|
||||
/* Get caller's overlay index by back chaining through stack frames.
|
||||
* Loop until end of stack (back chain all-zeros) or
|
||||
* encountered a link register we set here. */
|
||||
lqd bchn, 0($sp)
|
||||
ila retval, __ovly_return
|
||||
|
||||
__ovly_backchain_loop:
|
||||
lqd lnkr, 16(bchn)
|
||||
lqd bchn, 0(bchn)
|
||||
ceq cmp, lnkr, retval
|
||||
ceqi cmp2, bchn, 0
|
||||
or cmp, cmp, cmp2
|
||||
brz cmp, __ovly_backchain_loop
|
||||
|
||||
/* If we reached the zero back-chain, then lnkr is bogus. Clear the
|
||||
* part of lnkr that we use later (slot 3). */
|
||||
rotqbyi cmp2, cmp2, 4
|
||||
andc lnkr, lnkr, cmp2
|
||||
|
||||
/* Set lr = {__ovly_return, prev ovl ndx, caller return adr, callee ovl ndx}. */
|
||||
lqd rv1, (__rv_pattern-__ovly_return+4)(retval)
|
||||
shufb rv2, retval, lnkr, rv1
|
||||
shufb rv3, $lr, $78, rv1
|
||||
fsmbi rv1, 0xff
|
||||
selb rv2, rv2, rv3, rv1
|
||||
/* If we have a tail call from one overlay function to another overlay,
|
||||
then lr is already set up. Don't change it. */
|
||||
ceq rv1, $lr, retval
|
||||
fsmb rv1, rv1
|
||||
selb $lr, rv2, $lr, rv1
|
||||
|
||||
/* Branch to $79 if non-overlay */
|
||||
brz $78, __ovly_load_restore
|
||||
|
||||
/* Load values from _ovly_table[$78].
|
||||
/* If we get here, we are about to load a new overlay.
|
||||
* "vma" contains the relevant entry from _ovly_table[].
|
||||
* extern struct {
|
||||
* u32 vma;
|
||||
* u32 size;
|
||||
|
|
@ -315,265 +262,166 @@ __ovly_backchain_loop:
|
|||
* u32 buf;
|
||||
* } _ovly_table[];
|
||||
*/
|
||||
shli off, $78, 4
|
||||
ila tab, _ovly_table - 16
|
||||
lqx vma, tab, off
|
||||
rotqbyi buf, vma, 12
|
||||
|
||||
/* Load values from _ovly_buf_table[buf].
|
||||
* extern struct {
|
||||
* u32 mapped;
|
||||
* } _ovly_buf_table[];
|
||||
*/
|
||||
ila tab, _ovly_buf_table
|
||||
ai off, buf, -1
|
||||
shli off, off, 2
|
||||
lqx map, tab, off
|
||||
rotqby cur, map, off
|
||||
|
||||
/* Branch to $79 now if overlay is already mapped. */
|
||||
ceq cmp, $78, cur
|
||||
brnz cmp, __ovly_load_restore
|
||||
|
||||
/* Marker for profiling code. If we get here, we are about to load
|
||||
* a new overlay.
|
||||
*/
|
||||
.global __ovly_load_event
|
||||
.type __ovly_load_event, @function
|
||||
.align 3
|
||||
.global __ovly_load_event
|
||||
.type __ovly_load_event, @function
|
||||
__ovly_load_event:
|
||||
#nop
|
||||
rotqbyi sz, vma, 8 # 1,4 0
|
||||
#nop
|
||||
rotqbyi osize, vma, 4 # 1,4 1
|
||||
#nop
|
||||
lqa ea64, _EAR_ # 1,6 2
|
||||
#nop
|
||||
lqd cgshuf, (__cg_pattern - __ovly_return)($lr) # 1,6 3
|
||||
|
||||
/* Set _ovly_buf_table[buf].mapped = $78. */
|
||||
cwx genwi, tab, off
|
||||
shufb map, $78, map, genwi
|
||||
stqx map, tab, off
|
||||
|
||||
/* A new partition needs to be loaded. Prepare for DMA loop.
|
||||
* _EAR_ is the 64b base EA, filled in at run time by the
|
||||
* loader, and indicating the value for SPU executable image start.
|
||||
*/
|
||||
lqd cgshuf, (__cg_pattern-__ovly_return+4)(retval)
|
||||
rotqbyi osize, vma, 4
|
||||
rotqbyi sz, vma, 8
|
||||
lqa ea64, _EAR_
|
||||
|
||||
/* We could predict the branch at the end of this loop by adding a few
|
||||
instructions, and there are plenty of free cycles to do so without
|
||||
impacting loop execution time. However, it doesn't make a great
|
||||
deal of sense since we need to wait for the dma to complete anyway. */
|
||||
__ovly_xfer_loop:
|
||||
/* 64b add to compute next ea64. */
|
||||
rotqmbyi off64, sz, -4
|
||||
cg cgbits, ea64, off64
|
||||
shufb add64, cgbits, cgbits, cgshuf
|
||||
addx add64, ea64, off64
|
||||
ori ea64, add64, 0
|
||||
#nop
|
||||
rotqmbyi off64, sz, -4 # 1,4 4
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
cg cgbits, ea64, off64 # 0,2 8
|
||||
#lnop
|
||||
#nop; lnop
|
||||
#nop
|
||||
shufb add64, cgbits, cgbits, cgshuf # 1,4 10
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
addx add64, ea64, off64 # 0,2 14
|
||||
#lnop
|
||||
ila maxsize, MFC_MAX_DMA_SIZE # 0,2 15
|
||||
lnop
|
||||
ori ea64, add64, 0 # 0,2 16
|
||||
rotqbyi ealo, add64, 4 # 1,4 16
|
||||
cgt cmp, osize, maxsize # 0,2 17
|
||||
wrch $MFC_LSA, vma # 1,6 17
|
||||
#nop; lnop
|
||||
selb sz, osize, maxsize, cmp # 0,2 19
|
||||
wrch $MFC_EAH, ea64 # 1,6 19
|
||||
ila tagid, MFC_TAG_ID # 0,2 20
|
||||
wrch $MFC_EAL, ealo # 1,6 20
|
||||
ila cmd, MFC_GET_CMD # 0,2 21
|
||||
wrch $MFC_Size, sz # 1,6 21
|
||||
sf osize, sz, osize # 0,2 22
|
||||
wrch $MFC_TagId, tagid # 1,6 22
|
||||
a vma, vma, sz # 0,2 23
|
||||
wrch $MFC_Cmd, cmd # 1,6 23
|
||||
#nop
|
||||
brnz osize, __ovly_xfer_loop # 1,4 24
|
||||
|
||||
/* Setup DMA parameters, then issue DMA request. */
|
||||
rotqbyi ealo, add64, 4
|
||||
ila maxsize, MFC_MAX_DMA_SIZE
|
||||
cgt cmp, osize, maxsize
|
||||
selb sz, osize, maxsize, cmp
|
||||
ila tagid, MFC_TAG_ID
|
||||
wrch $MFC_LSA, vma
|
||||
wrch $MFC_EAH, ea64
|
||||
wrch $MFC_EAL, ealo
|
||||
wrch $MFC_Size, sz
|
||||
wrch $MFC_TagId, tagid
|
||||
ila cmd, MFC_GET_CMD
|
||||
wrch $MFC_Cmd, cmd
|
||||
|
||||
#ifdef OVLY_PRINTFS
|
||||
//==============================================
|
||||
// In dma_event_hook vma=0x%08x ea=%08x%08x sz=%08x
|
||||
//==============================================
|
||||
# save registers
|
||||
stqd $10, SQWM5($sp)
|
||||
stqd $11, SQWM6($sp)
|
||||
stqd $12, SQWM7($sp)
|
||||
# Place input parameters onto the stack to form the
|
||||
# local storage memory image.
|
||||
ila $10, __dma_event_format
|
||||
stqd $10, SQWM14($sp)
|
||||
ai $10, $sp, SQWM11
|
||||
stqd $10, SQWM13($sp)
|
||||
stqd $sp, SQWM12($sp)
|
||||
stqd vma, SQWM11($sp)
|
||||
stqd ea64, SQWM10($sp)
|
||||
stqd ealo, SQWM9($sp)
|
||||
stqd sz, SQWM8($sp)
|
||||
# Construct a message consisting of the 8-bit opcode
|
||||
# and 24-bit local store pointer to the input
|
||||
# parameters and place it forllowing the stop and signal
|
||||
ila $10, 0x3ffff # address mask
|
||||
ilhu $11, SPE_C99_VPRINTF << 8
|
||||
ai $12, $sp, SQWM14 # parameter pointer
|
||||
selb $11, $11, $12, $10 # combine command & address ptr
|
||||
brsl $10, next3a
|
||||
next3a:
|
||||
.type next3a, @function
|
||||
lqr $12, message3a
|
||||
cwd $10, message3a-next3a($10)
|
||||
shufb $11, $11, $12, $10 # insert msg into inst word
|
||||
stqr $11, message3a # store cmd/ptr into msg word
|
||||
dsync
|
||||
# Notify the PPE to perform the assisted call request
|
||||
# by issing a stop and signal with a signal code
|
||||
# of 0x2100 (C99 class)
|
||||
stop 0x2100
|
||||
message3a:
|
||||
.word 0
|
||||
|
||||
# restore registers
|
||||
lqd $12, SQWM7($sp)
|
||||
lqd $11, SQWM6($sp)
|
||||
lqd $10, SQWM5($sp)
|
||||
//==============================================
|
||||
#endif
|
||||
|
||||
/* Increment vma, decrement size, branch back as needed. */
|
||||
a vma, vma, sz
|
||||
sf osize, sz, osize
|
||||
brnz osize, __ovly_xfer_loop
|
||||
|
||||
/* Save app's tagmask, wait for DMA complete, restore mask. */
|
||||
rdch oldmask, $MFC_RdTagMask
|
||||
#if MFC_TAG_ID < 16
|
||||
ilh newmask, 1 << MFC_TAG_ID
|
||||
#else
|
||||
ilhu newmask, 1 << (MFC_TAG_ID - 16)
|
||||
#endif
|
||||
wrch $MFC_WrTagMask, newmask
|
||||
ila tagstat, MFC_TAG_UPDATE_ALL
|
||||
wrch $MFC_WrTagUpdate, tagstat
|
||||
rdch tagstat, $MFC_RdTagStat
|
||||
sync
|
||||
wrch $MFC_WrTagMask, oldmask
|
||||
|
||||
#ifdef OVLY_PRINTFS
|
||||
//==============================================
|
||||
// In debug_event_hook link-register=0x%08x %08x %08x %08x
|
||||
//==============================================
|
||||
# save registers
|
||||
stqd $10, SQWM5($sp)
|
||||
stqd $11, SQWM6($sp)
|
||||
stqd $12, SQWM7($sp)
|
||||
# Place input parameters onto the stack to form the
|
||||
# local storage memory image.
|
||||
ila $10, __debug_event_format
|
||||
stqd $10, SQWM14($sp)
|
||||
ai $10, $sp, SQWM11
|
||||
stqd $10, SQWM13($sp)
|
||||
stqd $sp, SQWM12($sp)
|
||||
stqd $lr, SQWM11($sp)
|
||||
rotqbyi $10, $lr, 4
|
||||
stqd $10, SQWM10($sp)
|
||||
rotqbyi $10, $10, 4
|
||||
stqd $10, SQWM9($sp)
|
||||
rotqbyi $10, $10, 4
|
||||
stqd $10, SQWM8($sp)
|
||||
# Construct a message consisting of the 8-bit opcode
|
||||
# and 24-bit local store pointer to the input
|
||||
# parameters and place it forllowing the stop and signal
|
||||
ila $10, 0x3ffff # address mask
|
||||
ilhu $11, SPE_C99_VPRINTF << 8
|
||||
ai $12, $sp, SQWM14 # parameter pointer
|
||||
selb $11, $11, $12, $10 # combine command & address ptr
|
||||
brsl $10, next2a
|
||||
next2a:
|
||||
.type next2a, @function
|
||||
lqr $12, message2a
|
||||
cwd $10, message2a-next2a($10)
|
||||
shufb $11, $11, $12, $10 # insert msg into inst word
|
||||
stqr $11, message2a # store cmd/ptr into msg word
|
||||
dsync
|
||||
# Notify the PPE to perform the assisted call request
|
||||
# by issing a stop and signal with a signal code
|
||||
# of 0x2100 (C99 class)
|
||||
stop 0x2100
|
||||
message2a:
|
||||
.word 0
|
||||
|
||||
# save registers
|
||||
stqd $13, SQWM8($sp)
|
||||
stqd $14, SQWM9($sp)
|
||||
stqd $15, SQWM10($sp)
|
||||
stqd $16, SQWM11($sp)
|
||||
|
||||
# initialize loop
|
||||
il $13, 1
|
||||
ila $14, _ovly_buf_table
|
||||
ila $15, _ovly_buf_table_end
|
||||
|
||||
loop_start2:
|
||||
# Place input parameters onto the stack to form the
|
||||
# local storage memory image.
|
||||
ila $10, __ovly_buf_table_format
|
||||
stqd $10, SQWM16($sp)
|
||||
ai $10, $sp, SQWM13
|
||||
stqd $10, SQWM15($sp)
|
||||
stqd $sp, SQWM14($sp)
|
||||
stqd $13, SQWM13($sp)
|
||||
lqd $16, 0($14)
|
||||
rotqby $16, $16, $14
|
||||
stqd $16, SQWM12($sp)
|
||||
# Construct a message consisting of the 8-bit opcode
|
||||
# and 24-bit local store pointer to the input
|
||||
# parameters and place it forllowing the stop and signal
|
||||
ila $10, 0x3ffff # address mask
|
||||
ilhu $11, SPE_C99_VPRINTF << 8
|
||||
ai $12, $sp, SQWM16 # parameter pointer
|
||||
selb $11, $11, $12, $10 # combine command & address ptr
|
||||
brsl $10, next2b
|
||||
next2b:
|
||||
.type next2b, @function
|
||||
lqr $12, message2b
|
||||
cwd $10, message2b-next2b($10)
|
||||
shufb $11, $11, $12, $10 # insert msg into inst word
|
||||
stqr $11, message2b # store cmd/ptr into msg word
|
||||
dsync
|
||||
# Notify the PPE to perform the assisted call request
|
||||
# by issing a stop and signal with a signal code
|
||||
# of 0x2100 (C99 class)
|
||||
stop 0x2100
|
||||
message2b:
|
||||
.word 0
|
||||
|
||||
# move to next entry
|
||||
ai $13, $13, 1
|
||||
ai $14, $14, 4
|
||||
clgt $16, $15, $14
|
||||
brnz $16, loop_start2
|
||||
|
||||
# restore registers
|
||||
lqd $16, SQWM11($sp)
|
||||
lqd $15, SQWM10($sp)
|
||||
lqd $14, SQWM9($sp)
|
||||
lqd $13, SQWM8($sp)
|
||||
lqd $12, SQWM7($sp)
|
||||
lqd $11, SQWM6($sp)
|
||||
lqd $10, SQWM5($sp)
|
||||
//==============================================
|
||||
#endif
|
||||
|
||||
.global _ovly_debug_event
|
||||
.type _ovly_debug_event, @function
|
||||
_ovly_debug_event:
|
||||
/* GDB inserts debugger trap here. */
|
||||
/* Now update our data structions while waiting for DMA to complete.
|
||||
Low bit of .buf needs to be cleared on the _ovly_table entry
|
||||
corresponding to the evicted overlay, and set on the entry for the
|
||||
newly loaded overlay. Note that no overlay may in fact be evicted
|
||||
as _ovly_buf_table[] starts with all zeros. Don't zap .buf entry
|
||||
for zero index! Also of course update the _ovly_buf_table entry. */
|
||||
#nop
|
||||
lqd newovl, (__ovly_current - __ovly_return)($lr) # 1,6 25
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
shli off3, newovl, 4 # 0,4 31
|
||||
#lnop
|
||||
ila tab3, _ovly_table - 16 # 0,2 32
|
||||
#lnop
|
||||
#nop
|
||||
fsmbi pbyte, 1 # 1,4 33
|
||||
#nop; lnop
|
||||
#nop
|
||||
lqx vma, tab3, off3 # 1,6 35
|
||||
#nop; lnop
|
||||
andi pbit, pbyte, 1 # 0,2 37
|
||||
lnop
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
or newvma, vma, pbit # 0,2 41
|
||||
rotqbyi buf3, vma, 12 # 1,4 41
|
||||
#nop; lnop
|
||||
#nop
|
||||
stqx newvma, tab3, off3 # 1,6 43
|
||||
#nop; lnop
|
||||
shli off4, buf3, 2 # 1,4 45
|
||||
#lnop
|
||||
ila tab4, _ovly_buf_table # 0,2 46
|
||||
#lnop
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
#nop
|
||||
lqx map, tab4, off4 # 1,6 49
|
||||
#nop
|
||||
cwx genwi, tab4, off4 # 1,4 50
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
#nop
|
||||
rotqby oldovl, map, off4 # 1,4 55
|
||||
nop
|
||||
|
||||
__ovly_load_restore:
|
||||
#ifdef OVLY_IRQ_SAVE
|
||||
/* Conditionally re-enable interrupts. */
|
||||
andi irq_stat, irq_stat, 1
|
||||
ila irqtmp, __ovly_irq_restore
|
||||
binze irq_stat, irqtmp
|
||||
__ovly_irq_restore:
|
||||
lqd $9, -64($sp)
|
||||
shufb newmap, newovl, map, genwi # 0,4 56
|
||||
#if MFC_TAG_ID < 16
|
||||
ila newmask, 1 << MFC_TAG_ID # 0,2 57
|
||||
#else
|
||||
ilhu newmask, 1 << (MFC_TAG_ID - 16) # 0,2 57
|
||||
#endif
|
||||
#lnop
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
stqx newmap, tab4, off4 # 1,6 60
|
||||
|
||||
/* Restore saved registers. */
|
||||
lqd $8, -48($sp)
|
||||
lqd $7, -32($sp)
|
||||
lqd $6, -16($sp)
|
||||
/* Save app's tagmask, wait for DMA complete, restore mask. */
|
||||
ila tagstat, MFC_TAG_UPDATE_ALL # 0,2 61
|
||||
rdch oldmask, $MFC_RdTagMask # 1,6 61
|
||||
#nop
|
||||
wrch $MFC_WrTagMask, newmask # 1,6 62
|
||||
#nop
|
||||
wrch $MFC_WrTagUpdate, tagstat # 1,6 63
|
||||
#nop
|
||||
rdch tagstat, $MFC_RdTagStat # 1,6 64
|
||||
#nop
|
||||
sync # 1,4 65
|
||||
/* Any hint prior to the sync is lost. A hint here allows the branch
|
||||
to complete 15 cycles after the hint. With no hint the branch will
|
||||
take 18 or 19 cycles. */
|
||||
ila tab5, _ovly_table - 16 # 0,2 66
|
||||
hbr do_load99, target # 1,15 66
|
||||
shli off5, oldovl, 4 # 0,4 67
|
||||
wrch $MFC_WrTagMask, oldmask # 1,6 67
|
||||
ceqi zovl, oldovl, 0 # 0,2 68
|
||||
#lnop
|
||||
#nop; lnop
|
||||
#nop
|
||||
fsm zovl, zovl # 1,4 70
|
||||
#nop
|
||||
lqx oldvma, tab5, off5 # 1,6 71
|
||||
#nop
|
||||
lqd save3, -48($sp) # 1,6 72
|
||||
#nop; lnop
|
||||
andc pbit, pbit, zovl # 0,2 74
|
||||
lqd save2, -32($sp) # 1,6 74
|
||||
#nop; lnop
|
||||
#nop; lnop
|
||||
andc oldvma, oldvma, pbit # 0,2 77
|
||||
lqd save1, -16($sp) # 1,6 77
|
||||
#nop; lnop
|
||||
nop
|
||||
stqx oldvma, tab5, off5 # 1,6 79
|
||||
#nop; lnop
|
||||
|
||||
__ovly_load_ret:
|
||||
.global _ovly_debug_event
|
||||
.type _ovly_debug_event, @function
|
||||
_ovly_debug_event:
|
||||
nop
|
||||
/* Branch to target address. */
|
||||
bi $79
|
||||
do_load99:
|
||||
bi target # 1,4 81
|
||||
|
||||
.size __ovly_load, . - __ovly_load
|
||||
.size __ovly_load, . - __ovly_load
|
||||
|
|
|
|||
Binary file not shown.
|
|
@ -58,8 +58,6 @@ static const struct _ovl_stream ovl_mgr_stream = {
|
|||
ovl_mgr + sizeof (ovl_mgr)
|
||||
};
|
||||
|
||||
static asection *toe = NULL;
|
||||
|
||||
|
||||
static int
|
||||
is_spu_target (void)
|
||||
|
|
@ -84,7 +82,8 @@ spu_after_open (void)
|
|||
gld${EMULATION_NAME}_after_open ();
|
||||
}
|
||||
|
||||
/* Add section S at the end of output section OUTPUT_NAME.
|
||||
/* If O is NULL, add section S at the end of output section OUTPUT_NAME.
|
||||
If O is not NULL, add section S at the beginning of output section O.
|
||||
|
||||
Really, we should be duplicating ldlang.c map_input_to_output_sections
|
||||
logic here, ie. using the linker script to find where the section
|
||||
|
|
@ -95,11 +94,11 @@ spu_after_open (void)
|
|||
overlay manager code somewhere else. */
|
||||
|
||||
static void
|
||||
spu_place_special_section (asection *s, const char *output_name)
|
||||
spu_place_special_section (asection *s, asection *o, const char *output_name)
|
||||
{
|
||||
lang_output_section_statement_type *os;
|
||||
|
||||
os = lang_output_section_find (output_name);
|
||||
os = lang_output_section_find (o != NULL ? o->name : output_name);
|
||||
if (os == NULL)
|
||||
{
|
||||
const char *save = s->name;
|
||||
|
|
@ -107,6 +106,15 @@ spu_place_special_section (asection *s, const char *output_name)
|
|||
gld${EMULATION_NAME}_place_orphan (s);
|
||||
s->name = save;
|
||||
}
|
||||
else if (o != NULL && os->children.head != NULL)
|
||||
{
|
||||
lang_statement_list_type add;
|
||||
|
||||
lang_list_init (&add);
|
||||
lang_add_section (&add, s, os);
|
||||
*add.tail = os->children.head;
|
||||
os->children.head = add.head;
|
||||
}
|
||||
else
|
||||
lang_add_section (&os->children, s, os);
|
||||
|
||||
|
|
@ -154,7 +162,7 @@ spu_elf_load_ovl_mgr (void)
|
|||
for (in = ovl_is->the_bfd->sections; in != NULL; in = in->next)
|
||||
if ((in->flags & (SEC_ALLOC | SEC_LOAD))
|
||||
== (SEC_ALLOC | SEC_LOAD))
|
||||
spu_place_special_section (in, ".text");
|
||||
spu_place_special_section (in, NULL, ".text");
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -164,7 +172,7 @@ spu_elf_load_ovl_mgr (void)
|
|||
os = os->next)
|
||||
if (os->bfd_section != NULL
|
||||
&& spu_elf_section_data (os->bfd_section) != NULL
|
||||
&& spu_elf_section_data (os->bfd_section)->ovl_index != 0)
|
||||
&& spu_elf_section_data (os->bfd_section)->u.o.ovl_index != 0)
|
||||
{
|
||||
if (os->bfd_section->alignment_power < 4)
|
||||
os->bfd_section->alignment_power = 4;
|
||||
|
|
@ -192,20 +200,15 @@ spu_before_allocation (void)
|
|||
/* Find overlays by inspecting section vmas. */
|
||||
if (spu_elf_find_overlays (output_bfd, &link_info))
|
||||
{
|
||||
asection *stub, *ovtab;
|
||||
int ret;
|
||||
|
||||
if (!spu_elf_size_stubs (output_bfd, &link_info, non_overlay_stubs,
|
||||
stack_analysis, &stub, &ovtab, &toe))
|
||||
ret = spu_elf_size_stubs (output_bfd, &link_info,
|
||||
spu_place_special_section,
|
||||
non_overlay_stubs);
|
||||
if (ret == 0)
|
||||
einfo ("%X%P: can not size overlay stubs: %E\n");
|
||||
|
||||
if (stub != NULL)
|
||||
{
|
||||
spu_place_special_section (stub, ".text");
|
||||
spu_place_special_section (ovtab, ".data");
|
||||
spu_place_special_section (toe, ".toe");
|
||||
|
||||
spu_elf_load_ovl_mgr ();
|
||||
}
|
||||
else if (ret == 2)
|
||||
spu_elf_load_ovl_mgr ();
|
||||
}
|
||||
|
||||
/* We must not cache anything from the preliminary sizing. */
|
||||
|
|
@ -235,10 +238,8 @@ gld${EMULATION_NAME}_finish (void)
|
|||
einfo ("%X%P: %A exceeds local store range\n", s);
|
||||
}
|
||||
|
||||
if (toe != NULL
|
||||
&& !spu_elf_build_stubs (&link_info,
|
||||
emit_stub_syms || link_info.emitrelocations,
|
||||
toe))
|
||||
if (!spu_elf_build_stubs (&link_info,
|
||||
emit_stub_syms || link_info.emitrelocations))
|
||||
einfo ("%X%P: can not build overlay stubs: %E\n");
|
||||
|
||||
finish_default ();
|
||||
|
|
|
|||
|
|
@ -1,3 +1,8 @@
|
|||
2008-01-28 Alan Modra <amodra@bigpond.net.au>
|
||||
|
||||
* ld-spu/ovl.d: Update.
|
||||
* ld-spu/ovl2.d: Update.
|
||||
|
||||
2008-01-26 Alan Modra <amodra@bigpond.net.au>
|
||||
|
||||
* ld-elf/loadaddr.t: New, extracted from..
|
||||
|
|
|
|||
|
|
@ -7,65 +7,90 @@
|
|||
Disassembly of section \.text:
|
||||
|
||||
00000100 <_start>:
|
||||
100: 1c f8 00 81 ai \$1,\$1,-32
|
||||
104: 48 20 00 00 xor \$0,\$0,\$0
|
||||
108: 24 00 00 80 stqd \$0,0\(\$1\)
|
||||
10c: 24 00 40 80 stqd \$0,16\(\$1\)
|
||||
110: 33 00 04 00 brsl \$0,130 <00000000\.ovl_call\.f1_a1> # 130
|
||||
110: SPU_REL16 f1_a1
|
||||
114: 33 00 04 80 brsl \$0,138 <00000000\.ovl_call\.f2_a1> # 138
|
||||
114: SPU_REL16 f2_a1
|
||||
118: 33 00 07 00 brsl \$0,150 <00000000\.ovl_call\.f1_a2> # 150
|
||||
118: SPU_REL16 f1_a2
|
||||
11c: 42 00 ac 09 ila \$9,344 # 158
|
||||
11c: SPU_ADDR18 f2_a2
|
||||
120: 35 20 04 80 bisl \$0,\$9
|
||||
124: 1c 08 00 81 ai \$1,\$1,32 # 20
|
||||
128: 32 7f fb 00 br 100 <_start> # 100
|
||||
128: SPU_REL16 _start
|
||||
.* ai \$1,\$1,-32
|
||||
.* xor \$0,\$0,\$0
|
||||
.* stqd \$0,0\(\$1\)
|
||||
.* stqd \$0,16\(\$1\)
|
||||
.* brsl \$0,.* <00000000\.ovl_call\.f1_a1>.*
|
||||
.*SPU_REL16 f1_a1
|
||||
.* brsl \$0,.* <00000000\.ovl_call\.f2_a1>.*
|
||||
.*SPU_REL16 f2_a1
|
||||
.* brsl \$0,.* <00000000\.ovl_call\.f1_a2>.*
|
||||
.*SPU_REL16 f1_a2
|
||||
#.* ila \$9,328 # 148
|
||||
.* ila \$9,352 # 160
|
||||
.*SPU_ADDR18 f2_a2
|
||||
.* bisl \$0,\$9
|
||||
.* ai \$1,\$1,32 # 20
|
||||
.* br 100 <_start> # 100
|
||||
.*SPU_REL16 _start
|
||||
|
||||
0000012c <f0>:
|
||||
12c: 35 00 00 00 bi \$0
|
||||
.* bi \$0
|
||||
|
||||
#00000130 <00000000\.ovl_call\.f1_a1>:
|
||||
#.* brsl \$75,.* <__ovly_load>.*
|
||||
#.*00 04 04 00.*
|
||||
#
|
||||
#00000138 <00000000\.ovl_call\.f2_a1>:
|
||||
#.* brsl \$75,.* <__ovly_load>.*
|
||||
#.*00 04 04 04.*
|
||||
#
|
||||
#00000140 <00000000\.ovl_call\.f1_a2>:
|
||||
#.* brsl \$75,.* <__ovly_load>.*
|
||||
#.*00 08 04 00.*
|
||||
#
|
||||
#00000148 <00000000\.ovl_call\.f2_a2>:
|
||||
#.* brsl \$75,.* <__ovly_load>.*
|
||||
#.*00 08 04 24.*
|
||||
#
|
||||
#00000150 <00000000\.ovl_call\.f4_a1>:
|
||||
#.* brsl \$75,.* <__ovly_load>.*
|
||||
#.*00 04 04 10.*
|
||||
#
|
||||
#00000158 <00000000.ovl_call.14:8>:
|
||||
#.* brsl \$75,.* <__ovly_load>.*
|
||||
#.*00 08 04 34.*
|
||||
|
||||
00000130 <00000000\.ovl_call\.f1_a1>:
|
||||
130: 42 02 00 4f ila \$79,1024 # 400
|
||||
134: 32 00 02 80 br 148 .*
|
||||
134: SPU_REL16 \*ABS\*\+0x148
|
||||
.* ila \$78,1
|
||||
.* lnop
|
||||
.* ila \$79,1024 # 400
|
||||
.* br .* <__ovly_load>.*
|
||||
|
||||
00000138 <00000000\.ovl_call\.f2_a1>:
|
||||
138: 42 02 02 4f ila \$79,1028 # 404
|
||||
13c: 32 00 01 80 br 148 .*
|
||||
13c: SPU_REL16 \*ABS\*\+0x148
|
||||
00000140 <00000000\.ovl_call\.f2_a1>:
|
||||
.* ila \$78,1
|
||||
.* lnop
|
||||
.* ila \$79,1028 # 404
|
||||
.* br .* <__ovly_load>.*
|
||||
|
||||
00000140 <00000000\.ovl_call\.f4_a1>:
|
||||
140: 42 02 08 4f ila \$79,1040 # 410
|
||||
144: 40 20 00 00 nop \$0
|
||||
148: 42 00 00 ce ila \$78,1
|
||||
14c: 32 00 0a 80 br 1a0 <__ovly_load> # 1a0
|
||||
14c: SPU_REL16 __ovly_load
|
||||
00000150 <00000000.ovl_call.f1_a2>:
|
||||
.* ila \$78,2
|
||||
.* lnop
|
||||
.* ila \$79,1024 # 400
|
||||
.* br .* <__ovly_load>.*
|
||||
|
||||
00000150 <00000000\.ovl_call\.f1_a2>:
|
||||
150: 42 02 00 4f ila \$79,1024 # 400
|
||||
154: 32 00 02 80 br 168 .*
|
||||
154: SPU_REL16 \*ABS\*\+0x168
|
||||
00000160 <00000000\.ovl_call\.f2_a2>:
|
||||
.* ila \$78,2
|
||||
.* lnop
|
||||
.* ila \$79,1060 # 424
|
||||
.* br .* <__ovly_load>.*
|
||||
|
||||
00000158 <00000000\.ovl_call\.f2_a2>:
|
||||
158: 42 02 12 4f ila \$79,1060 # 424
|
||||
15c: 32 00 01 80 br 168 .*
|
||||
15c: SPU_REL16 \*ABS\*\+0x168
|
||||
00000170 <00000000\.ovl_call\.f4_a1>:
|
||||
.* ila \$78,1
|
||||
.* lnop
|
||||
.* ila \$79,1040 # 410
|
||||
.* br .* <__ovly_load>.*
|
||||
|
||||
00000180 <00000000.ovl_call.14:8>:
|
||||
.* ila \$78,2
|
||||
.* lnop
|
||||
.* ila \$79,1076 # 434
|
||||
.* br .* <__ovly_load>.*
|
||||
|
||||
00000160 <00000000\.ovl_call\.14:8>:
|
||||
160: 42 02 1a 4f ila \$79,1076 # 434
|
||||
164: 40 20 00 00 nop \$0
|
||||
168: 42 00 01 4e ila \$78,2
|
||||
16c: 32 00 06 80 br 1a0 <__ovly_load> # 1a0
|
||||
16c: SPU_REL16 __ovly_load
|
||||
#...
|
||||
[0-9a-f]+ <__ovly_return>:
|
||||
[0-9a-f ]+: 3f e1 00 4e shlqbyi \$78,\$0,4
|
||||
[0-9a-f ]+: 3f e2 00 4f shlqbyi \$79,\$0,8
|
||||
[0-9a-f ]+: 25 00 27 ce biz \$78,\$79
|
||||
|
||||
#...
|
||||
[0-9a-f]+ <__ovly_load>:
|
||||
#...
|
||||
[0-9a-f]+ <_ovly_debug_event>:
|
||||
|
|
@ -73,67 +98,75 @@ Disassembly of section \.text:
|
|||
Disassembly of section \.ov_a1:
|
||||
|
||||
00000400 <f1_a1>:
|
||||
400: 32 00 01 80 br 40c <f3_a1> # 40c
|
||||
400: SPU_REL16 f3_a1
|
||||
.* br .* <f3_a1>.*
|
||||
.*SPU_REL16 f3_a1
|
||||
|
||||
00000404 <f2_a1>:
|
||||
404: 42 00 a0 03 ila \$3,320 # 140
|
||||
404: SPU_ADDR18 f4_a1
|
||||
408: 35 00 00 00 bi \$0
|
||||
#.* ila \$3,336 # 150
|
||||
.* ila \$3,368 # 170
|
||||
.*SPU_ADDR18 f4_a1
|
||||
.* bi \$0
|
||||
|
||||
0000040c <f3_a1>:
|
||||
40c: 35 00 00 00 bi \$0
|
||||
.* bi \$0
|
||||
|
||||
00000410 <f4_a1>:
|
||||
410: 35 00 00 00 bi \$0
|
||||
.* bi \$0
|
||||
\.\.\.
|
||||
Disassembly of section \.ov_a2:
|
||||
|
||||
00000400 <f1_a2>:
|
||||
400: 24 00 40 80 stqd \$0,16\(\$1\)
|
||||
404: 24 ff 80 81 stqd \$1,-32\(\$1\)
|
||||
408: 1c f8 00 81 ai \$1,\$1,-32
|
||||
40c: 33 7f a4 00 brsl \$0,12c <f0> # 12c
|
||||
40c: SPU_REL16 f0
|
||||
410: 33 7f a4 00 brsl \$0,130 <00000000\.ovl_call\.f1_a1> # 130
|
||||
410: SPU_REL16 f1_a1
|
||||
414: 33 00 03 80 brsl \$0,430 <f3_a2> # 430
|
||||
414: SPU_REL16 f3_a2
|
||||
418: 34 00 c0 80 lqd \$0,48\(\$1\) # 30
|
||||
41c: 1c 08 00 81 ai \$1,\$1,32 # 20
|
||||
420: 35 00 00 00 bi \$0
|
||||
.* stqd \$0,16\(\$1\)
|
||||
.* stqd \$1,-32\(\$1\)
|
||||
.* ai \$1,\$1,-32
|
||||
.* brsl \$0,12c <f0> # 12c
|
||||
.*SPU_REL16 f0
|
||||
.* brsl \$0,130 <00000000\.ovl_call\.f1_a1> # 130
|
||||
.*SPU_REL16 f1_a1
|
||||
.* brsl \$0,430 <f3_a2> # 430
|
||||
.*SPU_REL16 f3_a2
|
||||
.* lqd \$0,48\(\$1\) # 30
|
||||
.* ai \$1,\$1,32 # 20
|
||||
.* bi \$0
|
||||
|
||||
00000424 <f2_a2>:
|
||||
424: 41 00 00 03 ilhu \$3,0
|
||||
424: SPU_ADDR16_HI f4_a2
|
||||
428: 60 80 b0 03 iohl \$3,352 # 160
|
||||
428: SPU_ADDR16_LO f4_a2
|
||||
42c: 35 00 00 00 bi \$0
|
||||
.* ilhu \$3,0
|
||||
.*SPU_ADDR16_HI f4_a2
|
||||
#.* iohl \$3,344 # 158
|
||||
.* iohl \$3,384 # 180
|
||||
.*SPU_ADDR16_LO f4_a2
|
||||
.* bi \$0
|
||||
|
||||
00000430 <f3_a2>:
|
||||
430: 35 00 00 00 bi \$0
|
||||
.* bi \$0
|
||||
|
||||
00000434 <f4_a2>:
|
||||
434: 32 7f ff 80 br 430 <f3_a2> # 430
|
||||
434: SPU_REL16 f3_a2
|
||||
.* br .* <f3_a2>.*
|
||||
.*SPU_REL16 f3_a2
|
||||
\.\.\.
|
||||
Disassembly of section .data:
|
||||
|
||||
00000440 <_ovly_table>:
|
||||
440: 00 00 04 00 .*
|
||||
444: 00 00 00 20 .*
|
||||
448: 00 00 02 f0 .*
|
||||
00000440 <_ovly_table-0x10>:
|
||||
\.\.\.
|
||||
44c: 00 00 00 01 .*
|
||||
00000450 <_ovly_table>:
|
||||
450: 00 00 04 00 .*
|
||||
454: 00 00 00 40 .*
|
||||
458: 00 00 03 10 .*
|
||||
45c: 00 00 00 01 .*
|
||||
454: 00 00 00 20 .*
|
||||
# 458: 00 00 03 40 .*
|
||||
458: 00 00 03 70 .*
|
||||
45c: 00 00 00 02 .*
|
||||
460: 00 00 04 00 .*
|
||||
464: 00 00 00 40 .*
|
||||
# 468: 00 00 03 60 .*
|
||||
468: 00 00 03 90 .*
|
||||
46c: 00 00 00 02 .*
|
||||
|
||||
00000470 <_ovly_buf_table>:
|
||||
\.\.\.
|
||||
|
||||
00000460 <_ovly_buf_table>:
|
||||
460: 00 00 00 00 .*
|
||||
Disassembly of section \.toe:
|
||||
|
||||
00000470 <_EAR_>:
|
||||
00000480 <_EAR_>:
|
||||
\.\.\.
|
||||
Disassembly of section \.note\.spu_name:
|
||||
|
||||
|
|
|
|||
|
|
@ -7,40 +7,50 @@
|
|||
Disassembly of section \.text:
|
||||
|
||||
00000100 <_start>:
|
||||
100: 33 00 06 00 brsl \$0,130 <00000000\.ovl_call\.f1_a1> # 130
|
||||
100: SPU_REL16 f1_a1
|
||||
104: 33 00 03 80 brsl \$0,120 <00000000\.ovl_call\.10:4> # 120
|
||||
104: SPU_REL16 setjmp
|
||||
108: 32 7f ff 00 br 100 <_start> # 100
|
||||
108: SPU_REL16 _start
|
||||
.* brsl \$0,.* <00000000\.ovl_call\.f1_a1>.*
|
||||
.*SPU_REL16 f1_a1
|
||||
.* brsl \$0,.* <00000000\.ovl_call\.10:4>.*
|
||||
.*SPU_REL16 setjmp
|
||||
.* br 100 <_start> # 100
|
||||
.*SPU_REL16 _start
|
||||
|
||||
0000010c <setjmp>:
|
||||
10c: 35 00 00 00 bi \$0
|
||||
.* bi \$0
|
||||
|
||||
00000110 <longjmp>:
|
||||
110: 35 00 00 00 bi \$0
|
||||
...
|
||||
.* bi \$0
|
||||
.*
|
||||
|
||||
00000120 <00000000\.ovl_call.10:4>:
|
||||
120: 42 00 86 4f ila \$79,268 # 10c
|
||||
124: 40 20 00 00 nop \$0
|
||||
128: 42 00 00 4e ila \$78,0
|
||||
12c: 32 00 0a 80 br 180 <__ovly_load> # 180
|
||||
12c: SPU_REL16 __ovly_load
|
||||
#00000118 <00000000\.ovl_call.f1_a1>:
|
||||
#.* brsl \$75,.* <__ovly_load>.*
|
||||
#.*00 04 04 00.*
|
||||
#
|
||||
#00000120 <00000000\.ovl_call.10:4>:
|
||||
#.* brsl \$75,.* <__ovly_load>.*
|
||||
#.*00 00 01 0c.*
|
||||
#
|
||||
#00000128 <_SPUEAR_f1_a2>:
|
||||
#.* brsl \$75,.* <__ovly_load>.*
|
||||
#.*00 08 04 00.*
|
||||
|
||||
00000130 <00000000\.ovl_call.f1_a1>:
|
||||
130: 42 02 00 4f ila \$79,1024 # 400
|
||||
134: 40 20 00 00 nop \$0
|
||||
138: 42 00 00 ce ila \$78,1
|
||||
13c: 32 00 08 80 br 180 <__ovly_load> # 180
|
||||
13c: SPU_REL16 __ovly_load
|
||||
00000120 <00000000\.ovl_call.f1_a1>:
|
||||
.* ila \$78,1
|
||||
.* lnop
|
||||
.* ila \$79,1024 # 400
|
||||
.* br .* <__ovly_load>.*
|
||||
|
||||
00000130 <00000000\.ovl_call.10:4>:
|
||||
.* ila \$78,0
|
||||
.* lnop
|
||||
.* ila \$79,268 # 10c
|
||||
.* br .* <__ovly_load>.*
|
||||
|
||||
00000140 <_SPUEAR_f1_a2>:
|
||||
140: 42 02 00 4f ila \$79,1024 # 400
|
||||
144: 40 20 00 00 nop \$0
|
||||
148: 42 00 01 4e ila \$78,2
|
||||
14c: 32 00 06 80 br 180 <__ovly_load> # 180
|
||||
14c: SPU_REL16 __ovly_load
|
||||
.* ila \$78,2
|
||||
.* lnop
|
||||
.* ila \$79,1024 # 400
|
||||
.* br .* <__ovly_load>.*
|
||||
|
||||
#...
|
||||
Disassembly of section \.ov_a1:
|
||||
|
||||
|
|
@ -55,21 +65,27 @@ Disassembly of section \.ov_a2:
|
|||
\.\.\.
|
||||
Disassembly of section \.data:
|
||||
|
||||
00000410 <_ovly_table>:
|
||||
410: 00 00 04 00 .*
|
||||
414: 00 00 00 10 .*
|
||||
418: 00 00 02 d0 .*
|
||||
00000410 <_ovly_table-0x10>:
|
||||
\.\.\.
|
||||
41c: 00 00 00 01 .*
|
||||
00000420 <_ovly_table>:
|
||||
420: 00 00 04 00 .*
|
||||
424: 00 00 00 10 .*
|
||||
428: 00 00 02 e0 .*
|
||||
42c: 00 00 00 01 .*
|
||||
# 428: 00 00 03 10 .*
|
||||
428: 00 00 03 30 .*
|
||||
42c: 00 00 00 02 .*
|
||||
430: 00 00 04 00 .*
|
||||
434: 00 00 00 10 .*
|
||||
# 438: 00 00 03 20 .*
|
||||
438: 00 00 03 40 .*
|
||||
43c: 00 00 00 02 .*
|
||||
|
||||
00000440 <_ovly_buf_table>:
|
||||
\.\.\.
|
||||
|
||||
00000430 <_ovly_buf_table>:
|
||||
430: 00 00 00 00 .*
|
||||
Disassembly of section \.toe:
|
||||
|
||||
00000440 <_EAR_>:
|
||||
00000450 <_EAR_>:
|
||||
\.\.\.
|
||||
Disassembly of section \.note\.spu_name:
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue