2000-08-05 Kazu Hirata <kazu@hxi.com>

* config/tc-cris.c: Fix formatting.
	* config/tc-i386.c: Likewise.
	* config/tc-sparc.c (sparc_ip): Simplify the code.
This commit is contained in:
Kazu Hirata 2000-08-04 18:43:45 +00:00
parent afbb8d7a46
commit 47926f603c
4 changed files with 725 additions and 736 deletions

View file

@ -1,3 +1,9 @@
2000-08-05 Kazu Hirata <kazu@hxi.com>
* config/tc-cris.c: Fix formatting.
* config/tc-i386.c: Likewise.
* config/tc-sparc.c (sparc_ip): Simplify the code.
2000-08-04 Kazu Hirata <kazu@hxi.com>
* config/tc-cris.c: Rearrange code for readability.

View file

@ -133,11 +133,11 @@ const char cris_comment_chars[] = ";";
/* This array holds the chars that only start a comment at the beginning of
a line. If the line seems to have the form '# 123 filename'
.line and .file directives will appear in the pre-processed output */
.line and .file directives will appear in the pre-processed output. */
/* Note that input_file.c hand-checks for '#' at the beginning of the
first line of the input file. This is because the compiler outputs
#NO_APP at the beginning of its output. */
/* Also note that slash-star will always start a comment */
/* Also note that slash-star will always start a comment. */
const char line_comment_chars[] = "#";
const char line_separator_chars[] = "@";
@ -145,7 +145,6 @@ const char line_separator_chars[] = "@";
const char EXP_CHARS[] = "";
const char FLT_CHARS[] = "";
/* For CRIS, we encode the relax_substateTs (in e.g. fr_substate) as:
2 1 0
---/ /--+-----------------+-----------------+-----------------+
@ -175,7 +174,6 @@ const char FLT_CHARS[] = "";
#define STATE_UNDF (3)
#define STATE_MAX_LENGTH (3)
/* These displacements are relative to the adress following the opcode
word of the instruction. The first letter is Byte, Word. The 2nd
letter is Forward, Backward. */
@ -238,7 +236,6 @@ const relax_typeS md_cris_relax_table[] =
#undef BDAP_WF
#undef BDAP_WB
/* Target-specific multicharacter options, not const-declared at usage
in 2.9.1 and CVS of 2000-02-16. */
struct option md_longopts[] =
@ -250,7 +247,6 @@ struct option md_longopts[] =
size_t md_longopts_size = sizeof (md_longopts);
const char *md_shortopts = "hHN";
/* At first glance, this may seems wrong and should be 4 (ba + nop); but
since a short_jump must skip a *number* of long jumps, it must also be
a long jump. Here, we hope to make it a "ba [16bit_offs]" and a "nop"
@ -264,8 +260,8 @@ const char *md_shortopts = "hHN";
const int md_short_jump_size = 6;
const int md_long_jump_size = 6;
/* Report output format. */
const char *
cris_target_format ()
{
@ -418,7 +414,6 @@ md_estimate_size_before_relax (fragP, segment_type)
return fragP->fr_var + (fragP->fr_fix - old_fr_fix);
}
/* Perform post-processing of machine-dependent frags after relaxation.
Called after relaxation is finished.
In: Address of frag.
@ -536,7 +531,6 @@ md_convert_frag (abfd, sec, fragP)
}
fragP->fr_fix += var_part_size;
}
/* Generate a short jump around a secondary jump table.
@ -585,7 +579,6 @@ cris_create_short_jump (storep, from_addr, to_addr, fragP, to_symbol)
}
}
/* Generate a long jump in a secondary jump table.
storep Where to store the jump instruction.
@ -624,8 +617,8 @@ md_create_long_jump (storep, from_addr, to_addr, fragP, to_symbol)
}
}
/* Port-specific assembler initialization. */
void
md_begin ()
{
@ -652,13 +645,14 @@ md_begin ()
cris_opcodes[i].args);
++i;
} while (cris_opcodes[i].name != NULL
}
while (cris_opcodes[i].name != NULL
&& strcmp (cris_opcodes[i].name, name) == 0);
}
}
/* Assemble a source line. */
void
md_assemble (str)
char *str;
@ -823,8 +817,8 @@ md_assemble (str)
}
}
/* Low level text-to-bits assembly. */
static void
cris_process_instruction (insn_text, out_insnp, prefixp)
char *insn_text;
@ -851,9 +845,7 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
/* Find the end of the opcode mnemonic. We assume (true in 2.9.1)
that the caller has translated the opcode to lower-case, up to the
first non-letter. */
for (operands = insn_text;
islower (*operands);
++operands)
for (operands = insn_text; islower (*operands); ++operands)
;
/* Terminate the opcode after letters, but save the character there if
@ -864,13 +856,13 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
break;
case '.':
/* Put back the modified character later */
/* Put back the modified character later. */
modified_char = *operands;
/* FALLTHROUGH. */
/* Fall through. */
case ' ':
/* Consume the character after the mnemonic and replace */
/* it with '\0'. */
/* Consume the character after the mnemonic
and replace it with '\0'. */
*operands++ = '\0';
break;
@ -897,11 +889,8 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
*--operands = modified_char;
}
/* Try to match an opcode table slot. */
for (s = operands;
;
)
for (s = operands;;)
{
int imm_expr_found;
@ -921,9 +910,7 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
/* Build the opcode, checking as we go to make sure that the
operands match. */
for (args = instruction->args;
;
++args)
for (args = instruction->args;; ++args)
{
switch (*args)
{
@ -1011,8 +998,7 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
if (! get_flags (&s, &flags))
break;
out_insnp->opcode
|= ((flags & 0xf0) << 8) | (flags & 0xf);
out_insnp->opcode |= ((flags & 0xf0) << 8) | (flags & 0xf);
continue;
}
@ -1203,8 +1189,7 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
break;
else
{
out_insnp->opcode |=
(regno << 12) | (size_bits << 4);
out_insnp->opcode |= (regno << 12) | (size_bits << 4);
continue;
}
@ -1312,7 +1297,7 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
|| out_insnp->expr.X_add_number > 255))
as_bad (_("Immediate value not in 8 bit range: %ld"),
out_insnp->expr.X_add_number);
/* FALLTHROUGH. */
/* Fall through. */
case 2:
/* FIXME: We need an indicator in the instruction
table to pass on, to indicate if we need to check
@ -1343,7 +1328,7 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
|| out_insnp->expr.X_add_number > 255))
as_bad (_("Immediate value not in 8 bit range: %ld"),
out_insnp->expr.X_add_number);
/* FALLTHROUGH. */
/* Fall through. */
case 1:
if (out_insnp->expr.X_op == O_constant
&& (out_insnp->expr.X_add_number < -32768
@ -1367,7 +1352,6 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
}
}
/* Get a B, W, or D size modifier from the string pointed out by *cPP,
which must point to a '.' in front of the modifier. On successful
return, *cPP is advanced to the character following the size
@ -1390,7 +1374,7 @@ get_bwd_size_modifier (cPP, size_bitsp)
return 0;
else
{
/* Consume the '.' */
/* Consume the '.'. */
(*cPP)++;
switch (**cPP)
@ -1420,7 +1404,6 @@ get_bwd_size_modifier (cPP, size_bitsp)
}
}
/* Get a B or W size modifier from the string pointed out by *cPP,
which must point to a '.' in front of the modifier. On successful
return, *cPP is advanced to the character following the size
@ -1443,7 +1426,7 @@ get_bw_size_modifier (cPP, size_bitsp)
return 0;
else
{
/* Consume the '.' */
/* Consume the '.'. */
(*cPP)++;
switch (**cPP)
@ -1468,7 +1451,6 @@ get_bw_size_modifier (cPP, size_bitsp)
}
}
/* Get a general register from the string pointed out by *cPP. The
variable *cPP is advanced to the character following the general
register name on a successful return, and has its initial position
@ -1509,7 +1491,7 @@ get_gen_reg (cPP, regnop)
case 'R':
case 'r':
/* Hopefully r[0-9] or r1[0-5]. Consume 'R' or 'r' */
/* Hopefully r[0-9] or r1[0-5]. Consume 'R' or 'r'. */
(*cPP)++;
if (isdigit (**cPP))
@ -1563,7 +1545,6 @@ get_gen_reg (cPP, regnop)
return 0;
}
/* Get a special register from the string pointed out by *cPP. The
variable *cPP is advanced to the character following the special
register name if one is found, and retains its original position
@ -1588,11 +1569,8 @@ get_spec_reg (cPP, sregpp)
const struct cris_spec_reg *sregp;
/* Loop over all special registers. */
for (sregp = cris_spec_regs;
sregp->name != NULL;
sregp++)
for (sregp = cris_spec_regs; sregp->name != NULL; sregp++)
{
/* Start over from beginning of the supposed name. */
s1 = *cPP;
s2 = sregp->name;
@ -1620,7 +1598,6 @@ get_spec_reg (cPP, sregpp)
return 0;
}
/* Get an unprefixed or side-effect-prefix operand from the string pointed
out by *cPP. The pointer *cPP is advanced to the character following
the indirect operand if we have success, else it contains an undefined
@ -1850,7 +1827,6 @@ get_autoinc_prefix_or_indir_op (cPP, prefixp, is_autoincp, src_regnop,
return 0;
}
/* This function gets an indirect operand in a three-address operand
combination from the string pointed out by *cPP. The pointer *cPP is
advanced to the character following the indirect operand on success, or
@ -2041,8 +2017,7 @@ get_3op_or_dip_prefix_op (cPP, prefixp)
/* Expression found, the so called absolute mode for a
double-indirect prefix on PC. */
prefixp->kind = PREFIX_DIP;
prefixp->opcode
= DIP_OPCODE | (AUTOINCR_BIT << 8) | REG_PC;
prefixp->opcode = DIP_OPCODE | (AUTOINCR_BIT << 8) | REG_PC;
prefixp->reloc = BFD_RELOC_32;
}
else
@ -2060,7 +2035,6 @@ get_3op_or_dip_prefix_op (cPP, prefixp)
return 1;
}
/* Get an expression from the string pointed out by *cPP.
The pointer *cPP is advanced to the character following the expression
on a success, or retains its original value otherwise.
@ -2099,7 +2073,6 @@ cris_get_expression (cPP, exprP)
return 1;
}
/* Get a sequence of flag characters from *spp. The pointer *cPP is
advanced to the character following the expression. The flag
characters are consecutive, no commas or spaces.
@ -2179,7 +2152,6 @@ get_flags (cPP, flagsp)
}
}
/* Generate code and fixes for a BDAP prefix.
base_regno Int containing the base register number.
@ -2239,7 +2211,6 @@ gen_bdap (base_regno, exprP)
exprP->X_add_symbol, exprP->X_add_number, opcodep);
}
/* Encode a branch displacement in the range -256..254 into the form used
by CRIS conditional branch instructions.
@ -2259,7 +2230,6 @@ branch_disp (offset)
return disp;
}
/* Generate code and fixes for a 32-bit conditional branch instruction
created by "extending" an existing 8-bit branch instruction.
@ -2338,12 +2308,11 @@ gen_cond_branch_32 (opcodep, writep, fragP, add_symP, sub_symP, add_num)
}
}
/* This *could* be:
Turn a string in input_line_pointer into a floating point constant of
type type, and store the appropriate bytes in *litp. The number of
LITTLENUMS emitted is stored in *sizep.
Turn a string in input_line_pointer into a floating point constant
of type TYPE, and store the appropriate bytes in *LITP. The number
of LITTLENUMS emitted is stored in *SIZEP.
type A character from FLTCHARS that describes what kind of
floating-point number is wanted.
@ -2370,7 +2339,6 @@ md_atof (type, litp, sizep)
return _("Bad call to md_atof () - floating point formats are not supported");
}
/* Turn a number as a fixS * into a series of bytes that represents the
number on the target machine. The purpose of this procedure is the
same as that of md_number_to_chars but this procedure is supposed to
@ -2503,10 +2471,10 @@ cris_number_to_imm (bufp, val, n, fixP)
}
}
/* Processes machine-dependent command line options. Called once for
each option on the command line that the machine-independent part of
GAS does not understand. */
int
md_parse_option (arg, argp)
int arg;
@ -2517,7 +2485,8 @@ md_parse_option (arg, argp)
case 'H':
case 'h':
md_show_usage (stdout);
exit (0); /* Don't continue */
/* Don't continue. */
exit (0);
case 'N':
warn_for_branch_expansion = 1;
@ -2558,7 +2527,6 @@ md_section_align (segment, size)
return size;
}
/* Generate a machine-dependent relocation. */
arelent *
tc_gen_reloc (section, fixP)
@ -2640,8 +2608,8 @@ tc_gen_reloc (section, fixP)
return relP;
}
/* Machine-dependent usage-output. */
void
md_show_usage (stream)
FILE *stream;
@ -2664,7 +2632,6 @@ md_show_usage (stream)
fprintf (stream, _("Description : Assembler for the CRIS processor.\n"));
}
/* Apply a fixS (fixup of an instruction or data that we didn't have
enough info to complete immediately) to the data in a frag. */
@ -2707,7 +2674,6 @@ md_apply_fix (fixP, valP)
return 1;
}
/* All relocations are relative to the location just after the fixup;
the address of the fixup plus its size. */
@ -2727,7 +2693,6 @@ md_pcrel_from (fixP)
return fixP->fx_size + addr;
}
/* We have no need to give defaults for symbol-values. */
symbolS *
md_undefined_symbol (name)
@ -2736,7 +2701,6 @@ md_undefined_symbol (name)
return 0;
}
/* Definition of TC_FORCE_RELOCATION.
FIXME: Unsure of this. Can we omit it? Just copied from tc-i386.c
when doing multi-object format with ELF, since it's the only other

View file

@ -1,6 +1,6 @@
/* i386.c -- Assemble code for the Intel 80386
Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
Free Software Foundation.
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@ -19,12 +19,10 @@
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
/*
Intel 80386 machine specific gas.
/* Intel 80386 machine specific gas.
Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
Bugs & suggestions are completely welcome. This is free software.
Please help us make it better.
*/
Please help us make it better. */
#include <ctype.h>
@ -217,25 +215,33 @@ static const templates *current_templates;
/* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
static expressionS disp_expressions[2], im_expressions[2];
static int this_operand; /* Current operand we are working on. */
/* Current operand we are working on. */
static int this_operand;
static int flag_16bit_code; /* 1 if we're writing 16-bit code,
/* 1 if we're writing 16-bit code,
0 if 32-bit. */
static int flag_16bit_code;
static int intel_syntax = 0; /* 1 for intel syntax, 0 if att syntax. */
/* 1 for intel syntax,
0 if att syntax. */
static int intel_syntax = 0;
static int allow_naked_reg = 0; /* 1 if register prefix % not required */
/* 1 if register prefix % not required. */
static int allow_naked_reg = 0;
static char stackop_size = '\0'; /* Used in 16 bit gcc mode to add an l
suffix to call, ret, enter, leave, push,
and pop instructions so that gcc has the
same stack frame as in 32 bit mode. */
/* Used in 16 bit gcc mode to add an l suffix to call, ret, enter,
leave, push, and pop instructions so that gcc has the same stack
frame as in 32 bit mode. */
static char stackop_size = '\0';
static int quiet_warnings = 0; /* Non-zero to quieten some warnings. */
/* Non-zero to quieten some warnings. */
static int quiet_warnings = 0;
static const char *cpu_arch_name = NULL; /* cpu name */
/* CPU name. */
static const char *cpu_arch_name = NULL;
static unsigned int cpu_arch_flags = 0; /* cpu feature flags */
/* CPU feature flags. */
static unsigned int cpu_arch_flags = 0;
/* Interface to relax_segment.
There are 2 relax states for 386 jump insns: one for conditional &
@ -243,10 +249,10 @@ static unsigned int cpu_arch_flags = 0; /* cpu feature flags */
jumps add different sizes to frags when we're figuring out what
sort of jump to choose to reach a given label. */
/* types */
#define COND_JUMP 1 /* conditional jump */
#define UNCOND_JUMP 2 /* unconditional jump */
/* sizes */
/* Types. */
#define COND_JUMP 1 /* Conditional jump. */
#define UNCOND_JUMP 2 /* Unconditional jump. */
/* Sizes. */
#define CODE16 1
#define SMALL 0
#define SMALL16 (SMALL|CODE16)
@ -322,7 +328,6 @@ static const arch_entry cpu_arch[] = {
{NULL, 0 }
};
void
i386_align_code (fragP, count)
fragS *fragP;
@ -401,7 +406,8 @@ i386_align_code (fragP, count)
{
memcpy (fragP->fr_literal + fragP->fr_fix,
f16_patt[count - 1], count);
if (count > 8) /* adjust jump offset */
if (count > 8)
/* Adjust jump offset. */
fragP->fr_literal[fragP->fr_fix + 1] = count - 2;
}
else
@ -435,28 +441,28 @@ fits_in_signed_byte (num)
offsetT num;
{
return (num >= -128) && (num <= 127);
} /* fits_in_signed_byte() */
}
static INLINE int
fits_in_unsigned_byte (num)
offsetT num;
{
return (num & 0xff) == num;
} /* fits_in_unsigned_byte() */
}
static INLINE int
fits_in_unsigned_word (num)
offsetT num;
{
return (num & 0xffff) == num;
} /* fits_in_unsigned_word() */
}
static INLINE int
fits_in_signed_word (num)
offsetT num;
{
return (-32768 <= num) && (num <= 32767);
} /* fits_in_signed_word() */
}
static int
smallest_imm_type (num)
@ -480,7 +486,7 @@ smallest_imm_type (num)
: (fits_in_signed_word (num) || fits_in_unsigned_word (num))
? (Imm16 | Imm32)
: (Imm32));
} /* smallest_imm_type() */
}
static offsetT
offset_in_range (val, size)
@ -615,7 +621,8 @@ set_intel_syntax (syntax_flag)
allow_naked_reg = (intel_syntax
&& (bfd_get_symbol_leading_char (stdoutput) != '\0'));
#else
allow_naked_reg = 0; /* conservative default */
/* Conservative default. */
allow_naked_reg = 0;
#endif
}
else
@ -679,28 +686,29 @@ const pseudo_typeS md_pseudo_table[] =
{0, 0, 0}
};
/* for interface with expression () */
/* For interface with expression (). */
extern char *input_line_pointer;
/* hash table for instruction mnemonic lookup */
/* Hash table for instruction mnemonic lookup. */
static struct hash_control *op_hash;
/* hash table for register lookup */
/* Hash table for register lookup. */
static struct hash_control *reg_hash;
void
md_begin ()
{
const char *hash_err;
/* initialize op_hash hash table */
/* Initialize op_hash hash table. */
op_hash = hash_new ();
{
register const template *optab;
register templates *core_optab;
optab = i386_optab; /* setup for loop */
/* Setup for loop. */
optab = i386_optab;
core_optab = (templates *) xmalloc (sizeof (templates));
core_optab->start = optab;
@ -711,7 +719,7 @@ md_begin ()
|| strcmp (optab->name, (optab - 1)->name) != 0)
{
/* different name --> ship out current template list;
add to hash table; & begin anew */
add to hash table; & begin anew. */
core_optab->end = optab;
hash_err = hash_insert (op_hash,
(optab - 1)->name,
@ -731,7 +739,7 @@ md_begin ()
}
}
/* initialize reg_hash hash table */
/* Initialize reg_hash hash table. */
reg_hash = hash_new ();
{
register const reg_entry *regtab;
@ -746,7 +754,7 @@ md_begin ()
}
}
/* fill in lexical tables: mnemonic_chars, operand_chars. */
/* Fill in lexical tables: mnemonic_chars, operand_chars. */
{
register int c;
register char *p;
@ -811,7 +819,6 @@ i386_print_statistics (file)
hash_print_statistics (file, "i386 register", reg_hash);
}
#ifdef DEBUG386
/* debugging routines for md_assemble */
@ -856,8 +863,7 @@ pte (t)
{
int i;
fprintf (stdout, " %d operands ", t->operands);
fprintf (stdout, "opcode %x ",
t->base_opcode);
fprintf (stdout, "opcode %x ", t->base_opcode);
if (t->extension_opcode != None)
fprintf (stdout, "ext %x ", t->extension_opcode);
if (t->opcode_modifier & D)
@ -987,7 +993,8 @@ reloc (size, pcrel, other)
int pcrel;
bfd_reloc_code_real_type other;
{
if (other != NO_RELOC) return other;
if (other != NO_RELOC)
return other;
if (pcrel)
{
@ -1013,12 +1020,11 @@ reloc (size, pcrel, other)
return BFD_RELOC_NONE;
}
/*
* Here we decide which fixups can be adjusted to make them relative to
* the beginning of the section instead of the symbol. Basically we need
* to make sure that the dynamic relocations are done correctly, so in
* some cases we force the original symbol to be used.
*/
/* Here we decide which fixups can be adjusted to make them relative to
the beginning of the section instead of the symbol. Basically we need
to make sure that the dynamic relocations are done correctly, so in
some cases we force the original symbol to be used. */
int
tc_i386_fix_adjustable (fixP)
fixS *fixP;
@ -1050,8 +1056,7 @@ tc_i386_fix_adjustable (fixP)
#define BFD_RELOC_386_GOTOFF 0
#endif
static int
intel_float_operand PARAMS ((char *mnemonic));
static int intel_float_operand PARAMS ((char *mnemonic));
static int
intel_float_operand (mnemonic)
@ -1157,8 +1162,7 @@ md_assemble (line)
case 0:
return;
case 2:
expecting_string_instruction =
current_templates->start->name;
expecting_string_instruction = current_templates->start->name;
break;
}
/* Skip past PREFIX_SEPARATOR and reset token_start. */
@ -1288,7 +1292,7 @@ md_assemble (line)
l++;
}
if (l != token_start)
{ /* yes, we've read in another operand */
{ /* Yes, we've read in another operand. */
unsigned int operand_ok;
this_operand = i.operands++;
if (i.operands > MAX_OPERANDS)
@ -1297,11 +1301,13 @@ md_assemble (line)
MAX_OPERANDS);
return;
}
/* now parse operand adding info to 'i' as we go along */
/* Now parse operand adding info to 'i' as we go along. */
END_STRING_AND_SAVE (l);
if (intel_syntax)
operand_ok = i386_intel_operand (token_start, intel_float_operand (mnemonic));
operand_ok =
i386_intel_operand (token_start,
intel_float_operand (mnemonic));
else
operand_ok = i386_operand (token_start);
@ -1519,7 +1525,8 @@ md_assemble (line)
continue;
else if (!t->operands)
break; /* 0 operands always matches */
/* 0 operands always matches. */
break;
overlap0 = i.types[0] & t->operand_types[0];
switch (t->operands)
@ -1538,12 +1545,11 @@ md_assemble (line)
overlap1, i.types[1],
t->operand_types[1]))
{
/* check if other direction is valid ... */
/* Check if other direction is valid ... */
if ((t->opcode_modifier & (D|FloatD)) == 0)
continue;
/* try reversing direction of operands */
/* Try reversing direction of operands. */
overlap0 = i.types[0] & t->operand_types[1];
overlap1 = i.types[1] & t->operand_types[0];
if (!MATCH (overlap0, i.types[0], t->operand_types[1])
@ -1553,7 +1559,7 @@ md_assemble (line)
overlap1, i.types[1],
t->operand_types[0]))
{
/* does not match either direction */
/* Does not match either direction. */
continue;
}
/* found_reverse_match holds which of D or FloatDR
@ -1561,7 +1567,7 @@ md_assemble (line)
found_reverse_match = t->opcode_modifier & (D|FloatDR);
break;
}
/* found a forward 2 operand match here */
/* Found a forward 2 operand match here. */
if (t->operands == 3)
{
/* Here we make use of the fact that there are no
@ -1577,13 +1583,15 @@ md_assemble (line)
continue;
}
/* found either forward/reverse 2 or 3 operand match here:
/* Found either forward/reverse 2 or 3 operand match here:
slip through to break */
}
break; /* we've found a match; break out of loop */
/* We've found a match; break out of loop. */
break;
} /* for (t = ... */
if (t == current_templates->end)
{ /* we found no match */
{
/* We found no match. */
as_bad (_("suffix or operands invalid for `%s'"),
current_templates->start->name);
return;
@ -1746,6 +1754,7 @@ md_assemble (line)
else if (i.suffix == LONG_MNEM_SUFFIX)
{
int op;
for (op = i.operands; --op >= 0;)
/* Reject eight bit registers, except where the template
requires them. (eg. movzb) */
@ -1971,14 +1980,14 @@ md_assemble (line)
The first case can be generated by gcc (<= 2.8.1). */
if (i.operands == 2)
{
/* reversed arguments on faddp, fsubp, etc. */
/* Reversed arguments on faddp, fsubp, etc. */
as_warn (_("translating to `%s %%%s,%%%s'"), i.tm.name,
i.op[1].regs->reg_name,
i.op[0].regs->reg_name);
}
else
{
/* extraneous `l' suffix on fp insn */
/* Extraneous `l' suffix on fp insn. */
as_warn (_("translating to `%s %%%s'"), i.tm.name,
i.op[0].regs->reg_name);
}
@ -2023,7 +2032,7 @@ md_assemble (line)
}
}
else
{ /* if it's not 2 reg operands... */
{ /* If it's not 2 reg operands... */
if (i.mem_operands)
{
unsigned int fake_zero_displacement = 0;
@ -2061,7 +2070,7 @@ md_assemble (line)
i.sib.scale = i.log2_scale_factor;
i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
i.types[op] &= ~Disp;
i.types[op] |= Disp32; /* Must be 32 bit */
i.types[op] |= Disp32; /* Must be 32 bit. */
}
}
else if (i.base_reg->reg_type & Reg16)
@ -2192,7 +2201,8 @@ md_assemble (line)
}
else if (i.tm.opcode_modifier & (Seg2ShortForm | Seg3ShortForm))
{
if (i.tm.base_opcode == POP_SEG_SHORT && i.op[0].regs->reg_num == 1)
if (i.tm.base_opcode == POP_SEG_SHORT
&& i.op[0].regs->reg_num == 1)
{
as_bad (_("you can't `pop %%cs'"));
return;
@ -2346,7 +2356,7 @@ md_assemble (line)
}
else
{
/* opcode can be at most two bytes */
/* Opcode can be at most two bytes. */
insn_size += 2 + size;
p = frag_more (2 + size);
*p++ = (i.tm.base_opcode >> 8) & 0xff;
@ -2381,7 +2391,8 @@ md_assemble (line)
if (i.prefixes != 0 && !intel_syntax)
as_warn (_("skipping prefixes on this instruction"));
insn_size += prefix + 1 + 2 + size; /* 1 opcode; 2 segment; offset */
/* 1 opcode; 2 segment; offset */
insn_size += prefix + 1 + 2 + size;
p = frag_more (prefix + 1 + 2 + size);
if (prefix)
*p++ = DATA_PREFIX_OPCODE;
@ -2435,12 +2446,12 @@ md_assemble (line)
{
insn_size += 2;
p = frag_more (2);
/* put out high byte first: can't use md_number_to_chars! */
/* Put out high byte first: can't use md_number_to_chars! */
*p++ = (i.tm.base_opcode >> 8) & 0xff;
*p = i.tm.base_opcode & 0xff;
}
else
{ /* opcode is either 3 or 4 bytes */
{ /* Opcode is either 3 or 4 bytes. */
if (i.tm.base_opcode & 0xff000000)
{
insn_size += 4;
@ -2526,9 +2537,9 @@ md_assemble (line)
}
}
}
} /* end displacement output */
} /* End displacement output. */
/* output immediate */
/* Output immediate. */
if (i.imm_operands)
{
register unsigned int n;
@ -2556,7 +2567,7 @@ md_assemble (line)
md_number_to_chars (p, val, size);
}
else
{ /* not absolute_section */
{ /* Not absolute_section. */
/* Need a 32-bit fixup (don't support 8bit
non-absolute imms). Try to support other
sizes ... */
@ -2633,12 +2644,10 @@ i386_immediate (imm_start)
#ifndef LEX_AT
{
/*
* We can have operands of the form
* <symbol>@GOTOFF+<nnn>
* Take the easy way out here and copy everything
* into a temporary buffer...
*/
/* We can have operands of the form
<symbol>@GOTOFF+<nnn>
Take the easy way out here and copy everything
into a temporary buffer... */
register char *cp;
cp = strchr (input_line_pointer, '@');
@ -2648,7 +2657,7 @@ i386_immediate (imm_start)
int len = 0;
int first;
/* GOT relocations are not supported in 16 bit mode */
/* GOT relocations are not supported in 16 bit mode. */
if (flag_16bit_code)
as_bad (_("GOT relocations not supported in 16 bit mode"));
@ -2695,7 +2704,7 @@ i386_immediate (imm_start)
if (exp->X_op == O_absent || exp->X_op == O_big)
{
/* missing or bad expr becomes absolute 0 */
/* Missing or bad expr becomes absolute 0. */
as_bad (_("missing or invalid immediate expression `%s' taken as 0"),
imm_start);
exp->X_op = O_constant;
@ -2706,14 +2715,15 @@ i386_immediate (imm_start)
if (exp->X_op == O_constant)
{
i.types[this_operand] |= Imm32; /* Size it properly later. */
/* Size it properly later. */
i.types[this_operand] |= Imm32;
}
#if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
else if (
else if (1
#ifdef BFD_ASSEMBLER
OUTPUT_FLAVOR == bfd_target_aout_flavour &&
&& OUTPUT_FLAVOR == bfd_target_aout_flavour
#endif
exp_seg != text_section
&& exp_seg != text_section
&& exp_seg != data_section
&& exp_seg != bss_section
&& exp_seg != undefined_section
@ -2846,20 +2856,17 @@ i386_displacement (disp_start, disp_end)
rorl $16,%edx
#NO_APP
So here we provide the missing zero.
*/
So here we provide the missing zero. */
*displacement_string_end = '0';
}
#endif
#ifndef LEX_AT
{
/*
* We can have operands of the form
* <symbol>@GOTOFF+<nnn>
* Take the easy way out here and copy everything
* into a temporary buffer...
*/
/* We can have operands of the form
<symbol>@GOTOFF+<nnn>
Take the easy way out here and copy everything
into a temporary buffer... */
register char *cp;
cp = strchr (input_line_pointer, '@');
@ -2869,7 +2876,7 @@ i386_displacement (disp_start, disp_end)
int len = 0;
int first;
/* GOT relocations are not supported in 16 bit mode */
/* GOT relocations are not supported in 16 bit mode. */
if (flag_16bit_code)
as_bad (_("GOT relocations not supported in 16 bit mode"));
@ -2911,7 +2918,7 @@ i386_displacement (disp_start, disp_end)
#ifdef BFD_ASSEMBLER
/* We do this to make sure that the section symbol is in
the symbol table. We will ultimately change the relocation
to be relative to the beginning of the section */
to be relative to the beginning of the section. */
if (i.disp_reloc[this_operand] == BFD_RELOC_386_GOTOFF)
{
if (S_IS_LOCAL(exp->X_add_symbol)
@ -2936,7 +2943,7 @@ i386_displacement (disp_start, disp_end)
if (exp->X_op == O_absent || exp->X_op == O_big)
{
/* missing or bad expr becomes absolute 0 */
/* Missing or bad expr becomes absolute 0. */
as_bad (_("missing or invalid displacement expression `%s' taken as 0"),
disp_start);
exp->X_op = O_constant;
@ -3055,7 +3062,7 @@ build_displacement_string (initial_disp, op_string)
return temp_string;
}
/* Build the whole displacement string */
/* Build the whole displacement string. */
if (initial_disp)
{
strncpy (temp_string, op_string, end_of_operand_string - op_string);
@ -3076,7 +3083,7 @@ build_displacement_string (initial_disp, op_string)
if (is_space_char (*temp_disp))
temp_disp++;
/* Don't consider registers */
/* Don't consider registers. */
if ( !((*temp_disp == REGISTER_PREFIX || allow_naked_reg)
&& parse_register (temp_disp, &end_op)) )
{
@ -3116,7 +3123,7 @@ i386_parse_seg (op_string)
if (is_space_char (*op_string))
++op_string;
/* Should be one of es, cs, ss, ds fs or gs */
/* Should be one of es, cs, ss, ds fs or gs. */
switch (*op_string++)
{
case 'e':
@ -3164,8 +3171,8 @@ i386_parse_seg (op_string)
static int i386_index_check PARAMS((const char *));
/* Make sure the memory operand we've been dealt is valid.
Returns 1 on success, 0 on a failure.
*/
Return 1 on success, 0 on a failure. */
static int
i386_index_check (operand_string)
const char *operand_string;
@ -3176,7 +3183,7 @@ i386_index_check (operand_string)
tryprefix:
#endif
if (flag_16bit_code ^ (i.prefix[ADDR_PREFIX] != 0)
/* 16 bit mode checks */
/* 16 bit mode checks. */
? ((i.base_reg
&& ((i.base_reg->reg_type & (Reg16|BaseIndex))
!= (Reg16|BaseIndex)))
@ -3187,7 +3194,7 @@ i386_index_check (operand_string)
&& i.base_reg->reg_num < 6
&& i.index_reg->reg_num >= 6
&& i.log2_scale_factor == 0))))
/* 32 bit mode checks */
/* 32 bit mode checks. */
: ((i.base_reg
&& (i.base_reg->reg_type & Reg32) == 0)
|| (i.index_reg
@ -3203,8 +3210,7 @@ i386_index_check (operand_string)
Disp16 or Disp32 is set.
FIXME. There doesn't seem to be any real need for separate
Disp16 and Disp32 flags. The same goes for Imm16 and Imm32.
Removing them would probably clean up the code quite a lot.
*/
Removing them would probably clean up the code quite a lot. */
if (i.types[this_operand] & (Disp16|Disp32))
i.types[this_operand] ^= (Disp16|Disp32);
fudged = 1;
@ -3255,7 +3261,7 @@ i386_intel_memory_operand (operand_string)
}
}
/* Look for displacement preceding open bracket */
/* Look for displacement preceding open bracket. */
if (*op_string != '[')
{
char *temp_string;
@ -3743,14 +3749,14 @@ i386_operand (operand_string)
i.mem_operands++;
}
else
{ /* it's not a memory operand; argh! */
{ /* It's not a memory operand; argh! */
as_bad (_("invalid char %s beginning operand %d `%s'"),
output_invalid (*op_string),
this_operand + 1,
op_string);
return 0;
}
return 1; /* normal return */
return 1; /* Normal return. */
}
/* md_estimate_size_before_relax()
@ -3805,8 +3811,10 @@ md_estimate_size_before_relax (fragP, segment)
switch (opcode[0])
{
case JUMP_PC_RELATIVE: /* make jmp (0xeb) a dword displacement jump */
opcode[0] = 0xe9; /* dword disp jmp */
case JUMP_PC_RELATIVE:
/* Make jmp (0xeb) a dword displacement jump. */
/* dword disp jmp */
opcode[0] = 0xe9;
fragP->fr_fix += size;
fix_new (fragP, old_fr_fix, size,
fragP->fr_symbol,
@ -3819,7 +3827,8 @@ md_estimate_size_before_relax (fragP, segment)
to the dword-displacement jump 0x0f,0x8N. */
opcode[1] = opcode[0] + 0x10;
opcode[0] = TWO_BYTE_OPCODE_ESCAPE;
fragP->fr_fix += 1 + size; /* we've added an opcode byte */
/* We've added an opcode byte. */
fragP->fr_fix += 1 + size;
fix_new (fragP, old_fr_fix + 1, size,
fragP->fr_symbol,
fragP->fr_offset, 1,
@ -3829,20 +3838,19 @@ md_estimate_size_before_relax (fragP, segment)
frag_wane (fragP);
return fragP->fr_fix - old_fr_fix;
}
return 1; /* Guess a short jump. */
/* Guess a short jump. */
return 1;
}
/*
* md_convert_frag();
*
* Called after relax() is finished.
* In: Address of frag.
* fr_type == rs_machine_dependent.
* fr_subtype is what the address relaxed to.
*
* Out: Any fixSs and constants are set up.
* Caller will turn frag into a ".space 0".
*/
/* Called after relax() is finished.
In: Address of frag.
fr_type == rs_machine_dependent.
fr_subtype is what the address relaxed to.
Out: Any fixSs and constants are set up.
Caller will turn frag into a ".space 0". */
#ifndef BFD_ASSEMBLER
void
md_convert_frag (headers, sec, fragP)
@ -3868,7 +3876,8 @@ md_convert_frag (abfd, sec, fragP)
/* Address we want to reach in file space. */
target_address = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset;
#ifdef BFD_ASSEMBLER /* not needed otherwise? */
#ifdef BFD_ASSEMBLER
/* Not needed otherwise? */
target_address += symbol_get_frag (fragP->fr_symbol)->fr_address;
#endif
@ -3884,7 +3893,7 @@ md_convert_frag (abfd, sec, fragP)
case ENCODE_RELAX_STATE (COND_JUMP, SMALL16):
case ENCODE_RELAX_STATE (UNCOND_JUMP, SMALL):
case ENCODE_RELAX_STATE (UNCOND_JUMP, SMALL16):
/* don't have to change opcode */
/* Don't have to change opcode. */
extension = 1; /* 1 opcode + 1 displacement */
where_to_put_displacement = &opcode[1];
break;
@ -3919,17 +3928,21 @@ md_convert_frag (abfd, sec, fragP)
BAD_CASE (fragP->fr_subtype);
break;
}
/* now put displacement after opcode */
/* Now put displacement after opcode. */
md_number_to_chars ((char *) where_to_put_displacement,
(valueT) (displacement_from_opcode_start - extension),
SIZE_FROM_RELAX_STATE (fragP->fr_subtype));
fragP->fr_fix += extension;
}
/* Size of byte displacement jmp. */
int md_short_jump_size = 2;
int md_short_jump_size = 2; /* size of byte displacement jmp */
int md_long_jump_size = 5; /* size of dword displacement jmp */
const int md_reloc_size = 8; /* Size of relocation record */
/* Size of dword displacement jmp. */
int md_long_jump_size = 5;
/* Size of relocation record. */
const int md_reloc_size = 8;
void
md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol)
@ -3941,7 +3954,8 @@ md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol)
offsetT offset;
offset = to_addr - (from_addr + 2);
md_number_to_chars (ptr, (valueT) 0xeb, 1); /* opcode for byte-disp jump */
/* Opcode for byte-disp jump. */
md_number_to_chars (ptr, (valueT) 0xeb, 1);
md_number_to_chars (ptr + 1, (valueT) offset, 1);
}
@ -3968,9 +3982,14 @@ md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
int
md_apply_fix3 (fixP, valp, seg)
fixS *fixP; /* The fix we're to put in. */
valueT *valp; /* Pointer to the value of the bits. */
segT seg ATTRIBUTE_UNUSED; /* Segment fix is from. */
/* The fix we're to put in. */
fixS *fixP;
/* Pointer to the value of the bits. */
valueT *valp;
/* Segment fix is from. */
segT seg ATTRIBUTE_UNUSED;
{
register char *p = fixP->fx_where + fixP->fx_frag->fr_literal;
valueT value = *valp;
@ -4046,15 +4065,16 @@ md_apply_fix3 (fixP, valp, seg)
#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
if (OUTPUT_FLAVOR == bfd_target_elf_flavour
&& fixP->fx_addsy)
switch (fixP->fx_r_type) {
switch (fixP->fx_r_type)
{
case BFD_RELOC_386_PLT32:
/* Make the jump instruction point to the address of the operand. At
runtime we merely add the offset to the actual PLT entry. */
value = -4;
break;
case BFD_RELOC_386_GOTPC:
/*
* This is tough to explain. We end up with this one if we have
/* This is tough to explain. We end up with this one if we have
* operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
* here is to obtain the absolute address of the GOT, and it is strongly
* preferable from a performance point of view to avoid using a runtime
@ -4089,8 +4109,9 @@ md_apply_fix3 (fixP, valp, seg)
* explicitly mentioned, and I wonder whether it would simplify matters
* to do it this way. Who knows. In earlier versions of the PIC patches,
* the pcrel_adjust field was used to store the correction, but since the
* expression is not pcrel, I felt it would be confusing to do it this way.
*/
* expression is not pcrel, I felt it would be confusing to do it this
* way. */
value -= 1;
break;
case BFD_RELOC_386_GOT32:
@ -4115,12 +4136,13 @@ md_apply_fix3 (fixP, valp, seg)
return 1;
}
#define MAX_LITTLENUMS 6
/* Turn the string pointed to by litP into a floating point constant of type
type, and emit the appropriate bytes. The number of LITTLENUMS emitted
is stored in *sizeP . An error message is returned, or NULL on OK. */
/* Turn the string pointed to by litP into a floating point constant
of type TYPE, and emit the appropriate bytes. The number of
LITTLENUMS emitted is stored in *SIZEP. An error message is
returned, or NULL on OK. */
char *
md_atof (type, litP, sizeP)
int type;
@ -4181,7 +4203,6 @@ output_invalid (c)
return output_invalid_buf;
}
/* REG_STRING starts *before* REGISTER_PREFIX. */
static const reg_entry *
@ -4235,7 +4256,7 @@ parse_register (reg_string, end_op)
return r;
}
}
/* We have "%st(" then garbage */
/* We have "%st(" then garbage. */
return (const reg_entry *) NULL;
}
}
@ -4363,6 +4384,7 @@ md_undefined_symbol (name)
}
/* Round up a section size to the appropriate boundary. */
valueT
md_section_align (segment, size)
segT segment ATTRIBUTE_UNUSED;
@ -4414,7 +4436,6 @@ s_bss (ignore)
#endif
#ifdef BFD_ASSEMBLER
void
@ -4521,10 +4542,8 @@ tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
fixS *fixP;
relax_addressT segment_address_in_file;
{
/*
* In: length of relocation (or of address) in chars: 1, 2 or 4.
* Out: GNU LD relocation length code: 0, 1, or 2.
*/
/* In: length of relocation (or of address) in chars: 1, 2 or 4.
Out: GNU LD relocation length code: 0, 1, or 2. */
static const unsigned char nbytes_r_length[] = { 42, 0, 1, 42, 2 };
long r_symbolnum;
@ -4548,7 +4567,7 @@ tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
| (((fixP->fx_pcrel << 0) & 0x01) & 0x0f));
}
#endif /* OBJ_AOUT or OBJ_BOUT */
#endif /* OBJ_AOUT or OBJ_BOUT. */
#if defined (I386COFF)
@ -4581,5 +4600,3 @@ tc_coff_sizemachdep (frag)
#endif /* I386COFF */
#endif /* ! BFD_ASSEMBLER */
/* end of tc-i386.c */

View file

@ -1420,10 +1420,12 @@ sparc_ip (str, pinsn)
goto error;
}
kmask |= mask;
while (*s == ' ') { ++s; continue; }
while (*s == ' ')
++s;
if (*s == '|' || *s == '+')
++s;
while (*s == ' ') { ++s; continue; }
while (*s == ' ')
++s;
}
}
else