2008-03-28 Paul Brook <paul@codesourcery.com>
gas/ * config/tc-arm.c (parse_neon_mov): Parse register before immediate to avoid spurious symbols.
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df3ac60635
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2 changed files with 18 additions and 13 deletions
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@ -1,3 +1,8 @@
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2008-03-28 Paul Brook <paul@codesourcery.com>
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* config/tc-arm.c (parse_neon_mov): Parse register before immediate
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to avoid spurious symbols.
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2008-03-28 Nathan Sidwell <nathan@codesourcery.com>
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2008-03-28 Nathan Sidwell <nathan@codesourcery.com>
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* config/tc-m68k.c (md_convert_frag_1): Replace as_fatal with
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* config/tc-m68k.c (md_convert_frag_1): Replace as_fatal with
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@ -21,15 +26,15 @@
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instructions. And call yyerror when comparing PREG with
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instructions. And call yyerror when comparing PREG with
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DREG.
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DREG.
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(check_macfunc_option): New.
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(check_macfunc_option): New.
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(check_macfuncs): Check option by calling check_macfunc_option.
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(check_macfuncs): Check option by calling check_macfunc_option.
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Fix comparison always true warnings. Both scalar instructions
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Fix comparison always true warnings. Both scalar instructions
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of vector instruction must share the same mode option. Only allow
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of vector instruction must share the same mode option. Only allow
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option mode at the end of the second instruction of the vector.
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option mode at the end of the second instruction of the vector.
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(asm_1): Check option by calling check_macfunc_option.
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(asm_1): Check option by calling check_macfunc_option.
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* config/bfin-parse.y (check_macfunc_option): Allow (IU)
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* config/bfin-parse.y (check_macfunc_option): Allow (IU)
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option for multiply and multiply-accumulate to data register
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option for multiply and multiply-accumulate to data register
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instruction.
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instruction.
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(check_macfuncs): Don't check if accumulator matches the data register
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(check_macfuncs): Don't check if accumulator matches the data register
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here.
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here.
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(assign_macfunc): Check if accumulator matches the
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(assign_macfunc): Check if accumulator matches the
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@ -5209,16 +5209,6 @@ parse_neon_mov (char **str, int *which_operand)
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inst.operands[i].present = 1;
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inst.operands[i].present = 1;
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}
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}
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}
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}
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else if (parse_qfloat_immediate (&ptr, &inst.operands[i].imm) == SUCCESS)
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/* Case 2: VMOV<c><q>.<dt> <Qd>, #<float-imm>
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Case 3: VMOV<c><q>.<dt> <Dd>, #<float-imm>
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Case 10: VMOV.F32 <Sd>, #<imm>
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Case 11: VMOV.F64 <Dd>, #<imm> */
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inst.operands[i].immisfloat = 1;
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else if (parse_big_immediate (&ptr, i) == SUCCESS)
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/* Case 2: VMOV<c><q>.<dt> <Qd>, #<imm>
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Case 3: VMOV<c><q>.<dt> <Dd>, #<imm> */
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;
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else if ((val = arm_typed_reg_parse (&ptr, REG_TYPE_NSDQ, &rtype,
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else if ((val = arm_typed_reg_parse (&ptr, REG_TYPE_NSDQ, &rtype,
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&optype)) != FAIL)
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&optype)) != FAIL)
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{
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{
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@ -5258,6 +5248,16 @@ parse_neon_mov (char **str, int *which_operand)
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inst.operands[i++].present = 1;
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inst.operands[i++].present = 1;
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}
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}
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}
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}
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else if (parse_qfloat_immediate (&ptr, &inst.operands[i].imm) == SUCCESS)
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/* Case 2: VMOV<c><q>.<dt> <Qd>, #<float-imm>
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Case 3: VMOV<c><q>.<dt> <Dd>, #<float-imm>
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Case 10: VMOV.F32 <Sd>, #<imm>
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Case 11: VMOV.F64 <Dd>, #<imm> */
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inst.operands[i].immisfloat = 1;
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else if (parse_big_immediate (&ptr, i) == SUCCESS)
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/* Case 2: VMOV<c><q>.<dt> <Qd>, #<imm>
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Case 3: VMOV<c><q>.<dt> <Dd>, #<imm> */
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;
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else
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else
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{
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{
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first_error (_("expected <Rm> or <Dm> or <Qm> operand"));
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first_error (_("expected <Rm> or <Dm> or <Qm> operand"));
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