2008-03-28 Paul Brook <paul@codesourcery.com>

gas/
	* config/tc-arm.c (parse_neon_mov): Parse register before immediate
	to avoid spurious symbols.
This commit is contained in:
Paul Brook 2008-03-28 18:13:52 +00:00
parent df3ac60635
commit 4641781c11
2 changed files with 18 additions and 13 deletions

View file

@ -1,3 +1,8 @@
2008-03-28 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (parse_neon_mov): Parse register before immediate
to avoid spurious symbols.
2008-03-28 Nathan Sidwell <nathan@codesourcery.com> 2008-03-28 Nathan Sidwell <nathan@codesourcery.com>
* config/tc-m68k.c (md_convert_frag_1): Replace as_fatal with * config/tc-m68k.c (md_convert_frag_1): Replace as_fatal with
@ -21,15 +26,15 @@
instructions. And call yyerror when comparing PREG with instructions. And call yyerror when comparing PREG with
DREG. DREG.
(check_macfunc_option): New. (check_macfunc_option): New.
(check_macfuncs): Check option by calling check_macfunc_option. (check_macfuncs): Check option by calling check_macfunc_option.
Fix comparison always true warnings. Both scalar instructions Fix comparison always true warnings. Both scalar instructions
of vector instruction must share the same mode option. Only allow of vector instruction must share the same mode option. Only allow
option mode at the end of the second instruction of the vector. option mode at the end of the second instruction of the vector.
(asm_1): Check option by calling check_macfunc_option. (asm_1): Check option by calling check_macfunc_option.
* config/bfin-parse.y (check_macfunc_option): Allow (IU) * config/bfin-parse.y (check_macfunc_option): Allow (IU)
option for multiply and multiply-accumulate to data register option for multiply and multiply-accumulate to data register
instruction. instruction.
(check_macfuncs): Don't check if accumulator matches the data register (check_macfuncs): Don't check if accumulator matches the data register
here. here.
(assign_macfunc): Check if accumulator matches the (assign_macfunc): Check if accumulator matches the

View file

@ -5209,16 +5209,6 @@ parse_neon_mov (char **str, int *which_operand)
inst.operands[i].present = 1; inst.operands[i].present = 1;
} }
} }
else if (parse_qfloat_immediate (&ptr, &inst.operands[i].imm) == SUCCESS)
/* Case 2: VMOV<c><q>.<dt> <Qd>, #<float-imm>
Case 3: VMOV<c><q>.<dt> <Dd>, #<float-imm>
Case 10: VMOV.F32 <Sd>, #<imm>
Case 11: VMOV.F64 <Dd>, #<imm> */
inst.operands[i].immisfloat = 1;
else if (parse_big_immediate (&ptr, i) == SUCCESS)
/* Case 2: VMOV<c><q>.<dt> <Qd>, #<imm>
Case 3: VMOV<c><q>.<dt> <Dd>, #<imm> */
;
else if ((val = arm_typed_reg_parse (&ptr, REG_TYPE_NSDQ, &rtype, else if ((val = arm_typed_reg_parse (&ptr, REG_TYPE_NSDQ, &rtype,
&optype)) != FAIL) &optype)) != FAIL)
{ {
@ -5258,6 +5248,16 @@ parse_neon_mov (char **str, int *which_operand)
inst.operands[i++].present = 1; inst.operands[i++].present = 1;
} }
} }
else if (parse_qfloat_immediate (&ptr, &inst.operands[i].imm) == SUCCESS)
/* Case 2: VMOV<c><q>.<dt> <Qd>, #<float-imm>
Case 3: VMOV<c><q>.<dt> <Dd>, #<float-imm>
Case 10: VMOV.F32 <Sd>, #<imm>
Case 11: VMOV.F64 <Dd>, #<imm> */
inst.operands[i].immisfloat = 1;
else if (parse_big_immediate (&ptr, i) == SUCCESS)
/* Case 2: VMOV<c><q>.<dt> <Qd>, #<imm>
Case 3: VMOV<c><q>.<dt> <Dd>, #<imm> */
;
else else
{ {
first_error (_("expected <Rm> or <Dm> or <Qm> operand")); first_error (_("expected <Rm> or <Dm> or <Qm> operand"));