1999-12-30 Andrew Haley <aph@cygnus.com>
* mips.h (OPCODE_IS_MEMBER): Add gp32 arg.
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2 changed files with 10 additions and 2 deletions
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@ -1,3 +1,7 @@
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1999-12-30 Andrew Haley <aph@cygnus.com>
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* mips.h (OPCODE_IS_MEMBER): Add gp32 arg.
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2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
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* i386.h: Qualify intel mode far call and jmp with x_Suf.
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@ -320,14 +320,18 @@ struct mips_opcode
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/* Toshiba R3900 instruction. */
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#define INSN_3900 0x00000080
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/* 32-bit code running on a ISA3+ CPU. */
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#define INSN_GP32 0x00001000
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/* Test for membership in an ISA including chip specific ISAs.
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INSN is pointer to an element of the opcode table; ISA is the
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specified ISA to test against; and CPU is the CPU specific ISA
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to test, or zero if no CPU specific ISA test is desired. */
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#define OPCODE_IS_MEMBER(insn,isa,cpu) \
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#define OPCODE_IS_MEMBER(insn,isa,cpu,gp32) \
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((((insn)->membership & INSN_ISA) != 0 \
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&& ((insn)->membership & INSN_ISA) <= isa) \
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&& ((insn)->membership & INSN_ISA) <= isa \
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&& ((insn)->membership & INSN_GP32 ? gp32 : 1)) \
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|| (cpu == 4650 \
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&& ((insn)->membership & INSN_4650) != 0) \
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|| (cpu == 4010 \
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