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* alpha-dis.c: Fix formatting.

Browse source 
* cris-dis.c: Likewise.
	* m10300-dis.c: Likewise.
	* tic54x-dis.c: Likewise.
This commit is contained in:
Kazu Hirata 2001-07-24 04:10:19 +00:00
parent a7019e234a
commit 33822a8e75
5 changed files with 121 additions and 116 deletions
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7
opcodes/ChangeLog
View file

@ -1,3 +1,10 @@
2001-07-24 Kazu Hirata <kazu@hxi.com>
* alpha-dis.c: Fix formatting.
* cris-dis.c: Likewise.
* m10300-dis.c: Likewise.
* tic54x-dis.c: Likewise.
2001-07-23 Kazu Hirata <kazu@hxi.com> 2001-07-23 Kazu Hirata <kazu@hxi.com>
* m68k-dis.c: Fix formatting. * m68k-dis.c: Fix formatting.

34
opcodes/alpha-dis.c
View file

@ -1,5 +1,5 @@
/* alpha-dis.c -- Disassemble Alpha AXP instructions /* alpha-dis.c -- Disassemble Alpha AXP instructions
Copyright 1996, 1998, 1999, 2000 Free Software Foundation, Inc. Copyright 1996, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
Contributed by Richard Henderson <rth@tamu.edu>, Contributed by Richard Henderson <rth@tamu.edu>,
patterned after the PPC opcode handling written by Ian Lance Taylor. patterned after the PPC opcode handling written by Ian Lance Taylor.
@ -27,8 +27,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
/* OSF register names. */ /* OSF register names. */
static const char * const osf_regnames[64] = static const char * const osf_regnames[64] = {
{
"v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
"t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp", "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
"a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
@ -41,8 +40,7 @@ static const char * const osf_regnames[64] =
/* VMS register names. */ /* VMS register names. */
static const char * const vms_regnames[64] = static const char * const vms_regnames[64] = {
{
"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
"R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15",
"R16", "R17", "R18", "R19", "R20", "R21", "R22", "R23", "R16", "R17", "R18", "R19", "R20", "R21", "R22", "R23",
@ -74,11 +72,11 @@ print_insn_alpha (memaddr, info)
opcode_end = opcode + alpha_num_opcodes; opcode_end = opcode + alpha_num_opcodes;
for (op = 0; op < AXP_NOPS; ++op) for (op = 0; op < AXP_NOPS; ++op)
{ {
opcode_index[op] = opcode; opcode_index[op] = opcode;
while (opcode < opcode_end && op == AXP_OP (opcode->opcode)) while (opcode < opcode_end && op == AXP_OP (opcode->opcode))
++opcode; ++opcode;
} }
opcode_index[op] = opcode; opcode_index[op] = opcode;
} }
@ -107,8 +105,8 @@ print_insn_alpha (memaddr, info)
int status = (*info->read_memory_func) (memaddr, buffer, 4, info); int status = (*info->read_memory_func) (memaddr, buffer, 4, info);
if (status != 0) if (status != 0)
{ {
(*info->memory_error_func) (status, memaddr, info); (*info->memory_error_func) (status, memaddr, info);
return -1; return -1;
} }
insn = bfd_getl32 (buffer); insn = bfd_getl32 (buffer);
} }
@ -117,7 +115,7 @@ print_insn_alpha (memaddr, info)
op = AXP_OP (insn); op = AXP_OP (insn);
/* Find the first match in the opcode table. */ /* Find the first match in the opcode table. */
opcode_end = opcode_index[op+1]; opcode_end = opcode_index[op + 1];
for (opcode = opcode_index[op]; opcode < opcode_end; ++opcode) for (opcode = opcode_index[op]; opcode < opcode_end; ++opcode)
{ {
if ((insn & opcode->mask) != opcode->opcode) if ((insn & opcode->mask) != opcode->opcode)
@ -130,14 +128,14 @@ print_insn_alpha (memaddr, info)
have extraction functions, and, if they do, make sure the have extraction functions, and, if they do, make sure the
instruction is valid. */ instruction is valid. */
{ {
int invalid = 0; int invalid = 0;
for (opindex = opcode->operands; *opindex != 0; opindex++) for (opindex = opcode->operands; *opindex != 0; opindex++)
{ {
const struct alpha_operand *operand = alpha_operands + *opindex; const struct alpha_operand *operand = alpha_operands + *opindex;
if (operand->extract) if (operand->extract)
(*operand->extract) (insn, &invalid); (*operand->extract) (insn, &invalid);
} }
if (invalid) if (invalid)
continue; continue;
} }
@ -182,7 +180,7 @@ found:
} }
if (need_comma && if (need_comma &&
((operand->flags & (AXP_OPERAND_PARENS|AXP_OPERAND_COMMA)) ((operand->flags & (AXP_OPERAND_PARENS | AXP_OPERAND_COMMA))
!= AXP_OPERAND_PARENS)) != AXP_OPERAND_PARENS))
{ {
(*info->fprintf_func) (info->stream, ","); (*info->fprintf_func) (info->stream, ",");
@ -194,7 +192,7 @@ found:
if (operand->flags & AXP_OPERAND_IR) if (operand->flags & AXP_OPERAND_IR)
(*info->fprintf_func) (info->stream, "%s", regnames[value]); (*info->fprintf_func) (info->stream, "%s", regnames[value]);
else if (operand->flags & AXP_OPERAND_FPR) else if (operand->flags & AXP_OPERAND_FPR)
(*info->fprintf_func) (info->stream, "%s", regnames[value+32]); (*info->fprintf_func) (info->stream, "%s", regnames[value + 32]);
else if (operand->flags & AXP_OPERAND_RELATIVE) else if (operand->flags & AXP_OPERAND_RELATIVE)
(*info->print_address_func) (memaddr + 4 + value, info); (*info->print_address_func) (memaddr + 4 + value, info);
else if (operand->flags & AXP_OPERAND_SIGNED) else if (operand->flags & AXP_OPERAND_SIGNED)

6
opcodes/cris-dis.c
View file

@ -1,5 +1,5 @@
/* Disassembler code for CRIS. /* Disassembler code for CRIS.
Copyright 2000 Free Software Foundation, Inc. Copyright 2000, 2001 Free Software Foundation, Inc.
Contributed by Axis Communications AB, Lund, Sweden. Contributed by Axis Communications AB, Lund, Sweden.
Written by Hans-Peter Nilsson. Written by Hans-Peter Nilsson.
@ -124,7 +124,7 @@ number_of_bits (val)
{ {
int bits; int bits;
for (bits = 0; val != 0; val &= val-1) for (bits = 0; val != 0; val &= val - 1)
bits++; bits++;
return bits; return bits;
@ -372,7 +372,7 @@ cris_constraint (cs, insn, prefix_insn)
int prefix_ok = 0; int prefix_ok = 0;
const char *s; const char *s;
for (s = cs; *s; s++) for (s = cs; *s; s++)
switch (*s) switch (*s)
{ {
case '!': case '!':

34
opcodes/m10300-dis.c
View file

@ -1,5 +1,5 @@
/* Disassemble MN10300 instructions. /* Disassemble MN10300 instructions.
Copyright 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
@ -103,7 +103,7 @@ print_insn_mn10300 (memaddr, info)
if (status != 0) if (status != 0)
{ {
(*info->memory_error_func) (status, memaddr, info); (*info->memory_error_func) (status, memaddr, info);
return -1; return -1;
} }
insn = bfd_getb16 (buffer); insn = bfd_getb16 (buffer);
consume = 2; consume = 2;
@ -140,7 +140,7 @@ print_insn_mn10300 (memaddr, info)
(*info->memory_error_func) (status, memaddr, info); (*info->memory_error_func) (status, memaddr, info);
return -1; return -1;
} }
insn |= *(unsigned char *)buffer; insn |= *(unsigned char *) buffer;
consume = 3; consume = 3;
} }
@ -363,7 +363,7 @@ disassemble (memaddr, info, insn, size)
(*info->memory_error_func) (status, memaddr, info); (*info->memory_error_func) (status, memaddr, info);
return; return;
} }
extension = *(unsigned char *)buffer; extension = *(unsigned char *) buffer;
} }
else if (size == 6 && op->format == FMT_D8) else if (size == 6 && op->format == FMT_D8)
{ {
@ -374,7 +374,7 @@ disassemble (memaddr, info, insn, size)
(*info->memory_error_func) (status, memaddr, info); (*info->memory_error_func) (status, memaddr, info);
return; return;
} }
insn |= *(unsigned char *)buffer; insn |= *(unsigned char *) buffer;
status = (*info->read_memory_func) (memaddr + 3, buffer, 2, info); status = (*info->read_memory_func) (memaddr + 3, buffer, 2, info);
if (status != 0) if (status != 0)
@ -456,7 +456,7 @@ disassemble (memaddr, info, insn, size)
(*info->memory_error_func) (status, memaddr, info); (*info->memory_error_func) (status, memaddr, info);
return; return;
} }
extension |= *(unsigned char *)buffer; extension |= *(unsigned char *) buffer;
} }
match = 1; match = 1;
@ -484,8 +484,8 @@ disassemble (memaddr, info, insn, size)
temp = extension >> operand->shift; temp = extension >> operand->shift;
temp &= ((1 << (32 - operand->bits)) - 1); temp &= ((1 << (32 - operand->bits)) - 1);
value |= temp; value |= temp;
value = ((value ^ (((unsigned long)1) << 31)) value = ((value ^ (((unsigned long) 1) << 31))
- (((unsigned long)1) << 31)); - (((unsigned long) 1) << 31));
} }
else if ((operand->flags & MN10300_OPERAND_24BIT) != 0) else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
{ {
@ -512,8 +512,8 @@ disassemble (memaddr, info, insn, size)
if ((operand->flags & MN10300_OPERAND_SIGNED) != 0 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0
/* These are properly extended by the code above. */ /* These are properly extended by the code above. */
&& ((operand->flags & MN10300_OPERAND_24BIT) == 0)) && ((operand->flags & MN10300_OPERAND_24BIT) == 0))
value = ((value ^ (((unsigned long)1) << (operand->bits - 1))) value = ((value ^ (((unsigned long) 1) << (operand->bits - 1)))
- (((unsigned long)1) << (operand->bits - 1))); - (((unsigned long) 1) << (operand->bits - 1)));
if (!nocomma if (!nocomma
&& (!paren && (!paren
@ -526,14 +526,14 @@ disassemble (memaddr, info, insn, size)
{ {
value = ((insn >> (operand->shift + extra_shift)) value = ((insn >> (operand->shift + extra_shift))
& ((1 << operand->bits) - 1)); & ((1 << operand->bits) - 1));
(*info->fprintf_func) (info->stream, "d%d", (int)value); (*info->fprintf_func) (info->stream, "d%d", (int) value);
} }
else if ((operand->flags & MN10300_OPERAND_AREG) != 0) else if ((operand->flags & MN10300_OPERAND_AREG) != 0)
{ {
value = ((insn >> (operand->shift + extra_shift)) value = ((insn >> (operand->shift + extra_shift))
& ((1 << operand->bits) - 1)); & ((1 << operand->bits) - 1));
(*info->fprintf_func) (info->stream, "a%d", (int)value); (*info->fprintf_func) (info->stream, "a%d", (int) value);
} }
else if ((operand->flags & MN10300_OPERAND_SP) != 0) else if ((operand->flags & MN10300_OPERAND_SP) != 0)
@ -550,11 +550,11 @@ disassemble (memaddr, info, insn, size)
value = ((insn >> (operand->shift + extra_shift)) value = ((insn >> (operand->shift + extra_shift))
& ((1 << operand->bits) - 1)); & ((1 << operand->bits) - 1));
if (value < 8) if (value < 8)
(*info->fprintf_func) (info->stream, "r%d", (int)value); (*info->fprintf_func) (info->stream, "r%d", (int) value);
else if (value < 12) else if (value < 12)
(*info->fprintf_func) (info->stream, "a%d", (int)value - 8); (*info->fprintf_func) (info->stream, "a%d", (int) value - 8);
else else
(*info->fprintf_func) (info->stream, "d%d", (int)value - 12); (*info->fprintf_func) (info->stream, "d%d", (int) value - 12);
} }
else if ((operand->flags & MN10300_OPERAND_XRREG) != 0) else if ((operand->flags & MN10300_OPERAND_XRREG) != 0)
@ -564,7 +564,7 @@ disassemble (memaddr, info, insn, size)
if (value == 0) if (value == 0)
(*info->fprintf_func) (info->stream, "sp", value); (*info->fprintf_func) (info->stream, "sp", value);
else else
(*info->fprintf_func) (info->stream, "xr%d", (int)value); (*info->fprintf_func) (info->stream, "xr%d", (int) value);
} }
else if ((operand->flags & MN10300_OPERAND_USP) != 0) else if ((operand->flags & MN10300_OPERAND_USP) != 0)
@ -671,7 +671,7 @@ disassemble (memaddr, info, insn, size)
} }
else else
(*info->fprintf_func) (info->stream, "%ld", (long)value); (*info->fprintf_func) (info->stream, "%ld", (long) value);
} }
/* All done. */ /* All done. */
break; break;

136
opcodes/tic54x-dis.c
View file

@ -51,7 +51,7 @@ static int sprint_condition (disassemble_info *,char *,unsigned short);
static int sprint_cc2 (disassemble_info *,char *,unsigned short); static int sprint_cc2 (disassemble_info *,char *,unsigned short);
int int
print_insn_tic54x(memaddr, info) print_insn_tic54x (memaddr, info)
bfd_vma memaddr; bfd_vma memaddr;
disassemble_info *info; disassemble_info *info;
{ {
@ -63,11 +63,11 @@ print_insn_tic54x(memaddr, info)
status = (*info->read_memory_func) (memaddr, opbuf, 2, info); status = (*info->read_memory_func) (memaddr, opbuf, 2, info);
if (status != 0) if (status != 0)
{ {
(*info->memory_error_func)(status, memaddr, info); (*info->memory_error_func) (status, memaddr, info);
return -1; return -1;
} }
opcode = bfd_getl16(opbuf); opcode = bfd_getl16 (opbuf);
if (!get_instruction (info, memaddr, opcode, &insn)) if (!get_instruction (info, memaddr, opcode, &insn))
return -1; return -1;
@ -85,25 +85,25 @@ print_insn_tic54x(memaddr, info)
else else
{ {
if (!print_instruction (info, memaddr, opcode, if (!print_instruction (info, memaddr, opcode,
(char *)insn.tm->name, (char *) insn.tm->name,
insn.tm->operand_types, insn.tm->operand_types,
size, (insn.tm->flags & FL_EXT))) size, (insn.tm->flags & FL_EXT)))
return -1; return -1;
} }
return size*2; return size * 2;
} }
static int static int
has_lkaddr(opcode, tm) has_lkaddr (opcode, tm)
unsigned short opcode; unsigned short opcode;
template *tm; template *tm;
{ {
return IS_LKADDR(opcode) && return (IS_LKADDR (opcode)
(OPTYPE(tm->operand_types[0]) == OP_Smem || && (OPTYPE (tm->operand_types[0]) == OP_Smem
OPTYPE(tm->operand_types[1]) == OP_Smem || || OPTYPE (tm->operand_types[1]) == OP_Smem
OPTYPE(tm->operand_types[2]) == OP_Smem || || OPTYPE (tm->operand_types[2]) == OP_Smem
OPTYPE(tm->operand_types[1]) == OP_Sind); || OPTYPE (tm->operand_types[1]) == OP_Sind));
} }
/* always returns 1 (whether an insn template was found) since we provide an /* always returns 1 (whether an insn template was found) since we provide an
@ -119,7 +119,7 @@ get_instruction (info, addr, opcode, insn)
partemplate * ptm; partemplate * ptm;
insn->parallel = 0; insn->parallel = 0;
for (tm = (template *)tic54x_optab; tm->name; tm++) for (tm = (template *) tic54x_optab; tm->name; tm++)
{ {
if (tm->opcode == (opcode & tm->mask)) if (tm->opcode == (opcode & tm->mask))
{ {
@ -129,11 +129,11 @@ get_instruction (info, addr, opcode, insn)
/* if lk addressing is used, the second half of the opcode gets /* if lk addressing is used, the second half of the opcode gets
pushed one word later */ pushed one word later */
bfd_byte opbuf[2]; bfd_byte opbuf[2];
bfd_vma addr2 = addr + 1 + has_lkaddr(opcode, tm); bfd_vma addr2 = addr + 1 + has_lkaddr (opcode, tm);
int status = (*info->read_memory_func)(addr2, opbuf, 2, info); int status = (*info->read_memory_func) (addr2, opbuf, 2, info);
if (status == 0) if (status == 0)
{ {
unsigned short opcode2 = bfd_getl16(opbuf); unsigned short opcode2 = bfd_getl16 (opbuf);
if (tm->opcode2 == (opcode2 & tm->mask2)) if (tm->opcode2 == (opcode2 & tm->mask2))
{ {
insn->tm = tm; insn->tm = tm;
@ -148,7 +148,7 @@ get_instruction (info, addr, opcode, insn)
} }
} }
} }
for (ptm = (partemplate *)tic54x_paroptab; ptm->name; ptm++) for (ptm = (partemplate *) tic54x_paroptab; ptm->name; ptm++)
{ {
if (ptm->opcode == (opcode & ptm->mask)) if (ptm->opcode == (opcode & ptm->mask))
{ {
@ -158,7 +158,7 @@ get_instruction (info, addr, opcode, insn)
} }
} }
insn->tm = (template *)&tic54x_unknown_opcode; insn->tm = (template *) &tic54x_unknown_opcode;
return 1; return 1;
} }
@ -176,7 +176,7 @@ get_insn_size (opcode, insn)
} }
else else
{ {
size = insn->tm->words + has_lkaddr(opcode, insn->tm); size = insn->tm->words + has_lkaddr (opcode, insn->tm);
} }
return size; return size;
@ -206,52 +206,52 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
if (size > 1) if (size > 1)
{ {
int status = (*info->read_memory_func) (memaddr+1, buf, 2, info); int status = (*info->read_memory_func) (memaddr + 1, buf, 2, info);
if (status != 0) if (status != 0)
return 0; return 0;
lkaddr = opcode2 = bfd_getl16(buf); lkaddr = opcode2 = bfd_getl16 (buf);
if (size > 2) if (size > 2)
{ {
status = (*info->read_memory_func) (memaddr+2, buf, 2, info); status = (*info->read_memory_func) (memaddr + 2, buf, 2, info);
if (status != 0) if (status != 0)
return 0; return 0;
opcode2 = bfd_getl16(buf); opcode2 = bfd_getl16 (buf);
} }
} }
for (i=0;i < MAX_OPERANDS && OPTYPE(tm_operands[i]) != OP_None;i++) for (i = 0; i < MAX_OPERANDS && OPTYPE (tm_operands[i]) != OP_None; i++)
{ {
char *next_comma = ","; char *next_comma = ",";
int optional = (tm_operands[i] & OPT) != 0; int optional = (tm_operands[i] & OPT) != 0;
switch (OPTYPE(tm_operands[i])) switch (OPTYPE (tm_operands[i]))
{ {
case OP_Xmem: case OP_Xmem:
sprint_dual_address (info, operand[i], XMEM(opcode)); sprint_dual_address (info, operand[i], XMEM (opcode));
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_Ymem: case OP_Ymem:
sprint_dual_address (info, operand[i], YMEM(opcode)); sprint_dual_address (info, operand[i], YMEM (opcode));
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_Smem: case OP_Smem:
case OP_Sind: case OP_Sind:
case OP_Lmem: case OP_Lmem:
info->fprintf_func (info->stream, "%s", comma); info->fprintf_func (info->stream, "%s", comma);
if (INDIRECT(opcode)) if (INDIRECT (opcode))
{ {
if (MOD(opcode) >= 12) if (MOD (opcode) >= 12)
{ {
bfd_vma addr = lkaddr; bfd_vma addr = lkaddr;
int arf = ARF(opcode); int arf = ARF (opcode);
int mod = MOD(opcode); int mod = MOD (opcode);
if (mod == 15) if (mod == 15)
info->fprintf_func (info->stream, "*("); info->fprintf_func (info->stream, "*(");
else else
info->fprintf_func (info->stream, "*%sar%d(", info->fprintf_func (info->stream, "*%sar%d(",
(mod == 13 || mod == 14 ? "+" : ""), (mod == 13 || mod == 14 ? "+" : ""),
arf); arf);
(*(info->print_address_func))((bfd_vma)addr, info); (*(info->print_address_func)) ((bfd_vma) addr, info);
info->fprintf_func (info->stream, ")%s", info->fprintf_func (info->stream, ")%s",
mod == 14 ? "%" : ""); mod == 14 ? "%" : "");
} }
@ -271,49 +271,49 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
break; break;
case OP_dmad: case OP_dmad:
info->fprintf_func (info->stream, "%s", comma); info->fprintf_func (info->stream, "%s", comma);
(*(info->print_address_func))((bfd_vma)opcode2, info); (*(info->print_address_func)) ((bfd_vma) opcode2, info);
break; break;
case OP_xpmad: case OP_xpmad:
/* upper 7 bits of address are in the opcode */ /* upper 7 bits of address are in the opcode */
opcode2 += ((unsigned long)opcode & 0x7F) << 16; opcode2 += ((unsigned long) opcode & 0x7F) << 16;
/* fall through */ /* fall through */
case OP_pmad: case OP_pmad:
info->fprintf_func (info->stream, "%s", comma); info->fprintf_func (info->stream, "%s", comma);
(*(info->print_address_func))((bfd_vma)opcode2, info); (*(info->print_address_func)) ((bfd_vma) opcode2, info);
break; break;
case OP_MMRX: case OP_MMRX:
sprint_mmr (info, operand[i], MMRX(opcode)); sprint_mmr (info, operand[i], MMRX (opcode));
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_MMRY: case OP_MMRY:
sprint_mmr (info, operand[i], MMRY(opcode)); sprint_mmr (info, operand[i], MMRY (opcode));
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_MMR: case OP_MMR:
sprint_mmr (info, operand[i], MMR(opcode)); sprint_mmr (info, operand[i], MMR (opcode));
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_PA: case OP_PA:
sprintf (operand[i], "pa%d", (unsigned)opcode2); sprintf (operand[i], "pa%d", (unsigned) opcode2);
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_SRC: case OP_SRC:
src = SRC(ext ? opcode2 : opcode) ? OP_B : OP_A; src = SRC (ext ? opcode2 : opcode) ? OP_B : OP_A;
sprintf (operand[i], (src == OP_B) ? "b" : "a"); sprintf (operand[i], (src == OP_B) ? "b" : "a");
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_SRC1: case OP_SRC1:
src = SRC1(ext ? opcode2 : opcode) ? OP_B : OP_A; src = SRC1 (ext ? opcode2 : opcode) ? OP_B : OP_A;
sprintf (operand[i], (src == OP_B) ? "b" : "a"); sprintf (operand[i], (src == OP_B) ? "b" : "a");
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_RND: case OP_RND:
dst = DST(opcode) ? OP_B : OP_A; dst = DST (opcode) ? OP_B : OP_A;
sprintf (operand[i], (dst == OP_B) ? "a" : "b"); sprintf (operand[i], (dst == OP_B) ? "a" : "b");
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_DST: case OP_DST:
dst = DST(ext ? opcode2 : opcode) ? OP_B : OP_A; dst = DST (ext ? opcode2 : opcode) ? OP_B : OP_A;
if (!optional || dst != src) if (!optional || dst != src)
{ {
sprintf (operand[i], (dst == OP_B) ? "b" : "a"); sprintf (operand[i], (dst == OP_B) ? "b" : "a");
@ -331,31 +331,31 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_ARX: case OP_ARX:
sprintf (operand[i],"ar%d", (int)ARX(opcode)); sprintf (operand[i], "ar%d", (int) ARX (opcode));
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_SHIFT: case OP_SHIFT:
shift = SHIFT(ext ? opcode2 : opcode); shift = SHIFT (ext ? opcode2 : opcode);
if (!optional || shift != 0) if (!optional || shift != 0)
{ {
sprintf (operand[i],"%d", shift); sprintf (operand[i], "%d", shift);
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
} }
else else
next_comma = comma; next_comma = comma;
break; break;
case OP_SHFT: case OP_SHFT:
shift = SHFT(opcode); shift = SHFT (opcode);
if (!optional || shift != 0) if (!optional || shift != 0)
{ {
sprintf (operand[i],"%d", (unsigned)shift); sprintf (operand[i], "%d", (unsigned) shift);
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
} }
else else
next_comma = comma; next_comma = comma;
break; break;
case OP_lk: case OP_lk:
sprintf (operand[i],"#%d", (int)(short)opcode2); sprintf (operand[i], "#%d", (int) (short) opcode2);
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_T: case OP_T:
@ -367,7 +367,7 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_k8: case OP_k8:
sprintf (operand[i], "%d", (int)((signed char)(opcode & 0xFF))); sprintf (operand[i], "%d", (int) ((signed char) (opcode & 0xFF)));
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_16: case OP_16:
@ -379,7 +379,7 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_BITC: case OP_BITC:
sprintf (operand[i], "%d", (int)(opcode & 0xF)); sprintf (operand[i], "%d", (int) (opcode & 0xF));
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_CC: case OP_CC:
@ -395,32 +395,32 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
case OP_CC3: case OP_CC3:
{ {
const char *code[] = { "eq", "lt", "gt", "neq" }; const char *code[] = { "eq", "lt", "gt", "neq" };
sprintf (operand[i], code[CC3(opcode)]); sprintf (operand[i], code[CC3 (opcode)]);
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
} }
case OP_123: case OP_123:
{ {
int code = (opcode>>8) & 0x3; int code = (opcode >> 8) & 0x3;
sprintf (operand[i], "%d", (code == 0) ? 1 : (code == 2) ? 2 : 3); sprintf (operand[i], "%d", (code == 0) ? 1 : (code == 2) ? 2 : 3);
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
} }
case OP_k5: case OP_k5:
sprintf (operand[i], "#%d", sprintf (operand[i], "#%d",
(int)(((signed char)opcode & 0x1F) << 3)>>3); (int) (((signed char) opcode & 0x1F) << 3) >> 3);
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_k8u: case OP_k8u:
sprintf (operand[i], "#%d", (unsigned)(opcode & 0xFF)); sprintf (operand[i], "#%d", (unsigned) (opcode & 0xFF));
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_k3: case OP_k3:
sprintf (operand[i], "#%d", (int)(opcode & 0x7)); sprintf (operand[i], "#%d", (int) (opcode & 0x7));
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_lku: case OP_lku:
sprintf (operand[i], "#%d", (unsigned)opcode2); sprintf (operand[i], "#%d", (unsigned) opcode2);
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_N: case OP_N:
@ -440,12 +440,12 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
"intm", "hm", "xf", "cpl", "braf" "intm", "hm", "xf", "cpl", "braf"
}; };
sprintf (operand[i], "%s", sprintf (operand[i], "%s",
n ? status1[SBIT(opcode)] : status0[SBIT(opcode)]); n ? status1[SBIT (opcode)] : status0[SBIT (opcode)]);
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
} }
case OP_12: case OP_12:
sprintf (operand[i], "%d", (int)((opcode >> 9)&1) + 1); sprintf (operand[i], "%d", (int) ((opcode >> 9) & 1) + 1);
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_TRN: case OP_TRN:
@ -458,7 +458,7 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
break; break;
case OP_k9: case OP_k9:
/* FIXME-- this is DP, print the original address? */ /* FIXME-- this is DP, print the original address? */
sprintf (operand[i], "#%d", (int)(opcode & 0x1FF)); sprintf (operand[i], "#%d", (int) (opcode & 0x1FF));
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_ARP: case OP_ARP:
@ -466,7 +466,7 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
case OP_031: case OP_031:
sprintf (operand[i], "%d", (int)(opcode & 0x1F)); sprintf (operand[i], "%d", (int) (opcode & 0x1F));
info->fprintf_func (info->stream, "%s%s", comma, operand[i]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
break; break;
default: default:
@ -506,7 +506,7 @@ sprint_dual_address (info, buf, code)
"*ar%d+", "*ar%d+",
"*ar%d+0%%", "*ar%d+0%%",
}; };
return sprintf (buf, formats[XMOD(code)], XARX(code)); return sprintf (buf, formats[XMOD (code)], XARX (code));
} }
static int static int
@ -529,7 +529,7 @@ sprint_indirect_address (info, buf, opcode)
"*ar%d+%%", "*ar%d+%%",
"*ar%d+0%%", "*ar%d+0%%",
}; };
return sprintf (buf, formats[MOD(opcode)], ARF(opcode)); return sprintf (buf, formats[MOD (opcode)], ARF (opcode));
} }
static int static int
@ -539,7 +539,7 @@ sprint_direct_address (info, buf, opcode)
unsigned short opcode; unsigned short opcode;
{ {
/* FIXME -- look up relocation if available */ /* FIXME -- look up relocation if available */
return sprintf (buf, "0x??%02x", (int)(opcode & 0x7F)); return sprintf (buf, "0x??%02x", (int) (opcode & 0x7F));
} }
static int static int
@ -548,12 +548,12 @@ sprint_mmr (info, buf, mmr)
char buf[]; char buf[];
int mmr; int mmr;
{ {
symbol *reg = (symbol *)mmregs; symbol *reg = (symbol *) mmregs;
while (reg->name != NULL) while (reg->name != NULL)
{ {
if (mmr == reg->value) if (mmr == reg->value)
{ {
sprintf (buf, "%s", (reg+1)->name); sprintf (buf, "%s", (reg + 1)->name);
return 1; return 1;
} }
++reg; ++reg;
@ -589,10 +589,10 @@ sprint_condition (info, buf, opcode)
{ {
char acc = (opcode & 0x8) ? 'b' : 'a'; char acc = (opcode & 0x8) ? 'b' : 'a';
if (opcode & 0x7) if (opcode & 0x7)
buf += sprintf (buf, "%c%s%s", acc, cmp[(opcode&0x7)], buf += sprintf (buf, "%c%s%s", acc, cmp[(opcode & 0x7)],
(opcode&0x20) ? ", " : ""); (opcode & 0x20) ? ", " : "");
if (opcode & 0x20) if (opcode & 0x20)
buf += sprintf (buf, "%c%s", acc, (opcode&0x10) ? "ov" : "nov"); buf += sprintf (buf, "%c%s", acc, (opcode & 0x10) ? "ov" : "nov");
} }
else if (opcode & 0x3F) else if (opcode & 0x3F)
{ {