* alpha-dis.c: Fix formatting.
* cris-dis.c: Likewise. * m10300-dis.c: Likewise. * tic54x-dis.c: Likewise.
This commit is contained in:
Kazu Hirata
parent
a7019e234a
commit
33822a8e75
5 changed files with 121 additions and 116 deletions
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@ -1,3 +1,10 @@
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2001-07-24 Kazu Hirata <kazu@hxi.com>
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* alpha-dis.c: Fix formatting.
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* cris-dis.c: Likewise.
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* m10300-dis.c: Likewise.
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* tic54x-dis.c: Likewise.
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2001-07-23 Kazu Hirata <kazu@hxi.com>
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* m68k-dis.c: Fix formatting.
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@ -1,5 +1,5 @@
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/* alpha-dis.c -- Disassemble Alpha AXP instructions
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Copyright 1996, 1998, 1999, 2000 Free Software Foundation, Inc.
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Copyright 1996, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
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Contributed by Richard Henderson <rth@tamu.edu>,
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patterned after the PPC opcode handling written by Ian Lance Taylor.
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@ -27,8 +27,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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/* OSF register names. */
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static const char * const osf_regnames[64] =
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{
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static const char * const osf_regnames[64] = {
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"v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
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"t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
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"a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
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@ -41,8 +40,7 @@ static const char * const osf_regnames[64] =
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/* VMS register names. */
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static const char * const vms_regnames[64] =
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{
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static const char * const vms_regnames[64] = {
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"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
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"R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15",
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"R16", "R17", "R18", "R19", "R20", "R21", "R22", "R23",
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@ -74,11 +72,11 @@ print_insn_alpha (memaddr, info)
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opcode_end = opcode + alpha_num_opcodes;
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for (op = 0; op < AXP_NOPS; ++op)
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{
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opcode_index[op] = opcode;
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while (opcode < opcode_end && op == AXP_OP (opcode->opcode))
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{
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opcode_index[op] = opcode;
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while (opcode < opcode_end && op == AXP_OP (opcode->opcode))
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++opcode;
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}
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}
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opcode_index[op] = opcode;
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}
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@ -107,8 +105,8 @@ print_insn_alpha (memaddr, info)
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int status = (*info->read_memory_func) (memaddr, buffer, 4, info);
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if (status != 0)
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{
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(*info->memory_error_func) (status, memaddr, info);
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return -1;
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(*info->memory_error_func) (status, memaddr, info);
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return -1;
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}
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insn = bfd_getl32 (buffer);
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}
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@ -117,7 +115,7 @@ print_insn_alpha (memaddr, info)
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op = AXP_OP (insn);
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/* Find the first match in the opcode table. */
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opcode_end = opcode_index[op+1];
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opcode_end = opcode_index[op + 1];
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for (opcode = opcode_index[op]; opcode < opcode_end; ++opcode)
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{
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if ((insn & opcode->mask) != opcode->opcode)
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@ -130,14 +128,14 @@ print_insn_alpha (memaddr, info)
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have extraction functions, and, if they do, make sure the
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instruction is valid. */
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{
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int invalid = 0;
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for (opindex = opcode->operands; *opindex != 0; opindex++)
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int invalid = 0;
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for (opindex = opcode->operands; *opindex != 0; opindex++)
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{
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const struct alpha_operand *operand = alpha_operands + *opindex;
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const struct alpha_operand *operand = alpha_operands + *opindex;
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if (operand->extract)
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(*operand->extract) (insn, &invalid);
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}
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if (invalid)
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if (invalid)
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continue;
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}
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@ -147,7 +145,7 @@ print_insn_alpha (memaddr, info)
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/* No instruction found */
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(*info->fprintf_func) (info->stream, ".long %#08x", insn);
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return 4;
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found:
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@ -182,7 +180,7 @@ found:
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}
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if (need_comma &&
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((operand->flags & (AXP_OPERAND_PARENS|AXP_OPERAND_COMMA))
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((operand->flags & (AXP_OPERAND_PARENS | AXP_OPERAND_COMMA))
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!= AXP_OPERAND_PARENS))
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{
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(*info->fprintf_func) (info->stream, ",");
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@ -194,7 +192,7 @@ found:
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if (operand->flags & AXP_OPERAND_IR)
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(*info->fprintf_func) (info->stream, "%s", regnames[value]);
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else if (operand->flags & AXP_OPERAND_FPR)
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(*info->fprintf_func) (info->stream, "%s", regnames[value+32]);
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(*info->fprintf_func) (info->stream, "%s", regnames[value + 32]);
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else if (operand->flags & AXP_OPERAND_RELATIVE)
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(*info->print_address_func) (memaddr + 4 + value, info);
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else if (operand->flags & AXP_OPERAND_SIGNED)
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@ -1,5 +1,5 @@
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/* Disassembler code for CRIS.
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Copyright 2000 Free Software Foundation, Inc.
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Copyright 2000, 2001 Free Software Foundation, Inc.
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Contributed by Axis Communications AB, Lund, Sweden.
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Written by Hans-Peter Nilsson.
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@ -124,7 +124,7 @@ number_of_bits (val)
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{
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int bits;
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for (bits = 0; val != 0; val &= val-1)
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for (bits = 0; val != 0; val &= val - 1)
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bits++;
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return bits;
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@ -372,7 +372,7 @@ cris_constraint (cs, insn, prefix_insn)
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int prefix_ok = 0;
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const char *s;
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for (s = cs; *s; s++)
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for (s = cs; *s; s++)
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switch (*s)
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{
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case '!':
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@ -1,5 +1,5 @@
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/* Disassemble MN10300 instructions.
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Copyright 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
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Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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@ -19,7 +19,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include <stdio.h>
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#include "sysdep.h"
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#include "opcode/mn10300.h"
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#include "opcode/mn10300.h"
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#include "dis-asm.h"
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#include "opintl.h"
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@ -29,7 +29,7 @@ static void disassemble PARAMS ((bfd_vma, struct disassemble_info *,
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#define HAVE_AM33 (info->mach == AM33)
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#define HAVE_AM30 (info->mach == AM30)
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int
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int
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print_insn_mn10300 (memaddr, info)
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bfd_vma memaddr;
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struct disassemble_info *info;
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@ -103,7 +103,7 @@ print_insn_mn10300 (memaddr, info)
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if (status != 0)
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{
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(*info->memory_error_func) (status, memaddr, info);
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return -1;
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return -1;
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}
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insn = bfd_getb16 (buffer);
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consume = 2;
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@ -111,7 +111,7 @@ print_insn_mn10300 (memaddr, info)
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/* These are three byte insns. */
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else if ((insn & 0xff) == 0xf8
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|| (insn & 0xff) == 0xcc
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|| (insn & 0xff) == 0xcc
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|| (insn & 0xff) == 0xf9
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|| (insn & 0xf3) == 0x01
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|| (insn & 0xf3) == 0x02
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@ -140,7 +140,7 @@ print_insn_mn10300 (memaddr, info)
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(*info->memory_error_func) (status, memaddr, info);
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return -1;
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}
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insn |= *(unsigned char *)buffer;
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insn |= *(unsigned char *) buffer;
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consume = 3;
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}
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@ -249,7 +249,7 @@ disassemble (memaddr, info, insn, size)
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mysize = 7;
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else
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mysize = 7;
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if ((op->mask & insn) == op->opcode
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&& size == (unsigned int) mysize
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&& (op->machine == 0
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@ -259,7 +259,7 @@ disassemble (memaddr, info, insn, size)
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const unsigned char *opindex_ptr;
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unsigned int nocomma;
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int paren = 0;
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if (op->format == FMT_D1 || op->format == FMT_S1)
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extra_shift = 8;
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else if (op->format == FMT_D2 || op->format == FMT_D4
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@ -363,7 +363,7 @@ disassemble (memaddr, info, insn, size)
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(*info->memory_error_func) (status, memaddr, info);
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return;
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}
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extension = *(unsigned char *)buffer;
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extension = *(unsigned char *) buffer;
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}
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else if (size == 6 && op->format == FMT_D8)
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{
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@ -374,7 +374,7 @@ disassemble (memaddr, info, insn, size)
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(*info->memory_error_func) (status, memaddr, info);
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return;
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}
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insn |= *(unsigned char *)buffer;
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insn |= *(unsigned char *) buffer;
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status = (*info->read_memory_func) (memaddr + 3, buffer, 2, info);
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if (status != 0)
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@ -426,7 +426,7 @@ disassemble (memaddr, info, insn, size)
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insn &= 0xff000000;
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insn |= (temp >> 8) & 0xffffff;
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extension = (temp & 0xff) << 16;
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status = (*info->read_memory_func) (memaddr + 5, buffer, 2, info);
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if (status != 0)
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{
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@ -449,14 +449,14 @@ disassemble (memaddr, info, insn, size)
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insn &= 0xffff0000;
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insn |= (temp >> 16) & 0xffff;
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extension = (temp & 0xffff) << 8;
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status = (*info->read_memory_func) (memaddr + 6, buffer, 1, info);
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if (status != 0)
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{
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(*info->memory_error_func) (status, memaddr, info);
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return;
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}
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extension |= *(unsigned char *)buffer;
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extension |= *(unsigned char *) buffer;
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}
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match = 1;
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@ -484,8 +484,8 @@ disassemble (memaddr, info, insn, size)
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temp = extension >> operand->shift;
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temp &= ((1 << (32 - operand->bits)) - 1);
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value |= temp;
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value = ((value ^ (((unsigned long)1) << 31))
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- (((unsigned long)1) << 31));
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value = ((value ^ (((unsigned long) 1) << 31))
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- (((unsigned long) 1) << 31));
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}
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else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
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{
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@ -512,8 +512,8 @@ disassemble (memaddr, info, insn, size)
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if ((operand->flags & MN10300_OPERAND_SIGNED) != 0
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/* These are properly extended by the code above. */
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&& ((operand->flags & MN10300_OPERAND_24BIT) == 0))
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value = ((value ^ (((unsigned long)1) << (operand->bits - 1)))
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- (((unsigned long)1) << (operand->bits - 1)));
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value = ((value ^ (((unsigned long) 1) << (operand->bits - 1)))
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- (((unsigned long) 1) << (operand->bits - 1)));
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if (!nocomma
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&& (!paren
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@ -521,19 +521,19 @@ disassemble (memaddr, info, insn, size)
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(*info->fprintf_func) (info->stream, ",");
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nocomma = 0;
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if ((operand->flags & MN10300_OPERAND_DREG) != 0)
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{
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value = ((insn >> (operand->shift + extra_shift))
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& ((1 << operand->bits) - 1));
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(*info->fprintf_func) (info->stream, "d%d", (int)value);
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(*info->fprintf_func) (info->stream, "d%d", (int) value);
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}
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else if ((operand->flags & MN10300_OPERAND_AREG) != 0)
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{
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value = ((insn >> (operand->shift + extra_shift))
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& ((1 << operand->bits) - 1));
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(*info->fprintf_func) (info->stream, "a%d", (int)value);
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(*info->fprintf_func) (info->stream, "a%d", (int) value);
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}
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else if ((operand->flags & MN10300_OPERAND_SP) != 0)
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@ -550,11 +550,11 @@ disassemble (memaddr, info, insn, size)
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value = ((insn >> (operand->shift + extra_shift))
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& ((1 << operand->bits) - 1));
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if (value < 8)
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(*info->fprintf_func) (info->stream, "r%d", (int)value);
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(*info->fprintf_func) (info->stream, "r%d", (int) value);
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else if (value < 12)
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(*info->fprintf_func) (info->stream, "a%d", (int)value - 8);
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(*info->fprintf_func) (info->stream, "a%d", (int) value - 8);
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else
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(*info->fprintf_func) (info->stream, "d%d", (int)value - 12);
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(*info->fprintf_func) (info->stream, "d%d", (int) value - 12);
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}
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else if ((operand->flags & MN10300_OPERAND_XRREG) != 0)
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@ -564,7 +564,7 @@ disassemble (memaddr, info, insn, size)
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if (value == 0)
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(*info->fprintf_func) (info->stream, "sp", value);
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else
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(*info->fprintf_func) (info->stream, "xr%d", (int)value);
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(*info->fprintf_func) (info->stream, "xr%d", (int) value);
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}
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else if ((operand->flags & MN10300_OPERAND_USP) != 0)
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@ -670,8 +670,8 @@ disassemble (memaddr, info, insn, size)
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(*info->fprintf_func) (info->stream, "]");
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}
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else
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(*info->fprintf_func) (info->stream, "%ld", (long)value);
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else
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(*info->fprintf_func) (info->stream, "%ld", (long) value);
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}
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/* All done. */
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break;
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@ -51,7 +51,7 @@ static int sprint_condition (disassemble_info *,char *,unsigned short);
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static int sprint_cc2 (disassemble_info *,char *,unsigned short);
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int
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print_insn_tic54x(memaddr, info)
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print_insn_tic54x (memaddr, info)
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bfd_vma memaddr;
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disassemble_info *info;
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{
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@ -63,11 +63,11 @@ print_insn_tic54x(memaddr, info)
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status = (*info->read_memory_func) (memaddr, opbuf, 2, info);
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if (status != 0)
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{
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(*info->memory_error_func)(status, memaddr, info);
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(*info->memory_error_func) (status, memaddr, info);
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return -1;
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}
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opcode = bfd_getl16(opbuf);
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opcode = bfd_getl16 (opbuf);
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if (!get_instruction (info, memaddr, opcode, &insn))
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return -1;
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@ -85,25 +85,25 @@ print_insn_tic54x(memaddr, info)
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else
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{
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if (!print_instruction (info, memaddr, opcode,
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(char *)insn.tm->name,
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(char *) insn.tm->name,
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insn.tm->operand_types,
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size, (insn.tm->flags & FL_EXT)))
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return -1;
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}
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return size*2;
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return size * 2;
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}
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static int
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has_lkaddr(opcode, tm)
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has_lkaddr (opcode, tm)
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unsigned short opcode;
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template *tm;
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{
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return IS_LKADDR(opcode) &&
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(OPTYPE(tm->operand_types[0]) == OP_Smem ||
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OPTYPE(tm->operand_types[1]) == OP_Smem ||
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OPTYPE(tm->operand_types[2]) == OP_Smem ||
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OPTYPE(tm->operand_types[1]) == OP_Sind);
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return (IS_LKADDR (opcode)
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&& (OPTYPE (tm->operand_types[0]) == OP_Smem
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|| OPTYPE (tm->operand_types[1]) == OP_Smem
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|| OPTYPE (tm->operand_types[2]) == OP_Smem
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|| OPTYPE (tm->operand_types[1]) == OP_Sind));
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}
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/* always returns 1 (whether an insn template was found) since we provide an
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@ -119,7 +119,7 @@ get_instruction (info, addr, opcode, insn)
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partemplate * ptm;
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insn->parallel = 0;
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for (tm = (template *)tic54x_optab; tm->name; tm++)
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for (tm = (template *) tic54x_optab; tm->name; tm++)
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{
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if (tm->opcode == (opcode & tm->mask))
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{
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@ -129,11 +129,11 @@ get_instruction (info, addr, opcode, insn)
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/* if lk addressing is used, the second half of the opcode gets
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pushed one word later */
|
||||
bfd_byte opbuf[2];
|
||||
bfd_vma addr2 = addr + 1 + has_lkaddr(opcode, tm);
|
||||
int status = (*info->read_memory_func)(addr2, opbuf, 2, info);
|
||||
bfd_vma addr2 = addr + 1 + has_lkaddr (opcode, tm);
|
||||
int status = (*info->read_memory_func) (addr2, opbuf, 2, info);
|
||||
if (status == 0)
|
||||
{
|
||||
unsigned short opcode2 = bfd_getl16(opbuf);
|
||||
unsigned short opcode2 = bfd_getl16 (opbuf);
|
||||
if (tm->opcode2 == (opcode2 & tm->mask2))
|
||||
{
|
||||
insn->tm = tm;
|
||||
|
|
@ -148,7 +148,7 @@ get_instruction (info, addr, opcode, insn)
|
|||
}
|
||||
}
|
||||
}
|
||||
for (ptm = (partemplate *)tic54x_paroptab; ptm->name; ptm++)
|
||||
for (ptm = (partemplate *) tic54x_paroptab; ptm->name; ptm++)
|
||||
{
|
||||
if (ptm->opcode == (opcode & ptm->mask))
|
||||
{
|
||||
|
|
@ -158,7 +158,7 @@ get_instruction (info, addr, opcode, insn)
|
|||
}
|
||||
}
|
||||
|
||||
insn->tm = (template *)&tic54x_unknown_opcode;
|
||||
insn->tm = (template *) &tic54x_unknown_opcode;
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
|
@ -176,7 +176,7 @@ get_insn_size (opcode, insn)
|
|||
}
|
||||
else
|
||||
{
|
||||
size = insn->tm->words + has_lkaddr(opcode, insn->tm);
|
||||
size = insn->tm->words + has_lkaddr (opcode, insn->tm);
|
||||
}
|
||||
|
||||
return size;
|
||||
|
|
@ -206,52 +206,52 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
|
|||
|
||||
if (size > 1)
|
||||
{
|
||||
int status = (*info->read_memory_func) (memaddr+1, buf, 2, info);
|
||||
int status = (*info->read_memory_func) (memaddr + 1, buf, 2, info);
|
||||
if (status != 0)
|
||||
return 0;
|
||||
lkaddr = opcode2 = bfd_getl16(buf);
|
||||
lkaddr = opcode2 = bfd_getl16 (buf);
|
||||
if (size > 2)
|
||||
{
|
||||
status = (*info->read_memory_func) (memaddr+2, buf, 2, info);
|
||||
status = (*info->read_memory_func) (memaddr + 2, buf, 2, info);
|
||||
if (status != 0)
|
||||
return 0;
|
||||
opcode2 = bfd_getl16(buf);
|
||||
opcode2 = bfd_getl16 (buf);
|
||||
}
|
||||
}
|
||||
|
||||
for (i=0;i < MAX_OPERANDS && OPTYPE(tm_operands[i]) != OP_None;i++)
|
||||
for (i = 0; i < MAX_OPERANDS && OPTYPE (tm_operands[i]) != OP_None; i++)
|
||||
{
|
||||
char *next_comma = ",";
|
||||
int optional = (tm_operands[i] & OPT) != 0;
|
||||
|
||||
switch (OPTYPE(tm_operands[i]))
|
||||
switch (OPTYPE (tm_operands[i]))
|
||||
{
|
||||
case OP_Xmem:
|
||||
sprint_dual_address (info, operand[i], XMEM(opcode));
|
||||
sprint_dual_address (info, operand[i], XMEM (opcode));
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_Ymem:
|
||||
sprint_dual_address (info, operand[i], YMEM(opcode));
|
||||
sprint_dual_address (info, operand[i], YMEM (opcode));
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_Smem:
|
||||
case OP_Sind:
|
||||
case OP_Lmem:
|
||||
info->fprintf_func (info->stream, "%s", comma);
|
||||
if (INDIRECT(opcode))
|
||||
if (INDIRECT (opcode))
|
||||
{
|
||||
if (MOD(opcode) >= 12)
|
||||
if (MOD (opcode) >= 12)
|
||||
{
|
||||
bfd_vma addr = lkaddr;
|
||||
int arf = ARF(opcode);
|
||||
int mod = MOD(opcode);
|
||||
int arf = ARF (opcode);
|
||||
int mod = MOD (opcode);
|
||||
if (mod == 15)
|
||||
info->fprintf_func (info->stream, "*(");
|
||||
else
|
||||
info->fprintf_func (info->stream, "*%sar%d(",
|
||||
(mod == 13 || mod == 14 ? "+" : ""),
|
||||
arf);
|
||||
(*(info->print_address_func))((bfd_vma)addr, info);
|
||||
(*(info->print_address_func)) ((bfd_vma) addr, info);
|
||||
info->fprintf_func (info->stream, ")%s",
|
||||
mod == 14 ? "%" : "");
|
||||
}
|
||||
|
|
@ -271,49 +271,49 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
|
|||
break;
|
||||
case OP_dmad:
|
||||
info->fprintf_func (info->stream, "%s", comma);
|
||||
(*(info->print_address_func))((bfd_vma)opcode2, info);
|
||||
(*(info->print_address_func)) ((bfd_vma) opcode2, info);
|
||||
break;
|
||||
case OP_xpmad:
|
||||
/* upper 7 bits of address are in the opcode */
|
||||
opcode2 += ((unsigned long)opcode & 0x7F) << 16;
|
||||
opcode2 += ((unsigned long) opcode & 0x7F) << 16;
|
||||
/* fall through */
|
||||
case OP_pmad:
|
||||
info->fprintf_func (info->stream, "%s", comma);
|
||||
(*(info->print_address_func))((bfd_vma)opcode2, info);
|
||||
(*(info->print_address_func)) ((bfd_vma) opcode2, info);
|
||||
break;
|
||||
case OP_MMRX:
|
||||
sprint_mmr (info, operand[i], MMRX(opcode));
|
||||
sprint_mmr (info, operand[i], MMRX (opcode));
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_MMRY:
|
||||
sprint_mmr (info, operand[i], MMRY(opcode));
|
||||
sprint_mmr (info, operand[i], MMRY (opcode));
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_MMR:
|
||||
sprint_mmr (info, operand[i], MMR(opcode));
|
||||
sprint_mmr (info, operand[i], MMR (opcode));
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_PA:
|
||||
sprintf (operand[i], "pa%d", (unsigned)opcode2);
|
||||
sprintf (operand[i], "pa%d", (unsigned) opcode2);
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_SRC:
|
||||
src = SRC(ext ? opcode2 : opcode) ? OP_B : OP_A;
|
||||
src = SRC (ext ? opcode2 : opcode) ? OP_B : OP_A;
|
||||
sprintf (operand[i], (src == OP_B) ? "b" : "a");
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_SRC1:
|
||||
src = SRC1(ext ? opcode2 : opcode) ? OP_B : OP_A;
|
||||
src = SRC1 (ext ? opcode2 : opcode) ? OP_B : OP_A;
|
||||
sprintf (operand[i], (src == OP_B) ? "b" : "a");
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_RND:
|
||||
dst = DST(opcode) ? OP_B : OP_A;
|
||||
dst = DST (opcode) ? OP_B : OP_A;
|
||||
sprintf (operand[i], (dst == OP_B) ? "a" : "b");
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_DST:
|
||||
dst = DST(ext ? opcode2 : opcode) ? OP_B : OP_A;
|
||||
dst = DST (ext ? opcode2 : opcode) ? OP_B : OP_A;
|
||||
if (!optional || dst != src)
|
||||
{
|
||||
sprintf (operand[i], (dst == OP_B) ? "b" : "a");
|
||||
|
|
@ -331,31 +331,31 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
|
|||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_ARX:
|
||||
sprintf (operand[i],"ar%d", (int)ARX(opcode));
|
||||
sprintf (operand[i], "ar%d", (int) ARX (opcode));
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_SHIFT:
|
||||
shift = SHIFT(ext ? opcode2 : opcode);
|
||||
shift = SHIFT (ext ? opcode2 : opcode);
|
||||
if (!optional || shift != 0)
|
||||
{
|
||||
sprintf (operand[i],"%d", shift);
|
||||
sprintf (operand[i], "%d", shift);
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
}
|
||||
else
|
||||
next_comma = comma;
|
||||
break;
|
||||
case OP_SHFT:
|
||||
shift = SHFT(opcode);
|
||||
shift = SHFT (opcode);
|
||||
if (!optional || shift != 0)
|
||||
{
|
||||
sprintf (operand[i],"%d", (unsigned)shift);
|
||||
sprintf (operand[i], "%d", (unsigned) shift);
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
}
|
||||
else
|
||||
next_comma = comma;
|
||||
break;
|
||||
case OP_lk:
|
||||
sprintf (operand[i],"#%d", (int)(short)opcode2);
|
||||
sprintf (operand[i], "#%d", (int) (short) opcode2);
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_T:
|
||||
|
|
@ -367,7 +367,7 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
|
|||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_k8:
|
||||
sprintf (operand[i], "%d", (int)((signed char)(opcode & 0xFF)));
|
||||
sprintf (operand[i], "%d", (int) ((signed char) (opcode & 0xFF)));
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_16:
|
||||
|
|
@ -379,7 +379,7 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
|
|||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_BITC:
|
||||
sprintf (operand[i], "%d", (int)(opcode & 0xF));
|
||||
sprintf (operand[i], "%d", (int) (opcode & 0xF));
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_CC:
|
||||
|
|
@ -395,32 +395,32 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
|
|||
case OP_CC3:
|
||||
{
|
||||
const char *code[] = { "eq", "lt", "gt", "neq" };
|
||||
sprintf (operand[i], code[CC3(opcode)]);
|
||||
sprintf (operand[i], code[CC3 (opcode)]);
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
}
|
||||
case OP_123:
|
||||
{
|
||||
int code = (opcode>>8) & 0x3;
|
||||
int code = (opcode >> 8) & 0x3;
|
||||
sprintf (operand[i], "%d", (code == 0) ? 1 : (code == 2) ? 2 : 3);
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
}
|
||||
case OP_k5:
|
||||
sprintf (operand[i], "#%d",
|
||||
(int)(((signed char)opcode & 0x1F) << 3)>>3);
|
||||
(int) (((signed char) opcode & 0x1F) << 3) >> 3);
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_k8u:
|
||||
sprintf (operand[i], "#%d", (unsigned)(opcode & 0xFF));
|
||||
sprintf (operand[i], "#%d", (unsigned) (opcode & 0xFF));
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_k3:
|
||||
sprintf (operand[i], "#%d", (int)(opcode & 0x7));
|
||||
sprintf (operand[i], "#%d", (int) (opcode & 0x7));
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_lku:
|
||||
sprintf (operand[i], "#%d", (unsigned)opcode2);
|
||||
sprintf (operand[i], "#%d", (unsigned) opcode2);
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_N:
|
||||
|
|
@ -440,12 +440,12 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
|
|||
"intm", "hm", "xf", "cpl", "braf"
|
||||
};
|
||||
sprintf (operand[i], "%s",
|
||||
n ? status1[SBIT(opcode)] : status0[SBIT(opcode)]);
|
||||
n ? status1[SBIT (opcode)] : status0[SBIT (opcode)]);
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
}
|
||||
case OP_12:
|
||||
sprintf (operand[i], "%d", (int)((opcode >> 9)&1) + 1);
|
||||
sprintf (operand[i], "%d", (int) ((opcode >> 9) & 1) + 1);
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_TRN:
|
||||
|
|
@ -458,7 +458,7 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
|
|||
break;
|
||||
case OP_k9:
|
||||
/* FIXME-- this is DP, print the original address? */
|
||||
sprintf (operand[i], "#%d", (int)(opcode & 0x1FF));
|
||||
sprintf (operand[i], "#%d", (int) (opcode & 0x1FF));
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_ARP:
|
||||
|
|
@ -466,7 +466,7 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
|
|||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
case OP_031:
|
||||
sprintf (operand[i], "%d", (int)(opcode & 0x1F));
|
||||
sprintf (operand[i], "%d", (int) (opcode & 0x1F));
|
||||
info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
|
||||
break;
|
||||
default:
|
||||
|
|
@ -506,7 +506,7 @@ sprint_dual_address (info, buf, code)
|
|||
"*ar%d+",
|
||||
"*ar%d+0%%",
|
||||
};
|
||||
return sprintf (buf, formats[XMOD(code)], XARX(code));
|
||||
return sprintf (buf, formats[XMOD (code)], XARX (code));
|
||||
}
|
||||
|
||||
static int
|
||||
|
|
@ -529,7 +529,7 @@ sprint_indirect_address (info, buf, opcode)
|
|||
"*ar%d+%%",
|
||||
"*ar%d+0%%",
|
||||
};
|
||||
return sprintf (buf, formats[MOD(opcode)], ARF(opcode));
|
||||
return sprintf (buf, formats[MOD (opcode)], ARF (opcode));
|
||||
}
|
||||
|
||||
static int
|
||||
|
|
@ -539,7 +539,7 @@ sprint_direct_address (info, buf, opcode)
|
|||
unsigned short opcode;
|
||||
{
|
||||
/* FIXME -- look up relocation if available */
|
||||
return sprintf (buf, "0x??%02x", (int)(opcode & 0x7F));
|
||||
return sprintf (buf, "0x??%02x", (int) (opcode & 0x7F));
|
||||
}
|
||||
|
||||
static int
|
||||
|
|
@ -548,12 +548,12 @@ sprint_mmr (info, buf, mmr)
|
|||
char buf[];
|
||||
int mmr;
|
||||
{
|
||||
symbol *reg = (symbol *)mmregs;
|
||||
symbol *reg = (symbol *) mmregs;
|
||||
while (reg->name != NULL)
|
||||
{
|
||||
if (mmr == reg->value)
|
||||
{
|
||||
sprintf (buf, "%s", (reg+1)->name);
|
||||
sprintf (buf, "%s", (reg + 1)->name);
|
||||
return 1;
|
||||
}
|
||||
++reg;
|
||||
|
|
@ -589,10 +589,10 @@ sprint_condition (info, buf, opcode)
|
|||
{
|
||||
char acc = (opcode & 0x8) ? 'b' : 'a';
|
||||
if (opcode & 0x7)
|
||||
buf += sprintf (buf, "%c%s%s", acc, cmp[(opcode&0x7)],
|
||||
(opcode&0x20) ? ", " : "");
|
||||
buf += sprintf (buf, "%c%s%s", acc, cmp[(opcode & 0x7)],
|
||||
(opcode & 0x20) ? ", " : "");
|
||||
if (opcode & 0x20)
|
||||
buf += sprintf (buf, "%c%s", acc, (opcode&0x10) ? "ov" : "nov");
|
||||
buf += sprintf (buf, "%c%s", acc, (opcode & 0x10) ? "ov" : "nov");
|
||||
}
|
||||
else if (opcode & 0x3F)
|
||||
{
|
||||
|
|
|
|||
Loading…
Reference in a new issue