* sparc-pinsn.c: Remove kludge for preferring architectures.
Remove #ifdef's for SORT_NEEDED. We need to sort the table, now and forever. Add `add' instruction to the set that get checked for a preceding `sethi' in order to print an absolute address. Corresponding changes in ../include/opcode/sparc.h needed to eliminate garbage instructions.
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1 changed files with 14 additions and 22 deletions
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@ -26,8 +26,6 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "string.h"
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#include "string.h"
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#include "target.h"
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#include "target.h"
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#define SORT_NEEDED
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extern char *reg_names[];
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extern char *reg_names[];
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#define freg_names (®_names[4 * 8])
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#define freg_names (®_names[4 * 8])
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@ -91,12 +89,16 @@ is_delayed_branch (insn)
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return 0;
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return 0;
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}
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}
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#ifdef SORT_NEEDED
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static int opcodes_sorted = 0;
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static int opcodes_sorted = 0;
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extern void qsort ();
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extern void qsort ();
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#endif
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/* Print one instruction from MEMADDR on STREAM. */
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/* Print one instruction from MEMADDR on STREAM.
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We suffix the instruction with a comment that gives the absolute
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address involved, as well as its symbolic form, if the instruction
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is preceded by a findable `sethi' and it either adds an immediate
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displacement to that register, or it is an `add' or `or' instruction
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on that register. */
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int
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int
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print_insn (memaddr, stream)
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print_insn (memaddr, stream)
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CORE_ADDR memaddr;
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CORE_ADDR memaddr;
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@ -106,7 +108,6 @@ print_insn (memaddr, stream)
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register unsigned int i;
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register unsigned int i;
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#ifdef SORT_NEEDED
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if (!opcodes_sorted)
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if (!opcodes_sorted)
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{
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{
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static int compare_opcodes ();
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static int compare_opcodes ();
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@ -114,7 +115,6 @@ print_insn (memaddr, stream)
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sizeof (sparc_opcodes[0]), compare_opcodes);
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sizeof (sparc_opcodes[0]), compare_opcodes);
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opcodes_sorted = 1;
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opcodes_sorted = 1;
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}
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}
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#endif
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read_memory (memaddr, &insn, sizeof (insn));
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read_memory (memaddr, &insn, sizeof (insn));
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@ -132,9 +132,10 @@ print_insn (memaddr, stream)
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field of the opcode table. */
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field of the opcode table. */
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int found_plus = 0;
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int found_plus = 0;
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/* Do we have an 'or' instruction where rs1 is the same
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/* Do we have an `add' or `or' instruction where rs1 is the same
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as rsd, and which has the i bit set? */
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as rsd, and which has the i bit set? */
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if (opcode->match == 0x80102000
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if ((opcode->match == 0x80102000 || opcode->match == 0x80002000)
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/* (or) (add) */
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&& insn.rs1 == insn.rd)
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&& insn.rs1 == insn.rd)
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imm_added_to_rs1 = 1;
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imm_added_to_rs1 = 1;
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@ -370,7 +371,6 @@ print_insn (memaddr, stream)
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return sizeof (insn);
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return sizeof (insn);
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}
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}
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#ifdef SORT_NEEDED
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/* Compare opcodes A and B. */
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/* Compare opcodes A and B. */
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static int
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static int
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@ -438,19 +438,12 @@ compare_opcodes (a, b)
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better have the same opcode. This is a sanity check on the table. */
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better have the same opcode. This is a sanity check on the table. */
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i = strcmp (op0->name, op1->name);
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i = strcmp (op0->name, op1->name);
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if (i)
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if (i)
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{
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/* *** FIXME - There must be a better way to deal with this! */
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/* We prefer names used in the earliest architecture */
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if (op0->architecture != op1->architecture)
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return op0->architecture - op1->architecture;
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if (op0->flags & F_ALIAS) /* If they're both aliases, be arbitrary. */
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if (op0->flags & F_ALIAS) /* If they're both aliases, be arbitrary. */
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return i;
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return i;
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else
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else
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fprintf (stderr,
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fprintf (stderr,
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"Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n",
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"Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n",
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op0->name, op1->name);
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op0->name, op1->name);
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}
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/* Fewer arguments are preferred. */
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/* Fewer arguments are preferred. */
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{
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{
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@ -485,4 +478,3 @@ compare_opcodes (a, b)
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written, so just say there are equal. */
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written, so just say there are equal. */
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return 0;
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return 0;
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}
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}
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#endif
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