* d10v-dis.c: Fix formatting.

* d30v-dis.c: Likewise.
This commit is contained in:
Kazu Hirata 2001-07-25 01:42:14 +00:00
parent c1c905b7fb
commit 2dcee5388a
3 changed files with 180 additions and 172 deletions

View file

@ -7,6 +7,8 @@
* alpha-dis.c: Fix formatting.
* cris-dis.c: Likewise.
* d10v-dis.c: Likewise.
* d30v-dis.c: Likewise.
* m10300-dis.c: Likewise.
* tic54x-dis.c: Likewise.

View file

@ -1,5 +1,5 @@
/* Disassemble D10V instructions.
Copyright 1996, 1997, 1998, 2000 Free Software Foundation, Inc.
Copyright 1996, 1997, 1998, 2000, 2001 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@ -15,15 +15,14 @@ You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include <stdio.h>
#include "sysdep.h"
#include "opcode/d10v.h"
#include "dis-asm.h"
/* the PC wraps at 18 bits, except for the segment number */
/* so use this mask to keep the parts we want */
/* The PC wraps at 18 bits, except for the segment number,
so use this mask to keep the parts we want. */
#define PC_MASK 0x0303FFFF
static void dis_2_short PARAMS ((unsigned long insn, bfd_vma memaddr,
@ -49,20 +48,21 @@ print_insn_d10v (memaddr, info)
insn = bfd_getb32 (buffer);
status = insn & FM11;
switch (status) {
case 0:
dis_2_short (insn, memaddr, info, 2);
break;
case FM01:
dis_2_short (insn, memaddr, info, 0);
break;
case FM10:
dis_2_short (insn, memaddr, info, 1);
break;
case FM11:
dis_long (insn, memaddr, info);
break;
}
switch (status)
{
case 0:
dis_2_short (insn, memaddr, info, 2);
break;
case FM01:
dis_2_short (insn, memaddr, info, 0);
break;
case FM10:
dis_2_short (insn, memaddr, info, 1);
break;
case FM11:
dis_long (insn, memaddr, info);
break;
}
return 4;
}
@ -104,7 +104,7 @@ print_operand (oper, insn, op, memaddr, info)
shift = oper->shift;
/* the LONG_L format shifts registers over by 15 */
/* The LONG_L format shifts registers over by 15. */
if (op->format == LONG_L && (oper->flags & OPERAND_REG))
shift += 15;
@ -113,50 +113,52 @@ print_operand (oper, insn, op, memaddr, info)
if (oper->flags & OPERAND_REG)
{
int i;
int match=0;
int match = 0;
num += (oper->flags
& (OPERAND_GPR|OPERAND_FFLAG|OPERAND_CFLAG|OPERAND_CONTROL));
if (oper->flags & (OPERAND_ACC0|OPERAND_ACC1))
& (OPERAND_GPR | OPERAND_FFLAG | OPERAND_CFLAG | OPERAND_CONTROL));
if (oper->flags & (OPERAND_ACC0 | OPERAND_ACC1))
num += num ? OPERAND_ACC1 : OPERAND_ACC0;
for (i = 0; i < d10v_reg_name_cnt(); i++)
for (i = 0; i < d10v_reg_name_cnt (); i++)
{
if (num == d10v_predefined_registers[i].value)
{
if (d10v_predefined_registers[i].pname)
(*info->fprintf_func) (info->stream, "%s",d10v_predefined_registers[i].pname);
(*info->fprintf_func) (info->stream, "%s",
d10v_predefined_registers[i].pname);
else
(*info->fprintf_func) (info->stream, "%s",d10v_predefined_registers[i].name);
match=1;
(*info->fprintf_func) (info->stream, "%s",
d10v_predefined_registers[i].name);
match = 1;
break;
}
}
if (match == 0)
{
/* this would only get executed if a register was not in the
register table */
if (oper->flags & (OPERAND_ACC0|OPERAND_ACC1))
/* This would only get executed if a register was not in the
register table. */
if (oper->flags & (OPERAND_ACC0 | OPERAND_ACC1))
(*info->fprintf_func) (info->stream, "a");
else if (oper->flags & OPERAND_CONTROL)
(*info->fprintf_func) (info->stream, "cr");
else if(oper->flags & OPERAND_REG)
else if (oper->flags & OPERAND_REG)
(*info->fprintf_func) (info->stream, "r");
(*info->fprintf_func) (info->stream, "%d",num);
(*info->fprintf_func) (info->stream, "%d", num);
}
}
else
{
/* addresses are right-shifted by 2 */
/* Addresses are right-shifted by 2. */
if (oper->flags & OPERAND_ADDR)
{
long max;
int neg=0;
int neg = 0;
max = (1 << (oper->bits - 1));
if (num & max)
{
num = -num & ((1 << oper->bits)-1);
num = -num & ((1 << oper->bits) - 1);
neg = 1;
}
num = num<<2;
num = num << 2;
if (info->flags & INSN_HAS_RELOC)
(*info->print_address_func) (num & PC_MASK, info);
else
@ -174,16 +176,15 @@ print_operand (oper, insn, op, memaddr, info)
int max = (1 << (oper->bits - 1));
if (num & max)
{
num = -num & ((1 << oper->bits)-1);
num = -num & ((1 << oper->bits) - 1);
(*info->fprintf_func) (info->stream, "-");
}
}
(*info->fprintf_func) (info->stream, "0x%x",num);
(*info->fprintf_func) (info->stream, "0x%x", num);
}
}
}
static void
dis_long (insn, memaddr, info)
unsigned long insn;
@ -192,7 +193,7 @@ dis_long (insn, memaddr, info)
{
int i;
char buf[32];
struct d10v_opcode *op = (struct d10v_opcode *)d10v_opcodes;
struct d10v_opcode *op = (struct d10v_opcode *) d10v_opcodes;
struct d10v_operand *oper;
int need_paren = 0;
int match = 0;
@ -203,15 +204,15 @@ dis_long (insn, memaddr, info)
{
match = 1;
(*info->fprintf_func) (info->stream, "%s\t", op->name);
for ( i=0; op->operands[i]; i++)
for (i = 0; op->operands[i]; i++)
{
oper = (struct d10v_operand *)&d10v_operands[op->operands[i]];
oper = (struct d10v_operand *) &d10v_operands[op->operands[i]];
if (oper->flags == OPERAND_ATPAR)
need_paren = 1;
print_operand (oper, insn, op, memaddr, info);
if (op->operands[i+1] && oper->bits &&
d10v_operands[op->operands[i+1]].flags != OPERAND_PLUS &&
d10v_operands[op->operands[i+1]].flags != OPERAND_MINUS)
if (op->operands[i + 1] && oper->bits
&& d10v_operands[op->operands[i + 1]].flags != OPERAND_PLUS
&& d10v_operands[op->operands[i + 1]].flags != OPERAND_MINUS)
(*info->fprintf_func) (info->stream, ", ");
}
break;
@ -220,7 +221,7 @@ dis_long (insn, memaddr, info)
}
if (!match)
(*info->fprintf_func) (info->stream, ".long\t0x%08x",insn);
(*info->fprintf_func) (info->stream, ".long\t0x%08x", insn);
if (need_paren)
(*info->fprintf_func) (info->stream, ")");
@ -233,36 +234,37 @@ dis_2_short (insn, memaddr, info, order)
struct disassemble_info *info;
int order;
{
int i,j;
int i, j;
char astr[2][32];
unsigned int ins[2];
struct d10v_opcode *op;
char buf[32];
int match, num_match=0;
int match, num_match = 0;
struct d10v_operand *oper;
int need_paren = 0;
ins[0] = (insn & 0x3FFFFFFF) >> 15;
ins[1] = insn & 0x00007FFF;
for(j=0;j<2;j++)
for (j = 0; j < 2; j++)
{
op = (struct d10v_opcode *)d10v_opcodes;
match=0;
op = (struct d10v_opcode *) d10v_opcodes;
match = 0;
while (op->name)
{
if ((op->format & SHORT_OPCODE) && ((op->mask & ins[j]) == op->opcode))
if ((op->format & SHORT_OPCODE)
&& ((op->mask & ins[j]) == op->opcode))
{
(*info->fprintf_func) (info->stream, "%s\t",op->name);
for (i=0; op->operands[i]; i++)
(*info->fprintf_func) (info->stream, "%s\t", op->name);
for (i = 0; op->operands[i]; i++)
{
oper = (struct d10v_operand *)&d10v_operands[op->operands[i]];
oper = (struct d10v_operand *) &d10v_operands[op->operands[i]];
if (oper->flags == OPERAND_ATPAR)
need_paren = 1;
print_operand (oper, ins[j], op, memaddr, info);
if (op->operands[i+1] && oper->bits &&
d10v_operands[op->operands[i+1]].flags != OPERAND_PLUS &&
d10v_operands[op->operands[i+1]].flags != OPERAND_MINUS)
if (op->operands[i + 1] && oper->bits
&& d10v_operands[op->operands[i + 1]].flags != OPERAND_PLUS
&& d10v_operands[op->operands[i + 1]].flags != OPERAND_MINUS)
(*info->fprintf_func) (info->stream, ", ");
}
match = 1;
@ -294,7 +296,7 @@ dis_2_short (insn, memaddr, info, order)
}
if (num_match == 0)
(*info->fprintf_func) (info->stream, ".long\t0x%08x",insn);
(*info->fprintf_func) (info->stream, ".long\t0x%08x", insn);
if (need_paren)
(*info->fprintf_func) (info->stream, ")");

View file

@ -1,5 +1,5 @@
/* Disassemble D30V instructions.
Copyright 1997, 1998, 2000 Free Software Foundation, Inc.
Copyright 1997, 1998, 2000, 2001 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@ -23,10 +23,10 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#define PC_MASK 0xFFFFFFFF
static int lookup_opcode PARAMS (( struct d30v_insn *insn, long num, int is_long ));
static void print_insn PARAMS (( struct disassemble_info *info, bfd_vma memaddr, long long num,
struct d30v_insn *insn, int is_long, int show_ext ));
static int extract_value PARAMS (( long long num, struct d30v_operand *oper, int is_long ));
static int lookup_opcode PARAMS ((struct d30v_insn *insn, long num, int is_long));
static void print_insn PARAMS ((struct disassemble_info *info, bfd_vma memaddr, long long num,
struct d30v_insn *insn, int is_long, int show_ext));
static int extract_value PARAMS ((long long num, struct d30v_operand *oper, int is_long));
int
print_insn_d30v (memaddr, info)
@ -35,11 +35,11 @@ print_insn_d30v (memaddr, info)
{
int status, result;
bfd_byte buffer[12];
unsigned long in1,in2;
unsigned long in1, in2;
struct d30v_insn insn;
long long num;
insn.form = (struct d30v_format *)NULL;
insn.form = (struct d30v_format *) NULL;
info->bytes_per_line = 8;
info->bytes_per_chunk = 4;
@ -53,38 +53,38 @@ print_insn_d30v (memaddr, info)
}
in1 = bfd_getb32 (buffer);
status = (*info->read_memory_func) (memaddr+4, buffer, 4, info);
status = (*info->read_memory_func) (memaddr + 4, buffer, 4, info);
if (status != 0)
{
info->bytes_per_line = 8;
if (!(result = lookup_opcode(&insn, in1, 0)))
(*info->fprintf_func) (info->stream, ".long\t0x%x",in1);
if (!(result = lookup_opcode (&insn, in1, 0)))
(*info->fprintf_func) (info->stream, ".long\t0x%x", in1);
else
print_insn(info, memaddr, (long long) in1, &insn, 0, result);
print_insn (info, memaddr, (long long) in1, &insn, 0, result);
return 4;
}
in2 = bfd_getb32 (buffer);
if (in1 & in2 & FM01)
{
/* LONG instruction */
if (!(result = lookup_opcode(&insn, in1, 1)))
/* LONG instruction. */
if (!(result = lookup_opcode (&insn, in1, 1)))
{
(*info->fprintf_func) (info->stream, ".long\t0x%x,0x%x",in1,in2);
(*info->fprintf_func) (info->stream, ".long\t0x%x,0x%x", in1, in2);
return 8;
}
num = (long long)in1 << 32 | in2;
print_insn(info, memaddr, num, &insn, 1, result);
num = (long long) in1 << 32 | in2;
print_insn (info, memaddr, num, &insn, 1, result);
}
else
{
num = in1;
if (!(result = lookup_opcode(&insn, in1, 0)))
(*info->fprintf_func) (info->stream, ".long\t0x%x",in1);
if (!(result = lookup_opcode (&insn, in1, 0)))
(*info->fprintf_func) (info->stream, ".long\t0x%x", in1);
else
print_insn(info, memaddr, num, &insn, 0, result);
print_insn (info, memaddr, num, &insn, 0, result);
switch ( ((in1>>31)<<1) | (in2>>31) )
switch (((in1 >> 31) << 1) | (in2 >> 31))
{
case 0:
(*info->fprintf_func) (info->stream, "\t||\t");
@ -98,51 +98,52 @@ print_insn_d30v (memaddr, info)
break;
}
insn.form = (struct d30v_format *)NULL;
insn.form = (struct d30v_format *) NULL;
num = in2;
if (!(result = lookup_opcode(&insn, in2, 0)))
(*info->fprintf_func) (info->stream, ".long\t0x%x",in2);
if (!(result = lookup_opcode (&insn, in2, 0)))
(*info->fprintf_func) (info->stream, ".long\t0x%x", in2);
else
print_insn(info, memaddr, num, &insn, 0, result);
print_insn (info, memaddr, num, &insn, 0, result);
}
return 8;
}
/* Return 0 if lookup fails,
1 if found and only one form,
2 if found and there are short and long forms. */
/* returns 0 if lookup fails */
/* 1 if found and only one form */
/* 2 if found and there are short and long forms */
static int
lookup_opcode (insn, num, is_long)
struct d30v_insn *insn;
long num;
int is_long;
{
int i=0, index;
int i = 0, index;
struct d30v_format *f;
struct d30v_opcode *op = (struct d30v_opcode *)d30v_opcode_table;
struct d30v_opcode *op = (struct d30v_opcode *) d30v_opcode_table;
int op1 = (num >> 25) & 0x7;
int op2 = (num >> 20) & 0x1f;
int mod = (num >> 18) & 0x3;
/* find the opcode */
do {
if ((op->op1 == op1) && (op->op2 == op2))
break;
op++;
} while (op->name);
/* Find the opcode. */
do
{
if ((op->op1 == op1) && (op->op2 == op2))
break;
op++;
}
while (op->name);
if (!op || !op->name)
return 0;
while (op->op1 == op1 && op->op2 == op2)
{
/* scan through all the formats for the opcode */
/* Scan through all the formats for the opcode. */
index = op->format[i++];
do
{
f = (struct d30v_format *)&d30v_format_table[index];
f = (struct d30v_format *) &d30v_format_table[index];
while (f->form == index)
{
if ((!is_long || f->form >= LONG) && (f->modifier == mod))
@ -154,11 +155,12 @@ lookup_opcode (insn, num, is_long)
}
if (insn->form)
break;
} while ((index = op->format[i++]) != 0);
}
while ((index = op->format[i++]) != 0);
if (insn->form)
break;
op++;
i=0;
i = 0;
}
if (insn->form == NULL)
return 0;
@ -171,9 +173,8 @@ lookup_opcode (insn, num, is_long)
return 1;
}
static void
print_insn ( info, memaddr, num, insn, is_long, show_ext )
print_insn (info, memaddr, num, insn, is_long, show_ext)
struct disassemble_info *info;
bfd_vma memaddr;
long long num;
@ -181,21 +182,24 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
int is_long;
int show_ext;
{
int val, opnum, need_comma=0;
int val, opnum, need_comma = 0;
struct d30v_operand *oper;
int i, match, opind=0, need_paren=0, found_control=0;
int i, match, opind = 0, need_paren = 0, found_control = 0;
(*info->fprintf_func) (info->stream, "%s",insn->op->name);
(*info->fprintf_func) (info->stream, "%s", insn->op->name);
/* check for CMP or CMPU */
/* Check for CMP or CMPU. */
if (d30v_operand_table[insn->form->operands[0]].flags & OPERAND_NAME)
{
opind++;
val = extract_value(num,(struct d30v_operand *)&d30v_operand_table[insn->form->operands[0]],is_long);
(*info->fprintf_func) (info->stream, "%s",d30v_cc_names[val]);
val =
extract_value (num,
(struct d30v_operand *) &d30v_operand_table[insn->form->operands[0]],
is_long);
(*info->fprintf_func) (info->stream, "%s", d30v_cc_names[val]);
}
/* add in ".s" or ".l" */
/* Add in ".s" or ".l". */
if (show_ext == 2)
{
if (is_long)
@ -205,21 +209,23 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
}
if (insn->ecc)
(*info->fprintf_func) (info->stream, "/%s",d30v_ecc_names[insn->ecc]);
(*info->fprintf_func) (info->stream, "/%s", d30v_ecc_names[insn->ecc]);
(*info->fprintf_func) (info->stream, "\t");
while ((opnum = insn->form->operands[opind++]) != 0)
{
int bits;
oper = (struct d30v_operand *)&d30v_operand_table[opnum];
oper = (struct d30v_operand *) &d30v_operand_table[opnum];
bits = oper->bits;
if (oper->flags & OPERAND_SHIFT)
bits += 3;
if (need_comma && oper->flags != OPERAND_PLUS && oper->flags != OPERAND_MINUS)
if (need_comma
&& oper->flags != OPERAND_PLUS
&& oper->flags != OPERAND_MINUS)
{
need_comma=0;
need_comma = 0;
(*info->fprintf_func) (info->stream, ", ");
}
@ -253,7 +259,7 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
if (oper->flags == OPERAND_SPECIAL)
continue;
val = extract_value(num, oper, is_long);
val = extract_value (num, oper, is_long);
if (oper->flags & OPERAND_REG)
{
@ -261,10 +267,10 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
if (oper->flags & OPERAND_CONTROL)
{
struct d30v_operand *oper3 =
(struct d30v_operand *)&d30v_operand_table[insn->form->operands[2]];
int id = extract_value (num, oper3, is_long );
(struct d30v_operand *) &d30v_operand_table[insn->form->operands[2]];
int id = extract_value (num, oper3, is_long);
found_control = 1;
switch ( id )
switch (id)
{
case 0:
val |= OPERAND_CONTROL;
@ -277,31 +283,31 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
val |= OPERAND_FLAG;
break;
default:
fprintf(stderr,"illegal id (%d)\n",id);
fprintf (stderr, "illegal id (%d)\n", id);
}
}
else if (oper->flags & OPERAND_ACC)
val |= OPERAND_ACC;
else if (oper->flags & OPERAND_FLAG)
val |= OPERAND_FLAG;
for (i=0;i<reg_name_cnt();i++)
for (i = 0; i < reg_name_cnt (); i++)
{
if (val == pre_defined_registers[i].value)
{
if (pre_defined_registers[i].pname)
(*info->fprintf_func)
(info->stream, "%s",pre_defined_registers[i].pname);
(info->stream, "%s", pre_defined_registers[i].pname);
else
(*info->fprintf_func)
(info->stream, "%s",pre_defined_registers[i].name);
match=1;
(info->stream, "%s", pre_defined_registers[i].name);
match = 1;
break;
}
}
if (match==0)
if (match == 0)
{
/* this would only get executed if a register was not in the
register table */
/* This would only get executed if a register was not in
the register table. */
(*info->fprintf_func)
(info->stream, _("<unknown register %d>"), val & 0x3F);
}
@ -325,19 +331,19 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
if (bits == 32)
val = -val;
else
val = -val & ((1 << bits)-1);
val = -val & ((1 << bits) - 1);
neg = 1;
}
}
if (neg)
{
(*info->fprintf_func) (info->stream, "-%x\t(",val);
(*info->fprintf_func) (info->stream, "-%x\t(", val);
(*info->print_address_func) ((memaddr - val) & PC_MASK, info);
(*info->fprintf_func) (info->stream, ")");
}
else
{
(*info->fprintf_func) (info->stream, "%x\t(",val);
(*info->fprintf_func) (info->stream, "%x\t(", val);
(*info->print_address_func) ((memaddr + val) & PC_MASK, info);
(*info->fprintf_func) (info->stream, ")");
}
@ -359,9 +365,9 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
(*info->fprintf_func) (info->stream, "-");
}
}
(*info->fprintf_func) (info->stream, "0x%x",val);
(*info->fprintf_func) (info->stream, "0x%x", val);
}
/* if there is another operand, then write a comma and space */
/* If there is another operand, then write a comma and space. */
if (insn->form->operands[opind] && !(found_control && opind == 2))
need_comma = 1;
}
@ -369,8 +375,6 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
(*info->fprintf_func) (info->stream, ")");
}
static int
extract_value (num, oper, is_long)
long long num;
@ -385,7 +389,7 @@ extract_value (num, oper, is_long)
{
if (oper->bits == 32)
{
/* piece together 32-bit constant */
/* Piece together 32-bit constant. */
val = ((num & 0x3FFFF)
| ((num & 0xFF00000) >> 2)
| ((num & 0x3F00000000LL) >> 6));