* mips-tdep.c (mips_o32_push_dummy_call): Remove conditions
based on mips_abi_regsize() whose result is known in advance. (mips_o64_push_dummy_call): Likewise.
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2 changed files with 21 additions and 85 deletions
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@ -1,3 +1,9 @@
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2007-05-02 Maciej W. Rozycki <macro@mips.com>
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* mips-tdep.c (mips_o32_push_dummy_call): Remove conditions
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based on mips_abi_regsize() whose result is known in advance.
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(mips_o64_push_dummy_call): Likewise.
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2007-04-29 Ulrich Weigand <uweigand@de.ibm.com>
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* m68klinux-nat.c: Remove #ifndef USE_PROC_FS check.
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100
gdb/mips-tdep.c
100
gdb/mips-tdep.c
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@ -3069,8 +3069,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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int arglen = TYPE_LENGTH (arg_type);
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/* Align to double-word if necessary. */
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if (mips_abi_regsize (gdbarch) < 8
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&& mips_type_needs_double_align (arg_type))
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if (mips_type_needs_double_align (arg_type))
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len = align_up (len, mips_stack_argsize (gdbarch) * 2);
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/* Allocate space on the stack. */
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len += align_up (arglen, mips_stack_argsize (gdbarch));
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@ -3120,8 +3119,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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up before the check to see if there are any FP registers
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left. O32/O64 targets also pass the FP in the integer
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registers so also round up normal registers. */
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if (mips_abi_regsize (gdbarch) < 8
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&& fp_register_arg_p (typecode, arg_type))
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if (fp_register_arg_p (typecode, arg_type))
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{
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if ((float_argreg & 1))
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float_argreg++;
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@ -3187,7 +3185,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
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argreg, phex (regval, len));
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write_register (argreg, regval);
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argreg += (mips_abi_regsize (gdbarch) == 8) ? 1 : 2;
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argreg += 2;
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}
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/* Reserve space for the FP register. */
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stack_offset += align_up (len, mips_stack_argsize (gdbarch));
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@ -3206,8 +3204,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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&& (len % mips_abi_regsize (gdbarch) != 0));
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/* Structures should be aligned to eight bytes (even arg registers)
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on MIPS_ABI_O32, if their first member has double precision. */
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if (mips_abi_regsize (gdbarch) < 8
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&& mips_type_needs_double_align (arg_type))
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if (mips_type_needs_double_align (arg_type))
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{
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if ((argreg & 1))
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{
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@ -3303,8 +3300,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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identified as such and GDB gets tweaked
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accordingly. */
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if (mips_abi_regsize (gdbarch) < 8
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&& TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
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if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
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&& partial_len < mips_abi_regsize (gdbarch)
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&& (typecode == TYPE_CODE_STRUCT
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|| typecode == TYPE_CODE_UNION))
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@ -3529,10 +3525,6 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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struct type *arg_type = check_typedef (value_type (args[argnum]));
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int arglen = TYPE_LENGTH (arg_type);
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/* Align to double-word if necessary. */
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if (mips_abi_regsize (gdbarch) < 8
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&& mips_type_needs_double_align (arg_type))
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len = align_up (len, mips_stack_argsize (gdbarch) * 2);
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/* Allocate space on the stack. */
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len += align_up (arglen, mips_stack_argsize (gdbarch));
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}
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@ -3576,18 +3568,6 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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val = value_contents (arg);
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/* 32-bit ABIs always start floating point arguments in an
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even-numbered floating point register. Round the FP register
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up before the check to see if there are any FP registers
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left. O32/O64 targets also pass the FP in the integer
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registers so also round up normal registers. */
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if (mips_abi_regsize (gdbarch) < 8
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&& fp_register_arg_p (typecode, arg_type))
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{
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if ((float_argreg & 1))
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float_argreg++;
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}
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/* Floating point arguments passed in registers have to be
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treated specially. On 32-bit architectures, doubles
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are passed in register pairs; the even register gets
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@ -3601,55 +3581,16 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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if (fp_register_arg_p (typecode, arg_type)
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&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
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{
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if (mips_abi_regsize (gdbarch) < 8 && len == 8)
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{
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int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
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unsigned long regval;
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/* Write the low word of the double to the even register(s). */
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regval = extract_unsigned_integer (val + low_offset, 4);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
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float_argreg, phex (regval, 4));
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write_register (float_argreg++, regval);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
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argreg, phex (regval, 4));
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write_register (argreg++, regval);
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/* Write the high word of the double to the odd register(s). */
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regval = extract_unsigned_integer (val + 4 - low_offset, 4);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
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float_argreg, phex (regval, 4));
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write_register (float_argreg++, regval);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
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argreg, phex (regval, 4));
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write_register (argreg++, regval);
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}
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else
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{
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/* This is a floating point value that fits entirely
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in a single register. */
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/* On 32 bit ABI's the float_argreg is further adjusted
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above to ensure that it is even register aligned. */
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LONGEST regval = extract_unsigned_integer (val, len);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
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float_argreg, phex (regval, len));
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write_register (float_argreg++, regval);
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/* CAGNEY: 32 bit MIPS ABI's always reserve two FP
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registers for each argument. The below is (my
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guess) to ensure that the corresponding integer
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register has reserved the same space. */
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
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argreg, phex (regval, len));
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write_register (argreg, regval);
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argreg += (mips_abi_regsize (gdbarch) == 8) ? 1 : 2;
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}
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LONGEST regval = extract_unsigned_integer (val, len);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
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float_argreg, phex (regval, len));
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write_register (float_argreg++, regval);
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if (mips_debug)
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fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
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argreg, phex (regval, len));
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write_register (argreg, regval);
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argreg++;
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/* Reserve space for the FP register. */
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stack_offset += align_up (len, mips_stack_argsize (gdbarch));
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}
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both places. */
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int odd_sized_struct = ((len > mips_abi_regsize (gdbarch))
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&& (len % mips_abi_regsize (gdbarch) != 0));
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/* Structures should be aligned to eight bytes (even arg registers)
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on MIPS_ABI_O32, if their first member has double precision. */
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if (mips_abi_regsize (gdbarch) < 8
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&& mips_type_needs_double_align (arg_type))
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{
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if ((argreg & 1))
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{
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argreg++;
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stack_offset += mips_abi_regsize (gdbarch);
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}
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}
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while (len > 0)
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{
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/* Remember if the argument was written to the stack. */
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