* ppc-instructions: Fix aliasing bugs when calling

invalid_arithemetic_operation.
This commit is contained in:
Andreas Schwab 2010-02-05 15:47:02 +00:00
parent 6bbec50578
commit 2ad0ff16f7
2 changed files with 28 additions and 8 deletions

View file

@ -1,3 +1,8 @@
2010-02-05 Andreas Schwab <schwab@linux-m68k.org>
* ppc-instructions: Fix aliasing bugs when calling
invalid_arithemetic_operation.
2009-11-13 Nathan Froyd <froydnj@codesourcery.com>
* configure.ac: If build != host, create a separate build-config.h

View file

@ -3973,12 +3973,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
fpscr_vxsnan | fpscr_vximz,
0, /*single?*/
0) /*negate?*/) {
union { double d; unsigned64 u; } tmp;
invalid_arithemetic_operation(processor, cia,
(unsigned64*)&product, *frA, 0, *frC,
&tmp.u, *frA, 0, *frC,
0, /*instruction_is_frsp*/
0, /*instruction_is_convert_to_64bit*/
0, /*instruction_is_convert_to_32bit*/
0); /*single-precision*/
product = tmp.d;
}
else {
/*HACK!*/
@ -4018,12 +4020,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
fpscr_vxsnan | fpscr_vximz,
1, /*single?*/
0) /*negate?*/) {
union { double d; unsigned64 u; } tmp;
invalid_arithemetic_operation(processor, cia,
(unsigned64*)&product, *frA, 0, *frC,
&tmp.u, *frA, 0, *frC,
0, /*instruction_is_frsp*/
0, /*instruction_is_convert_to_64bit*/
0, /*instruction_is_convert_to_32bit*/
0); /*single-precision*/
product = tmp.d;
}
else {
/*HACK!*/
@ -4063,12 +4067,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
fpscr_vxsnan | fpscr_vximz,
0, /*single?*/
0) /*negate?*/) {
union { double d; unsigned64 u; } tmp;
invalid_arithemetic_operation(processor, cia,
(unsigned64*)&product, *frA, 0, *frC,
&tmp.u, *frA, 0, *frC,
0, /*instruction_is_frsp*/
0, /*instruction_is_convert_to_64bit*/
0, /*instruction_is_convert_to_32bit*/
0); /*single-precision*/
product = tmp.d;
}
else {
/*HACK!*/
@ -4108,12 +4114,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
fpscr_vxsnan | fpscr_vximz,
1, /*single?*/
0) /*negate?*/) {
union { double d; unsigned64 u; } tmp;
invalid_arithemetic_operation(processor, cia,
(unsigned64*)&product, *frA, 0, *frC,
&tmp.u, *frA, 0, *frC,
0, /*instruction_is_frsp*/
0, /*instruction_is_convert_to_64bit*/
0, /*instruction_is_convert_to_32bit*/
0); /*single-precision*/
product = tmp.d;
}
else {
/*HACK!*/
@ -4153,8 +4161,9 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
fpscr_vxsnan | fpscr_vximz,
0, /*single?*/
0) /*negate?*/) {
union { double d; unsigned64 u; } tmp;
invalid_arithemetic_operation(processor, cia,
(unsigned64*)&product, *frA, 0, *frC,
&tmp.u, *frA, 0, *frC,
0, /*instruction_is_frsp*/
0, /*instruction_is_convert_to_64bit*/
0, /*instruction_is_convert_to_32bit*/
@ -4198,12 +4207,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
fpscr_vxsnan | fpscr_vximz,
1, /*single?*/
0) /*negate?*/) {
union { double d; unsigned64 u; } tmp;
invalid_arithemetic_operation(processor, cia,
(unsigned64*)&product, *frA, 0, *frC,
&tmp.u, *frA, 0, *frC,
0, /*instruction_is_frsp*/
0, /*instruction_is_convert_to_64bit*/
0, /*instruction_is_convert_to_32bit*/
0); /*single-precision*/
product = tmp.d;
}
else {
/*HACK!*/
@ -4243,12 +4254,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
fpscr_vxsnan | fpscr_vximz,
0, /*single?*/
0) /*negate?*/) {
union { double d; unsigned64 u; } tmp;
invalid_arithemetic_operation(processor, cia,
(unsigned64*)&product, *frA, 0, *frC,
&tmp.u, *frA, 0, *frC,
0, /*instruction_is_frsp*/
0, /*instruction_is_convert_to_64bit*/
0, /*instruction_is_convert_to_32bit*/
0); /*single-precision*/
product = tmp.d;
}
else {
/*HACK!*/
@ -4288,12 +4301,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
fpscr_vxsnan | fpscr_vximz,
1, /*single?*/
0) /*negate?*/) {
union { double d; unsigned64 u; } tmp;
invalid_arithemetic_operation(processor, cia,
(unsigned64*)&product, *frA, 0, *frC,
&tmp.u, *frA, 0, *frC,
0, /*instruction_is_frsp*/
0, /*instruction_is_convert_to_64bit*/
0, /*instruction_is_convert_to_32bit*/
0); /*single-precision*/
product = tmp.d;
}
else {
/*HACK!*/