* gas/h8300/h8sx_disp2.[sd]: New test.
* gas/h8300/h8300.exp: Run it.
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@ -1,3 +1,8 @@
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2003-06-10 Richard Sandiford <rsandifo@redhat.com>
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* gas/h8300/h8sx_disp2.[sd]: New test.
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* gas/h8300/h8300.exp: Run it.
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2003-06-07 Richard Henderson <rth@redhat.com>
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* gas/cfi/cfi-common-1.d, gas/cfi/cfi-common-1.s: New.
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@ -2167,6 +2167,8 @@ if [istarget h8300*-*-*] then {
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do_h8300h_mov32bug
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run_dump_test h8sx_disp2
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# Now some random tests
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set svr4pic [expr [istarget *-*-elf*] || [istarget *-*-irix5*] ]
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set empic [expr [istarget *-*-ecoff*] || [istarget *-*-ultrix*] || [istarget *-*-irix\[1-4\]*] ]
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37
gas/testsuite/gas/h8300/h8sx_disp2.d
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37
gas/testsuite/gas/h8300/h8sx_disp2.d
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# objdump: -d
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.*: *file format elf32-h8300
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Disassembly of section \.text:
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0+00 <\.text>:
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* 0: 01 75 68 08 * 01 75 68 08 80 02 add.b #0x2,@\(0x1:2,r0\)
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* 4: 80 02 *
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* 6: 01 76 68 08 * 01 76 68 08 80 02 add.b #0x2,@\(0x2:2,r0\)
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* a: 80 02 *
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* c: 01 77 68 08 * 01 77 68 08 80 02 add.b #0x2,@\(0x3:2,r0\)
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*10: 80 02 *
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*12: 01 74 6e 08 * 01 74 6e 08 00 04 80 02 add.b #0x2,@\(0x4:16,r0\)
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*16: 00 04 80 02 *
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*1a: 01 5e c0 10 * 01 5e c0 10 00 01 00 02 add.w #0x2,@\(0x1:16,r0\)
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*1e: 00 01 00 02 *
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*22: 01 5e 10 10 * 01 5e 10 10 00 02 add.w #0x2,@\(0x2:2,r0\)
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*26: 00 02 *
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*28: 01 5e 20 10 * 01 5e 20 10 00 02 add.w #0x2,@\(0x4:2,r0\)
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*2c: 00 02 *
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*2e: 01 5e 30 10 * 01 5e 30 10 00 02 add.w #0x2,@\(0x6:2,r0\)
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*32: 00 02 *
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*34: 01 5e c0 10 * 01 5e c0 10 00 08 00 02 add.w #0x2,@\(0x8:16,r0\)
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*38: 00 08 00 02 *
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*3c: 01 0e c0 10 * 01 0e c0 10 00 01 00 02 add.l #0x2,@\(0x1:16,r0\)
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*40: 00 01 00 02 *
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*44: 01 0e c0 10 * 01 0e c0 10 00 02 00 02 add.l #0x2,@\(0x2:16,r0\)
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*48: 00 02 00 02 *
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*4c: 01 0e 10 10 * 01 0e 10 10 00 02 add.l #0x2,@\(0x4:2,r0\)
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*50: 00 02 *
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*52: 01 0e 20 10 * 01 0e 20 10 00 02 add.l #0x2,@\(0x8:2,r0\)
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*56: 00 02 *
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*58: 01 0e 30 10 * 01 0e 30 10 00 02 add.l #0x2,@\(0xc:2,r0\)
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*5c: 00 02 *
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*5e: 01 0e c0 10 * 01 0e c0 10 00 10 00 02 add.l #0x2,@\(0x10:16,r0\)
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*62: 00 10 00 02 *
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18
gas/testsuite/gas/h8300/h8sx_disp2.s
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18
gas/testsuite/gas/h8300/h8sx_disp2.s
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.h8300sx
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add.b #2,@(1,er0) ; L_2
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add.b #2,@(2,er0) ; L_2
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add.b #2,@(3,er0) ; L_2
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add.b #2,@(4,er0) ; L_16
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add.w #2,@(1,er0) ; L_16
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add.w #2,@(2,er0) ; L_2
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add.w #2,@(4,er0) ; L_2
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add.w #2,@(6,er0) ; L_2
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add.w #2,@(8,er0) ; L_16
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add.l #2,@(1,er0) ; L_16
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add.l #2,@(2,er0) ; L_16
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add.l #2,@(4,er0) ; L_2
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add.l #2,@(8,er0) ; L_2
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add.l #2,@(12,er0) ; L_2
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add.l #2,@(16,er0) ; L_16
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