include/opcode/
* mips.h: Document "+i". opcodes/ * mips-opc.c (mips_builtin_opcodes): Use "+i" rather than "a" for "jalx". * mips16-opc.c (mips16_opcodes): Likewise. * micromips-opc.c (micromips_opcodes): Likewise. * mips-dis.c (print_insn_args, print_mips16_insn_arg) (print_insn_mips16): Handle "+i". (print_insn_micromips): Likewise. Conditionally preserve the ISA bit for "a" but not for "+i". gas/ * config/tc-mips.c (validate_mips_insn, validate_micromips_insn): (mips_ip, mips16_ip): Handle "+i".
This commit is contained in:
Richard Sandiford
parent
e76ff5abe3
commit
27c5c572c9
9 changed files with 58 additions and 23 deletions
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@ -1,3 +1,8 @@
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2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
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* config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
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(mips_ip, mips16_ip): Handle "+i".
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2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
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* config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
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@ -10910,6 +10910,7 @@ validate_mips_insn (const struct mips_opcode *opc)
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case 'a': USE_BITS (OP_MASK_OFFSET_A, OP_SH_OFFSET_A); break;
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case 'b': USE_BITS (OP_MASK_OFFSET_B, OP_SH_OFFSET_B); break;
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case 'c': USE_BITS (OP_MASK_OFFSET_C, OP_SH_OFFSET_C); break;
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case 'i': USE_BITS (OP_MASK_TARGET, OP_SH_TARGET); break;
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case 'j': USE_BITS (OP_MASK_EVAOFFSET, OP_SH_EVAOFFSET); break;
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default:
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@ -11071,6 +11072,7 @@ validate_micromips_insn (const struct mips_opcode *opc)
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case 'F': USE_BITS (INSMSB); break;
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case 'G': USE_BITS (EXTMSBD); break;
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case 'H': USE_BITS (EXTMSBD); break;
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case 'i': USE_BITS (TARGET); break;
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case 'j': USE_BITS (EVAOFFSET); break;
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default:
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as_bad (_("Internal error: bad mips opcode "
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@ -12173,6 +12175,9 @@ mips_ip (char *str, struct mips_cl_insn *ip)
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INSERT_OPERAND (0, FZ, *ip, regno);
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continue;
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case 'i':
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goto jump;
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case 'j':
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{
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int shift = 8;
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@ -13031,6 +13036,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
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continue;
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case 'a': /* 26-bit address. */
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jump:
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*offset_reloc = BFD_RELOC_MIPS_JMP;
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my_getExpression (&offset_expr, s);
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s = expr_end;
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@ -14280,6 +14286,7 @@ mips16_ip (char *str, struct mips_cl_insn *ip)
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continue;
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case 'a': /* 26 bit address */
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case 'i':
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my_getExpression (&offset_expr, s);
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s = expr_end;
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*offset_reloc = BFD_RELOC_MIPS16_JMP;
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@ -1,3 +1,7 @@
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2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
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* mips.h: Document "+i".
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2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
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* mips.h: Remove "mi" documentation. Update "mh" documentation.
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@ -379,6 +379,7 @@ struct mips_opcode
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"<" 5 bit shift amount (OP_*_SHAMT)
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">" shift amount between 32 and 63, stored after subtracting 32 (OP_*_SHAMT)
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"a" 26 bit target address (OP_*_TARGET)
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"+i" likewise, but flips bit 0
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"b" 5 bit base register (OP_*_RS)
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"c" 10 bit breakpoint code (OP_*_CODE)
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"d" 5 bit destination register specifier (OP_*_RD)
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@ -539,7 +540,7 @@ struct mips_opcode
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following), for quick reference when adding more:
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"1234"
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"ABCEFGHIJPQSXZ"
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"abcjpstxz"
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"abcijpstxz"
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*/
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/* These are the bits which may be set in the pinfo field of an
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@ -1383,6 +1384,7 @@ extern int bfd_mips_num_opcodes;
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"Y" 5 bit MIPS register (MIPS16OP_*_REG32R)
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"6" 6 bit unsigned break code (MIPS16OP_*_IMM6)
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"a" 26 bit jump address
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"i" likewise, but flips bit 0
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"e" 11 bit extension value
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"l" register list for entry instruction
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"L" register list for exit instruction
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@ -1741,6 +1743,7 @@ extern const int bfd_mips16_num_opcodes;
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"|" 4-bit trap code (MICROMIPSOP_*_TRAP)
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"~" 12-bit signed offset (MICROMIPSOP_*_OFFSET12)
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"a" 26-bit target address (MICROMIPSOP_*_TARGET)
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"+i" likewise, but flips bit 0
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"b" 5-bit base register (MICROMIPSOP_*_RS)
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"c" 10-bit higher breakpoint code (MICROMIPSOP_*_CODE)
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"d" 5-bit destination register specifier (MICROMIPSOP_*_RD)
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@ -1846,10 +1849,10 @@ extern const int bfd_mips16_num_opcodes;
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Extension character sequences used so far ("+" followed by the
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following), for quick reference when adding more:
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"j"
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""
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""
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"ABCEFGHI"
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""
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"ij"
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Extension character sequences used so far ("m" followed by the
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following), for quick reference when adding more:
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@ -1,3 +1,14 @@
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2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
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* mips-opc.c (mips_builtin_opcodes): Use "+i" rather than "a" for
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"jalx".
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* mips16-opc.c (mips16_opcodes): Likewise.
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* micromips-opc.c (micromips_opcodes): Likewise.
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* mips-dis.c (print_insn_args, print_mips16_insn_arg)
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(print_insn_mips16): Handle "+i".
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(print_insn_micromips): Likewise. Conditionally preserve the
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ISA bit for "a" but not for "+i".
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2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
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* micromips-opc.c (WR_mhi): Rename to..
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@ -587,7 +587,7 @@ const struct mips_opcode micromips_opcodes[] =
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{"jals", "s", 0, (int) M_JALS_1, INSN_MACRO, 0, I1 },
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{"jals", "a", 0, (int) M_JALS_A, INSN_MACRO, 0, I1 },
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{"jals", "a", 0x74000000, 0xfc000000, UBD|WR_31, BD16, I1 },
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{"jalx", "a", 0xf0000000, 0xfc000000, UBD|WR_31, BD32, I1 },
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{"jalx", "+i", 0xf0000000, 0xfc000000, UBD|WR_31, BD32, I1 },
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{"la", "t,A(b)", 0, (int) M_LA_AB, INSN_MACRO, 0, I1 },
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{"lb", "t,o(b)", 0x1c000000, 0xfc000000, RD_b|WR_t, 0, I1 },
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{"lb", "t,A(b)", 0, (int) M_LB_AB, INSN_MACRO, 0, I1 },
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@ -1105,6 +1105,15 @@ print_insn_args (const char *d,
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infprintf (is, "%s", mips_fpr_names[GET_OP (l, FZ)]);
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break;
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case 'i': /* JALX destination */
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info->target = (((pc + 4) & ~(bfd_vma) 0x0fffffff)
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| (GET_OP (l, TARGET) << 2));
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/* For gdb disassembler, force odd address on jalx. */
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if (info->flavour == bfd_target_unknown_flavour)
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info->target |= 1;
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(*info->print_address_func) (info->target, info);
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break;
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case 'j': /* 9-bit signed offset in bit 7. */
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infprintf (is, "%d", GET_OP_S (l, EVAOFFSET));
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break;
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@ -1229,10 +1238,6 @@ print_insn_args (const char *d,
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case 'a':
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info->target = (((pc + 4) & ~(bfd_vma) 0x0fffffff)
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| (GET_OP (l, TARGET) << 2));
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/* For gdb disassembler, force odd address on jalx. */
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if (info->flavour == bfd_target_unknown_flavour
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&& strcmp (opp->name, "jalx") == 0)
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info->target |= 1;
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(*info->print_address_func) (info->target, info);
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break;
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@ -1874,13 +1879,12 @@ print_mips16_insn_arg (char type,
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break;
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case 'a':
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case 'i':
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{
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int jalx = l & 0x400;
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if (! use_extend)
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extend = 0;
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l = ((l & 0x1f) << 23) | ((l & 0x3e0) << 13) | (extend << 2);
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if (!jalx && info->flavour == bfd_target_unknown_flavour)
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if (type == 'a' && info->flavour == bfd_target_unknown_flavour)
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/* For gdb disassembler, maintain odd address. */
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l |= 1;
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}
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@ -2147,7 +2151,7 @@ print_insn_mips16 (bfd_vma memaddr, struct disassemble_info *info)
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{
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const char *s;
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if (strchr (op->args, 'a') != NULL)
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if (op->args[0] == 'a' || op->args[0] == 'i')
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{
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if (use_extend)
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{
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@ -2422,15 +2426,10 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
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break;
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case 'a':
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if (strcmp (op->name, "jalx") == 0)
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info->target = (((memaddr + 4) & ~(bfd_vma) 0x0fffffff)
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| (GET_OP (insn, TARGET) << 2));
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else
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info->target = (((memaddr + 4) & ~(bfd_vma) 0x07ffffff)
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| (GET_OP (insn, TARGET) << 1));
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/* For gdb disassembler, force odd address on jalx. */
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if (info->flavour == bfd_target_unknown_flavour
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&& strcmp (op->name, "jalx") == 0)
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info->target = (((memaddr + 4) & ~(bfd_vma) 0x07ffffff)
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| (GET_OP (insn, TARGET) << 1));
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/* For gdb disassembler, maintain odd address. */
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if (info->flavour == bfd_target_unknown_flavour)
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info->target |= 1;
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(*info->print_address_func) (info->target, info);
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break;
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@ -2658,6 +2657,12 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
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infprintf (is, "0x%x", msbd + 1);
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break;
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case 'i':
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info->target = (((memaddr + 4) & ~(bfd_vma) 0x0fffffff)
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| (GET_OP (insn, TARGET) << 2));
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(*info->print_address_func) (info->target, info);
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break;
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case 'j': /* 9-bit signed offset in bit 0. */
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delta = GET_OP_S (insn, EVAOFFSET);
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infprintf (is, "%d", delta);
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@ -852,7 +852,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
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assembler, but will never match user input (because the line above
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will match first). */
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{"jal", "a", 0x0c000000, 0xfc000000, UBD|WR_31, 0, I1 },
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{"jalx", "a", 0x74000000, 0xfc000000, UBD|WR_31, 0, I1 },
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{"jalx", "+i", 0x74000000, 0xfc000000, UBD|WR_31, 0, I1 },
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{"la", "t,A(b)", 0, (int) M_LA_AB, INSN_MACRO, 0, I1 },
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{"laa", "d,(b),t", 0x7000049f, 0xfc0007ff, LDD|SM|WR_d|RD_t|RD_b, 0, IOCT2 },
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{"laad", "d,(b),t", 0x700004df, 0xfc0007ff, LDD|SM|WR_d|RD_t|RD_b, 0, IOCT2 },
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@ -167,7 +167,7 @@ const struct mips_opcode mips16_opcodes[] =
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{"jal", "x", 0xe840, 0xf8ff, UBD|WR_31|RD_x, 0, I1 },
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{"jal", "R,x", 0xe840, 0xf8ff, UBD|WR_31|RD_x, 0, I1 },
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{"jal", "a", 0x1800, 0xfc00, UBD|WR_31, 0, I1 },
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{"jalx", "a", 0x1c00, 0xfc00, UBD|WR_31, 0, I1 },
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{"jalx", "i", 0x1c00, 0xfc00, UBD|WR_31, 0, I1 },
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{"jr", "x", 0xe800, 0xf8ff, UBD|RD_x, 0, I1 },
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{"jr", "R", 0xe820, 0xffff, UBD|RD_31, 0, I1 },
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{"j", "x", 0xe800, 0xf8ff, UBD|RD_x, 0, I1 },
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