darkkirb/old-cross-binutils
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

sim/erc32: Perform pseudo-init if binary linked to non-zero address.

Browse source 
Binaries produced by most erc32 tool-chains do not include
system initialization. sis will detect this and initialize
necessary registers for memory and timer control.
This commit is contained in:
Jiri Gaisler 2015-02-19 23:31:21 +01:00 committed by Mike Frysinger
parent df9bc4163b
commit 20a0ffe33a
4 changed files with 37 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

9
sim/erc32/ChangeLog
View file

@ -1,3 +1,12 @@
2015-02-21 Jiri Gaisler <jiri@gaisler.se>
* erc32.c (mec_read): Allow simulator memory size to be read
by application.
(boot_init): initialize memory and timers if start address is
not 0.
* func.c (exe_cmd): Call boot_init if start address not 0.
* interf.c (run_sim): Likewise.
2015-02-21 Jiri Gaisler <jiri@gaisler.se>
* exec.c (init_regs): erc32 has vendor ID 1 and version ID 1 in %psr.

24
sim/erc32/erc32.c
View file

@ -743,6 +743,14 @@ mec_read(addr, asi, data)
*data = read_uart(addr);
break;
case 0xF4: /* simulator RAM size in bytes */
*data = 4096*1024;
break;
case 0xF8: /* simulator ROM size in bytes */
*data = 1024*1024;
break;
default:
set_sfsr(MEC_ACC, addr, asi, 1);
return (1);
@ -1887,3 +1895,19 @@ sis_memory_read(addr, data, length)
memcpy(data, mem, length);
return (length);
}
extern struct pstate sregs;
void
boot_init (void)
{
mec_write(MEC_WCR, 0); /* zero waitstates */
mec_write(MEC_TRAPD, 0); /* turn off watch-dog */
mec_write(MEC_RTC_SCALER, sregs.freq - 1); /* generate 1 MHz RTC tick */
mec_write(MEC_MEMCFG, (3 << 18) | (4 << 10)); /* 1 MB ROM, 4 MB RAM */
sregs.wim = 2;
sregs.psr = 0x110010e0;
sregs.r[30] = RAM_END;
sregs.r[14] = sregs.r[30] - 96 * 4;
mec_mcr |= 1; /* power-down enabled */
}

2
sim/erc32/func.c
View file

@ -468,6 +468,8 @@ exec_cmd(sregs, cmd)
}
sregs->pc = len & ~3;
sregs->npc = sregs->pc + 4;
if ((sregs->pc != 0) && (ebase.simtime == 0))
boot_init();
printf("resuming at 0x%08x\n",sregs->pc);
if ((cmd2 = strtok(NULL, " \t\n\r")) != NULL) {
stat = run_sim(sregs, VAL(cmd2), 0);

2
sim/erc32/interf.c
View file

@ -78,6 +78,8 @@ run_sim(sregs, icount, dis)
init_stdio();
sregs->starttime = time(NULL);
irq = 0;
if ((sregs->pc != 0) && (ebase.simtime == 0))
boot_init();
while (!sregs->err_mode & (icount > 0)) {
sregs->fhold = 0;