2003-06-22 Andrew Cagney <cagney@redhat.com>
From matthew green <mrg@redhat.com>: * sim-fpu.h: Update copyright. (sim_fpu_fraction, sim_fpu_guard): New prototypes. * sim-fpu.c: Update copyright. (sim_fpu_fraction, sim_fpu_guard): New inline functions.
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3 changed files with 32 additions and 30 deletions
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@ -1,3 +1,11 @@
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2003-06-22 Andrew Cagney <cagney@redhat.com>
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From matthew green <mrg@redhat.com>:
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* sim-fpu.h: Update copyright.
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(sim_fpu_fraction, sim_fpu_guard): New prototypes.
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* sim-fpu.c: Update copyright.
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(sim_fpu_fraction, sim_fpu_guard): New inline functions.
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2003-06-17 Frank Ch. Eigler <fche@redhat.com>
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2003-06-17 Frank Ch. Eigler <fche@redhat.com>
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From Doug Evans <dje@sebabeach.org>:
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From Doug Evans <dje@sebabeach.org>:
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@ -2,7 +2,7 @@
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of the floating point routines in libgcc1.c for targets without
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of the floating point routines in libgcc1.c for targets without
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hardware floating point. */
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hardware floating point. */
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/* Copyright (C) 1994,1997-1998 Free Software Foundation, Inc.
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/* Copyright 1994, 1997, 1998, 2003 Free Software Foundation, Inc.
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This file is free software; you can redistribute it and/or modify it
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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under the terms of the GNU General Public License as published by the
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@ -1754,33 +1754,7 @@ INLINE_SIM_FPU (int)
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sim_fpu_inv (sim_fpu *f,
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sim_fpu_inv (sim_fpu *f,
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const sim_fpu *r)
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const sim_fpu *r)
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{
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{
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if (sim_fpu_is_snan (r))
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return sim_fpu_div (f, &sim_fpu_one, r);
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{
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*f = *r;
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f->class = sim_fpu_class_qnan;
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return sim_fpu_status_invalid_snan;
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}
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if (sim_fpu_is_qnan (r))
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{
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*f = *r;
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f->class = sim_fpu_class_qnan;
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return 0;
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}
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if (sim_fpu_is_infinity (r))
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{
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*f = sim_fpu_zero;
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f->sign = r->sign;
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return 0;
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}
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if (sim_fpu_is_zero (r))
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{
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f->class = sim_fpu_class_infinity;
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f->sign = r->sign;
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return sim_fpu_status_invalid_div0;
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}
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*f = *r;
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f->normal_exp = - r->normal_exp;
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return 0;
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}
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}
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@ -2214,6 +2188,22 @@ sim_fpu_exp (const sim_fpu *d)
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}
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}
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INLINE_SIM_FPU (unsigned64)
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sim_fpu_fraction (const sim_fpu *d)
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{
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return d->fraction;
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}
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INLINE_SIM_FPU (unsigned64)
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sim_fpu_guard (const sim_fpu *d, int is_double)
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{
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unsigned64 rv;
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unsigned64 guardmask = LSMASK64 (NR_GUARDS - 1, 0);
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rv = (d->fraction & guardmask) >> NR_PAD;
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return rv;
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}
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INLINE_SIM_FPU (int)
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INLINE_SIM_FPU (int)
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sim_fpu_is (const sim_fpu *d)
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sim_fpu_is (const sim_fpu *d)
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@ -1,5 +1,7 @@
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/* Simulator Floating-point support.
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/* Simulator Floating-point support.
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Copyright (C) 1997, 1998, 2002 Free Software Foundation, Inc.
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Copyright 1997, 1998, 2002, 2003 Free Software Foundation, Inc.
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Contributed by Cygnus Support.
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Contributed by Cygnus Support.
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This file is part of GDB, the GNU debugger.
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This file is part of GDB, the GNU debugger.
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@ -42,7 +44,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
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For unpacked structures (passed by value and reference), the code
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For unpacked structures (passed by value and reference), the code
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quality of GCC-2.7 (on x86) for each alternative was compared.
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quality of GCC-2.7 (on x86) for each alternative was compared.
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Needless to say the results, while better then for a packed 64 bit
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Needless to say the results, while better than for a packed 64 bit
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object, were still poor (GCC had only limited support for the
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object, were still poor (GCC had only limited support for the
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optimization of references to structure members). Regardless, the
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optimization of references to structure members). Regardless, the
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struct-by-ref alternative achieved better results when compiled
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struct-by-ref alternative achieved better results when compiled
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@ -316,6 +318,8 @@ INLINE_SIM_FPU (int) sim_fpu_is_denorm (const sim_fpu *s); /* !zero */
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INLINE_SIM_FPU (int) sim_fpu_sign (const sim_fpu *s);
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INLINE_SIM_FPU (int) sim_fpu_sign (const sim_fpu *s);
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INLINE_SIM_FPU (int) sim_fpu_exp (const sim_fpu *s);
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INLINE_SIM_FPU (int) sim_fpu_exp (const sim_fpu *s);
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INLINE_SIM_FPU (unsigned64) sim_fpu_fraction (const sim_fpu *s);
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INLINE_SIM_FPU (unsigned64) sim_fpu_guard (const sim_fpu *s, int is_double);
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