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2003-06-22 Andrew Cagney <cagney@redhat.com>

Browse source 
From matthew green <mrg@redhat.com>:
        * sim-fpu.h: Update copyright.
	(sim_fpu_fraction, sim_fpu_guard): New prototypes.
        * sim-fpu.c: Update copyright.
	(sim_fpu_fraction, sim_fpu_guard): New inline functions.
This commit is contained in:
Andrew Cagney 2003-06-22 13:36:26 +00:00
parent 4056a1ef29
commit 1f1b28179f
3 changed files with 32 additions and 30 deletions
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8
sim/common/ChangeLog
View file

@ -1,3 +1,11 @@
2003-06-22 Andrew Cagney <cagney@redhat.com>
From matthew green <mrg@redhat.com>:
* sim-fpu.h: Update copyright.
(sim_fpu_fraction, sim_fpu_guard): New prototypes.
* sim-fpu.c: Update copyright.
(sim_fpu_fraction, sim_fpu_guard): New inline functions.
2003-06-17 Frank Ch. Eigler <fche@redhat.com>
From Doug Evans <dje@sebabeach.org>:

46
sim/common/sim-fpu.c
View file

@ -2,7 +2,7 @@
of the floating point routines in libgcc1.c for targets without
hardware floating point. */
/* Copyright (C) 1994,1997-1998 Free Software Foundation, Inc.
/* Copyright 1994, 1997, 1998, 2003 Free Software Foundation, Inc.
This file is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
@ -1754,33 +1754,7 @@ INLINE_SIM_FPU (int)
sim_fpu_inv (sim_fpu *f,
const sim_fpu *r)
{
if (sim_fpu_is_snan (r))
{
*f = *r;
f->class = sim_fpu_class_qnan;
return sim_fpu_status_invalid_snan;
}
if (sim_fpu_is_qnan (r))
{
*f = *r;
f->class = sim_fpu_class_qnan;
return 0;
}
if (sim_fpu_is_infinity (r))
{
*f = sim_fpu_zero;
f->sign = r->sign;
return 0;
}
if (sim_fpu_is_zero (r))
{
f->class = sim_fpu_class_infinity;
f->sign = r->sign;
return sim_fpu_status_invalid_div0;
}
*f = *r;
f->normal_exp = - r->normal_exp;
return 0;
return sim_fpu_div (f, &sim_fpu_one, r);
}
@ -2214,6 +2188,22 @@ sim_fpu_exp (const sim_fpu *d)
}
INLINE_SIM_FPU (unsigned64)
sim_fpu_fraction (const sim_fpu *d)
{
return d->fraction;
}
INLINE_SIM_FPU (unsigned64)
sim_fpu_guard (const sim_fpu *d, int is_double)
{
unsigned64 rv;
unsigned64 guardmask = LSMASK64 (NR_GUARDS - 1, 0);
rv = (d->fraction & guardmask) >> NR_PAD;
return rv;
}
INLINE_SIM_FPU (int)
sim_fpu_is (const sim_fpu *d)

8
sim/common/sim-fpu.h
View file

@ -1,5 +1,7 @@
/* Simulator Floating-point support.
Copyright (C) 1997, 1998, 2002 Free Software Foundation, Inc.
Copyright 1997, 1998, 2002, 2003 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GDB, the GNU debugger.
@ -42,7 +44,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
For unpacked structures (passed by value and reference), the code
quality of GCC-2.7 (on x86) for each alternative was compared.
Needless to say the results, while better then for a packed 64 bit
Needless to say the results, while better than for a packed 64 bit
object, were still poor (GCC had only limited support for the
optimization of references to structure members). Regardless, the
struct-by-ref alternative achieved better results when compiled
@ -316,6 +318,8 @@ INLINE_SIM_FPU (int) sim_fpu_is_denorm (const sim_fpu *s); /* !zero */
INLINE_SIM_FPU (int) sim_fpu_sign (const sim_fpu *s);
INLINE_SIM_FPU (int) sim_fpu_exp (const sim_fpu *s);
INLINE_SIM_FPU (unsigned64) sim_fpu_fraction (const sim_fpu *s);
INLINE_SIM_FPU (unsigned64) sim_fpu_guard (const sim_fpu *s, int is_double);