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2002-05-28 Elena Zannoni <ezannoni@redhat.com>

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* interp.c (sim_create_inferior): Add comment.

	From Alan Matsuoka <alanm@redhat.com>:
	From 2001-04-27 Jason Eckhardt <jle@cygnus.com>:
	* simops.c (OP_4400): Output "mvf0f" instead of "mf0f".
	(OP_4401): Output "mvf0t" instead of "mf0t".
	(OP_460B): Do not output a flag register.
	(OP_4609): Do not output a flag register.
This commit is contained in:
Elena Zannoni 2002-05-28 15:49:52 +00:00
parent 697f244d5b
commit 1aa5e64f43
3 changed files with 23 additions and 4 deletions
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11
sim/d10v/ChangeLog
View file

@ -1,3 +1,14 @@
2002-05-28 Elena Zannoni <ezannoni@redhat.com>
* interp.c (sim_create_inferior): Add comment.
From Alan Matsuoka <alanm@redhat.com>:
From 2001-04-27 Jason Eckhardt <jle@cygnus.com>:
* simops.c (OP_4400): Output "mvf0f" instead of "mf0f".
(OP_4401): Output "mvf0t" instead of "mf0t".
(OP_460B): Do not output a flag register.
(OP_4609): Do not output a flag register.
2002-05-23 Andrew Cagney <ac131313@redhat.com> 2002-05-23 Andrew Cagney <ac131313@redhat.com>
* Makefile.in (INCLUDE): Add "gdb/sim-d10v.h". * Makefile.in (INCLUDE): Add "gdb/sim-d10v.h".

8
sim/d10v/interp.c
View file

@ -1202,6 +1202,14 @@ sim_create_inferior (sd, abfd, argv, env)
/* reset all state information */ /* reset all state information */
memset (&State.regs, 0, (int)&State.mem - (int)&State.regs); memset (&State.regs, 0, (int)&State.mem - (int)&State.regs);
/* There was a hack here to copy the values of argc and argv into r0
and r1. The values were also saved into some high memory that
won't be overwritten by the stack (0x7C00). The reason for doing
this was to allow the 'run' program to accept arguments. Without
the hack, this is not possible anymore. If the simulator is run
from the debugger, arguments cannot be passed in, so this makes
no difference. */
/* set PC */ /* set PC */
if (abfd != NULL) if (abfd != NULL)
start_address = bfd_get_start_address (abfd); start_address = bfd_get_start_address (abfd);

8
sim/d10v/simops.c
View file

@ -1972,7 +1972,7 @@ void
OP_4400 () OP_4400 ()
{ {
int16 tmp; int16 tmp;
trace_input ("mf0f", OP_REG_OUTPUT, OP_REG, OP_VOID); trace_input ("mvf0f", OP_REG_OUTPUT, OP_REG, OP_VOID);
if (PSW_F0 == 0) if (PSW_F0 == 0)
{ {
tmp = GPR (OP[1]); tmp = GPR (OP[1]);
@ -1988,7 +1988,7 @@ void
OP_4401 () OP_4401 ()
{ {
int16 tmp; int16 tmp;
trace_input ("mf0t", OP_REG_OUTPUT, OP_REG, OP_VOID); trace_input ("mvf0t", OP_REG_OUTPUT, OP_REG, OP_VOID);
if (PSW_F0) if (PSW_F0)
{ {
tmp = GPR (OP[1]); tmp = GPR (OP[1]);
@ -2604,7 +2604,7 @@ void
OP_460B () OP_460B ()
{ {
int16 tmp; int16 tmp;
trace_input ("slx", OP_REG, OP_FLAG, OP_VOID); trace_input ("slx", OP_REG, OP_VOID, OP_VOID);
tmp = ((GPR (OP[0]) << 1) | PSW_F0); tmp = ((GPR (OP[0]) << 1) | PSW_F0);
SET_GPR (OP[0], tmp); SET_GPR (OP[0], tmp);
trace_output_16 (tmp); trace_output_16 (tmp);
@ -2726,7 +2726,7 @@ void
OP_4609 () OP_4609 ()
{ {
uint16 tmp; uint16 tmp;
trace_input ("srx", OP_REG, OP_FLAG, OP_VOID); trace_input ("srx", OP_REG, OP_VOID, OP_VOID);
tmp = PSW_F0 << 15; tmp = PSW_F0 << 15;
tmp = ((GPR (OP[0]) >> 1) | tmp); tmp = ((GPR (OP[0]) >> 1) | tmp);
SET_GPR (OP[0], tmp); SET_GPR (OP[0], tmp);