Changes required to emit Elf Rela structures
for relocation.
This commit is contained in:
Catherine Moore
parent
d0136bf32a
commit
197de3bac9
2 changed files with 179 additions and 114 deletions
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@ -126,6 +126,18 @@ Fri Mar 27 16:06:02 1998 Ian Lance Taylor <ian@cygnus.com>
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int *. Update uses. Change j to long.
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* bfd-in2.h, libcoff.h: Rebuild.
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Fri Mar 27 10:10:46 1998 Catherine Moore <clm@cygnus.com>
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* elf32-v850.c Remove definition of USE_REL.
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(v850_elf_info_to_howto_rela): New function.
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(v850_elf_perform_relocation): Renamed from
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v850_elf_store_addend_in_insn. Removed replace argument.
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(v850_elf_reloc): store the relocation in the addend field
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instead of the insn.
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(v850_elf_final_link_relocate): Now calls
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v850_elf_perform_relocation.
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(v850_elf_relocate_section): Remove code to generate REL
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relocations.
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Thu Mar 26 13:32:17 1998 Ian Lance Taylor <ian@cygnus.com>
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* coffcode.h (coff_new_section_hook): Set the type and storage
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281
bfd/elf32-v850.c
281
bfd/elf32-v850.c
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@ -37,6 +37,8 @@ static reloc_howto_type *v850_elf_reloc_type_lookup
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PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
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static void v850_elf_info_to_howto_rel
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PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *));
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static void v850_elf_info_to_howto_rela
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PARAMS ((bfd *, arelent *, Elf32_Internal_Rela *));
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static bfd_reloc_status_type v850_elf_reloc
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PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
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static boolean v850_elf_is_local_label_name PARAMS ((bfd *, const char *));
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@ -48,9 +50,6 @@ static boolean v850_elf_relocate_section PARAMS((bfd *,
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Elf_Internal_Rela *,
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Elf_Internal_Sym *,
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asection **));
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/* Try to minimize the amount of space occupied by relocation tables
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on the ROM (not that the ROM won't be swamped by other ELF overhead). */
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#define USE_REL
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/* Note: It is REQUIRED that the 'type' value of each entry in this array
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match the index of the entry in the array. */
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@ -482,6 +481,20 @@ v850_elf_info_to_howto_rel (abfd, cache_ptr, dst)
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cache_ptr->howto = &v850_elf_howto_table[r_type];
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}
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/* Set the howto pointer for a V850 ELF reloc (type RELA). */
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static void
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v850_elf_info_to_howto_rela (abfd, cache_ptr, dst)
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bfd * abfd;
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arelent * cache_ptr;
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Elf32_Internal_Rela *dst;
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{
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unsigned int r_type;
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r_type = ELF32_R_TYPE (dst->r_info);
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BFD_ASSERT (r_type < (unsigned int) R_V850_max);
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cache_ptr->howto = &v850_elf_howto_table[r_type];
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}
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/* Look through the relocs for a section during the first phase, and
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allocate space in the global offset table or procedure linkage
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@ -642,16 +655,105 @@ v850_elf_check_relocs (abfd, info, sec, relocs)
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return ret;
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}
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typedef struct
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{
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long addend;
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bfd_byte * address;
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unsigned long counter;
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}
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hi16s_location;
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static hi16s_location previous_hi16s[ 10 ]; /* XXX is this enough ? */
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static unsigned long hi16s_counter;
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static void
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remember_hi16s_reloc (addend, address)
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long addend;
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bfd_byte * address;
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{
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hi16s_location * oldest = NULL;
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int i;
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/* Find a free slot. */
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for (i = sizeof (previous_hi16s) / sizeof (previous_hi16s[0]); i--;)
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{
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hi16s_location * entry = previous_hi16s + i;
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if (entry->addend == 0 && entry->address == 0)
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{
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/* Use this entry. */
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oldest = entry;
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break;
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}
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/* Remember the least recently added entry. */
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if (oldest == NULL || oldest->counter > entry->counter)
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oldest = entry;
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}
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oldest->addend = addend;
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oldest->address = address;
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oldest->counter = hi16s_counter ++;
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/* Cope with wrap around of our counter. */
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if (hi16s_counter == 0)
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{
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/* XXX - Assume that all counter entries differ only in their low 16 bits. */
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for (i = sizeof (previous_hi16s) / sizeof (previous_hi16s[0]); i--;)
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{
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hi16s_location * entry = previous_hi16s + i;
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entry->counter &= 0xffff;
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}
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hi16s_counter = 0x10000;
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}
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return;
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}
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static bfd_byte *
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find_remembered_hi16s_reloc (addend)
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long addend;
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{
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hi16s_location * match = NULL;
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int i;
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/* Search the table. Record the most recent entry that matches. */
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for (i = sizeof (previous_hi16s) / sizeof (previous_hi16s[0]); i--;)
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{
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hi16s_location * entry = previous_hi16s + i;
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if (entry->addend == addend)
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{
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if (match == NULL || match->counter < entry->counter)
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match = entry;
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}
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}
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if (match != NULL)
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{
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bfd_byte * addr;
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/* Empty the table entry. */
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match->addend = 0;
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addr = match->address;
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match->address = NULL;
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return addr;
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}
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return NULL;
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}
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static bfd_reloc_status_type
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v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
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v850_elf_perform_relocation (abfd, r_type, addend, address)
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bfd * abfd;
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int r_type;
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long addend;
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bfd_byte * address;
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boolean replace;
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{
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static long last_hi16s_addend;
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static bfd_byte * last_hi16s_address;
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unsigned long insn;
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switch (r_type)
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@ -661,9 +763,7 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
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return bfd_reloc_notsupported;
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case R_V850_32:
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if (! replace)
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addend += bfd_get_32 (abfd, address);
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addend += bfd_get_32 (abfd, address);
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bfd_put_32 (abfd, addend, address);
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return bfd_reloc_ok;
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@ -692,31 +792,34 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
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insn |= ((addend & 0x1f0) << 7) | ((addend & 0x0e) << 3);
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break;
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case R_V850_HI16_S:
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last_hi16s_addend = addend;
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last_hi16s_address = address;
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addend += (bfd_get_16 (abfd, address) << 16);
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addend = (addend >> 16) + ((addend & 0x8000) != 0);
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/* This relocation cannot overflow. */
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if (addend > 0x7fff || addend < -0x8000)
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addend = 0;
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insn = addend;
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break;
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case R_V850_HI16:
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addend += (bfd_get_16 (abfd, address) << 16);
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addend = (addend >> 16);
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insn = addend;
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break;
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case R_V850_HI16_S:
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/* Remember where this relocation took place. */
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remember_hi16s_reloc (addend, address);
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addend += (bfd_get_16 (abfd, address) << 16);
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addend = (addend >> 16) + ((addend & 0x8000) != 0);
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/* This relocation cannot overflow. */
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if (addend > 0x7fff || addend < -0x8000)
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addend = 0;
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insn = addend;
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break;
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case R_V850_LO16:
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/* Calculate the sum of the value stored in the instruction and the
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addend and check for overflow from the low 16 bits into the high
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16 bits. The assembler has already done some of this: If the
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value stored in the instruction has its 15th bit set, then the
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assembler will have added 1 to the value stored in the associated
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HI16S reloc. So for example, these relocations:
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value stored in the instruction has its 15th bit set, (counting
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from zero) then the assembler will have added 1 to the value
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stored in the associated HI16S reloc. So for example, these
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relocations:
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movhi hi( fred ), r0, r1
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movea lo( fred ), r1, r1
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@ -748,11 +851,10 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
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MOVEA instruction.
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Overflow can occur if the addition of the value stored in the
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instruction plus the addend sets the 15th bit (counting from 0) when
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before it was clear. This is because the 15th bit will be sign
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extended into the high part, thus reducing its value by one, but
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since the 15th bit was originally clear, the previous HI16S
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relocation will not have added in an additional 1 to the high part
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instruction plus the addend sets the 15th bit when before it was clear.
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This is because the 15th bit will be sign extended into the high part,
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thus reducing its value by one, but since the 15th bit was originally
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clear, the assembler will not have added 1 to the previous HI16S reloc
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to compensate for this effect. For example:
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movhi hi( fred + 0x123456), r0, r1
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@ -798,11 +900,11 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
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So, for example if fred is at address 0xf000:
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movhi hi( fred + 0xffff), r0, r1 [bit 15 of the offset is 1]
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movhi hi( fred + 0xffff), r0, r1 [bit 15 of the offset is set]
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movea lo( fred + 0xffff), r1, r1
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HI16S: 0x0001 + (0x0000f000 >> 16) = 0x0001
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LO16: 0xffff + (0x0000f000 & 0xffff) = 0xefff (carry into bit 16)
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LO16: 0xffff + (0x0000f000 & 0xffff) = 0xefff (carry into bit 16 is lost)
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0x00010000
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+ 0xffffefff
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@ -812,11 +914,11 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
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Similarly, if the 15th bit remains clear, but overflow occurs into
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the 16th bit then (assuming the address of fred is 0xf000):
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movhi hi( fred + 0x7000), r0, r1 [bit 15 of the offset is 0]
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movhi hi( fred + 0x7000), r0, r1 [bit 15 of the offset is clear]
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movea lo( fred + 0x7000), r1, r1
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HI16S: 0x0000 + (0x0000f000 >> 16) = 0x0000
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LO16: 0x7000 + (0x0000f000 & 0xffff) = 0x6fff (carry into bit 16)
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LO16: 0x7000 + (0x0000f000 & 0xffff) = 0x6fff (carry into bit 16 is lost)
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0x00000000
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+ 0x00006fff
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@ -827,11 +929,11 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
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15th bit changes its value from being set to being clear, as the HI16S
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reloc will have already added in 1 to the high part for us:
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movhi hi( fred + 0xffff), r0, r1 [bit 15 of the offset is 1]
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movhi hi( fred + 0xffff), r0, r1 [bit 15 of the offset is set]
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movea lo( fred + 0xffff), r1, r1
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HI16S: 0x0001 + (0x00007000 >> 16)
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LO16: 0xffff + (0x00007000 & 0xffff) = 0x6fff (carry into bit 16)
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LO16: 0xffff + (0x00007000 & 0xffff) = 0x6fff (carry into bit 16 is lost)
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0x00010000
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+ 0x00006fff (bit 15 not set, so the top half is zero)
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@ -841,7 +943,7 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
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but if the 15th bit goes from being clear to being set, then we must
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once again handle overflow:
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movhi hi( fred + 0x7000), r0, r1 [bit 15 of the offset is 0]
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movhi hi( fred + 0x7000), r0, r1 [bit 15 of the offset is clear]
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movea lo( fred + 0x7000), r1, r1
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HI16S: 0x0000 + (0x0000ffff >> 16)
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@ -866,35 +968,29 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
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|| (OVERFLOWS (addend, insn)
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&& ((! BIT15_SET (insn)) || (BIT15_SET (addend)))))
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{
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/* Amend the preceding HI16_S relocation, allowing for
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an intervening instruction, which does occasionally happen. */
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if ( (addend == last_hi16s_addend)
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&& ( (address == last_hi16s_address + 4)
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|| (address == last_hi16s_address + 8)))
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bfd_byte * hi16s_address = find_remembered_hi16s_reloc (addend);
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/* Amend the matching HI16_S relocation. */
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if (hi16s_address != NULL)
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{
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insn = bfd_get_16 (abfd, last_hi16s_address);
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insn = bfd_get_16 (abfd, hi16s_address);
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insn += 1;
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bfd_put_16 (abfd, insn, last_hi16s_address);
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bfd_put_16 (abfd, insn, hi16s_address);
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}
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else
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{
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fprintf (stderr, "FAILED to find previous HI16 reloc:\n");
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fprintf (stderr, "addend = %x, last_hi16s_added = %x, address = %x, last_address = %x\n",
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addend, last_hi16s_addend, address, last_hi16s_address);
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fprintf (stderr, "addend = %x, result = %x, insn = %x\n",
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addend, result, insn);
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fprintf (stderr, "FAILED to find previous HI16 reloc\n");
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return bfd_reloc_overflow;
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}
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}
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/* Do not complain if value has top bit set, as this has been anticipated. */
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insn = result & 0xffff;
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break;
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}
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break;
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case R_V850_8:
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if (! replace)
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addend += (char) bfd_get_8 (abfd, address);
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addend += (char) bfd_get_8 (abfd, address);
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if (addend > 0x7f || addend < -0x80)
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return bfd_reloc_overflow;
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@ -904,8 +1000,7 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
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/* start-sanitize-v850e */
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case R_V850_CALLT_16_16_OFFSET:
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if (! replace)
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addend += bfd_get_16 (abfd, address);
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addend += bfd_get_16 (abfd, address);
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if (addend > 0xffff || addend < 0)
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return bfd_reloc_overflow;
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@ -915,13 +1010,12 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
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/* end-sanitize-v850e */
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case R_V850_16:
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replace = false;
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/* drop through */
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case R_V850_SDA_16_16_OFFSET:
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case R_V850_ZDA_16_16_OFFSET:
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case R_V850_TDA_16_16_OFFSET:
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if (! replace)
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addend += bfd_get_16 (abfd, address);
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addend += bfd_get_16 (abfd, address);
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if (addend > 0x7fff || addend < -0x8000)
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return bfd_reloc_overflow;
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@ -932,24 +1026,20 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
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case R_V850_SDA_15_16_OFFSET:
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case R_V850_ZDA_15_16_OFFSET:
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insn = bfd_get_16 (abfd, address);
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if (! replace)
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addend += (insn & 0xfffe);
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addend += (insn & 0xfffe);
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if (addend > 0x7ffe || addend < -0x8000)
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return bfd_reloc_overflow;
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if (addend & 1)
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return bfd_reloc_dangerous;
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return bfd_reloc_dangerous;
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insn = (addend & ~1) | (insn & 1);
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break;
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case R_V850_TDA_6_8_OFFSET:
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insn = bfd_get_16 (abfd, address);
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if (! replace)
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addend += ((insn & 0x7e) << 1);
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addend += ((insn & 0x7e) << 1);
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if (addend > 0xfc || addend < 0)
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return bfd_reloc_overflow;
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@ -963,9 +1053,7 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
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case R_V850_TDA_7_8_OFFSET:
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insn = bfd_get_16 (abfd, address);
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if (! replace)
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addend += ((insn & 0x7f) << 1);
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addend += ((insn & 0x7f) << 1);
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if (addend > 0xfe || addend < 0)
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return bfd_reloc_overflow;
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@ -979,9 +1067,7 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
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case R_V850_TDA_7_7_OFFSET:
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insn = bfd_get_16 (abfd, address);
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if (! replace)
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addend += insn & 0x7f;
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||||
addend += insn & 0x7f;
|
||||
|
||||
if (addend > 0x7f || addend < 0)
|
||||
return bfd_reloc_overflow;
|
||||
|
|
@ -993,9 +1079,7 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
|
|||
/* start-sanitize-v850e */
|
||||
case R_V850_TDA_4_5_OFFSET:
|
||||
insn = bfd_get_16 (abfd, address);
|
||||
|
||||
if (! replace)
|
||||
addend += ((insn & 0xf) << 1);
|
||||
addend += ((insn & 0xf) << 1);
|
||||
|
||||
if (addend > 0x1e || addend < 0)
|
||||
return bfd_reloc_overflow;
|
||||
|
|
@ -1009,9 +1093,7 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
|
|||
|
||||
case R_V850_TDA_4_4_OFFSET:
|
||||
insn = bfd_get_16 (abfd, address);
|
||||
|
||||
if (! replace)
|
||||
addend += insn & 0xf;
|
||||
addend += insn & 0xf;
|
||||
|
||||
if (addend > 0xf || addend < 0)
|
||||
return bfd_reloc_overflow;
|
||||
|
|
@ -1023,9 +1105,7 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
|
|||
case R_V850_ZDA_16_16_SPLIT_OFFSET:
|
||||
case R_V850_SDA_16_16_SPLIT_OFFSET:
|
||||
insn = bfd_get_32 (abfd, address);
|
||||
|
||||
if (! replace)
|
||||
addend += ((insn & 0xfffe0000) >> 16) + ((insn & 0x20) >> 5);
|
||||
addend += ((insn & 0xfffe0000) >> 16) + ((insn & 0x20) >> 5);
|
||||
|
||||
if (addend > 0x7fff || addend < -0x8000)
|
||||
return bfd_reloc_overflow;
|
||||
|
|
@ -1039,9 +1119,7 @@ v850_elf_store_addend_in_insn (abfd, r_type, addend, address, replace)
|
|||
|
||||
case R_V850_CALLT_6_7_OFFSET:
|
||||
insn = bfd_get_16 (abfd, address);
|
||||
|
||||
if (! replace)
|
||||
addend += ((insn & 0x3f) << 1);
|
||||
addend += ((insn & 0x3f) << 1);
|
||||
|
||||
if (addend > 0x7e || addend < 0)
|
||||
return bfd_reloc_overflow;
|
||||
|
|
@ -1072,8 +1150,6 @@ v850_elf_reloc (abfd, reloc, symbol, data, isection, obfd, err)
|
|||
char ** err;
|
||||
{
|
||||
long relocation;
|
||||
long insn;
|
||||
|
||||
|
||||
/* If there is an output BFD,
|
||||
and the symbol is not a section name (which is only defined at final link time),
|
||||
|
|
@ -1131,11 +1207,8 @@ v850_elf_reloc (abfd, reloc, symbol, data, isection, obfd, err)
|
|||
relocation -= reloc->address;
|
||||
}
|
||||
|
||||
/* I've got no clue... */
|
||||
reloc->addend = 0;
|
||||
|
||||
return v850_elf_store_addend_in_insn (abfd, reloc->howto->type, relocation,
|
||||
(bfd_byte *) data + reloc->address, true);
|
||||
reloc->addend = relocation;
|
||||
return bfd_reloc_ok;
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -1310,7 +1383,8 @@ v850_elf_final_link_relocate (howto, input_bfd, output_bfd,
|
|||
}
|
||||
|
||||
/* Perform the relocation. */
|
||||
return v850_elf_store_addend_in_insn (input_bfd, r_type, value, hit_data, false);
|
||||
return v850_elf_perform_relocation (input_bfd, r_type, value+addend, hit_data);
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -1364,29 +1438,7 @@ v850_elf_relocate_section (output_bfd, info, input_bfd, input_section,
|
|||
if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
|
||||
{
|
||||
sec = local_sections[r_symndx];
|
||||
#ifdef USE_REL
|
||||
/* The Elf_Internal_Rel structure does not have space for the
|
||||
modified addend value, so we store it in the instruction
|
||||
instead. */
|
||||
|
||||
if (sec->output_offset + sym->st_value != 0)
|
||||
{
|
||||
if (v850_elf_store_addend_in_insn (input_bfd, r_type,
|
||||
sec->output_offset +
|
||||
sym->st_value,
|
||||
contents + rel->r_offset,
|
||||
false)
|
||||
!= bfd_reloc_ok)
|
||||
{
|
||||
info->callbacks->warning
|
||||
(info,
|
||||
"Unable to handle relocation during incremental link",
|
||||
NULL, input_bfd, input_section, rel->r_offset);
|
||||
}
|
||||
}
|
||||
#else
|
||||
rel->r_addend += sec->output_offset + sym->st_value;
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1550,6 +1602,7 @@ v850_elf_object_p (abfd)
|
|||
case E_V850EA_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_v850, bfd_mach_v850ea); break;
|
||||
/* end-sanitize-v850e */
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
/* Store the machine number in the flags field. */
|
||||
|
|
@ -1670,7 +1723,7 @@ v850_elf_print_private_bfd_data (abfd, ptr)
|
|||
|
||||
BFD_ASSERT (abfd != NULL && ptr != NULL)
|
||||
|
||||
fprintf (file, "private flags = %x", elf_elfheader (abfd)->e_flags);
|
||||
fprintf (file, "private flags = %lx", elf_elfheader (abfd)->e_flags);
|
||||
|
||||
switch (elf_elfheader (abfd)->e_flags & EF_V850_ARCH)
|
||||
{
|
||||
|
|
@ -1926,7 +1979,7 @@ v850_elf_fake_sections (abfd, hdr, sec)
|
|||
#define ELF_MACHINE_CODE EM_CYGNUS_V850
|
||||
#define ELF_MAXPAGESIZE 0x1000
|
||||
|
||||
#define elf_info_to_howto 0
|
||||
#define elf_info_to_howto v850_elf_info_to_howto_rela
|
||||
#define elf_info_to_howto_rel v850_elf_info_to_howto_rel
|
||||
|
||||
#define elf_backend_check_relocs v850_elf_check_relocs
|
||||
|
|
|
|||
Loading…
Reference in a new issue