2002-06-03 Chris Demetriou <cgd@broadcom.com>
* sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate) (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in file, remove PARAMS from prototypes. (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide simulator state arguments. (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to pass simulator state arguments. * cp1.c (SD): Redefine as CPU_STATE(cpu). (store_fpr, convert): Remove 'sd' argument. (value_fpr): Likewise. Convert to use 'SD' instead.
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3 changed files with 42 additions and 30 deletions
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@ -1,3 +1,16 @@
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2002-06-03 Chris Demetriou <cgd@broadcom.com>
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* sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
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(Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
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file, remove PARAMS from prototypes.
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(value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
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simulator state arguments.
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(ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
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pass simulator state arguments.
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* cp1.c (SD): Redefine as CPU_STATE(cpu).
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(store_fpr, convert): Remove 'sd' argument.
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(value_fpr): Likewise. Convert to use 'SD' instead.
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2002-06-03 Chris Demetriou <cgd@broadcom.com>
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* cp1.c (Min, Max): Remove #if 0'd functions.
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@ -21,7 +21,7 @@
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/* Within cp1.c we refer to sim_cpu directly. */
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#define CPU cpu
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#define SD sd
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#define SD CPU_STATE(cpu)
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/*-- FPU support routines ---------------------------------------------------*/
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@ -63,8 +63,7 @@ static const char *fpu_rounding_mode_name (int rm);
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#endif
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uword64
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value_fpr (SIM_DESC sd,
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sim_cpu *cpu,
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value_fpr (sim_cpu *cpu,
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address_word cia,
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int fpr,
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FP_formats fmt)
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@ -95,7 +94,7 @@ value_fpr (SIM_DESC sd,
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}
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if (fmt != FPR_STATE[fpr])
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{
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sim_io_eprintf (sd, "FPR %d (format %s) being accessed with format %s - setting to unknown (PC = 0x%s)\n",
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sim_io_eprintf (SD, "FPR %d (format %s) being accessed with format %s - setting to unknown (PC = 0x%s)\n",
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fpr, fpu_format_name (FPR_STATE[fpr]),
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fpu_format_name (fmt), pr_addr (cia));
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FPR_STATE[fpr] = fmt_unknown;
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@ -195,8 +194,7 @@ value_fpr (SIM_DESC sd,
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}
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void
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store_fpr (SIM_DESC sd,
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sim_cpu *cpu,
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store_fpr (sim_cpu *cpu,
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address_word cia,
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int fpr,
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FP_formats fmt,
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@ -894,8 +892,7 @@ SquareRoot (op, fmt)
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}
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uword64
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convert (SIM_DESC sd,
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sim_cpu *cpu,
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convert (sim_cpu *cpu,
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address_word cia,
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int rm,
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uword64 op,
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@ -80,28 +80,6 @@ typedef enum {
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fmt_uninterpreted_64 = 0x80000000U,
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} FP_formats;
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unsigned64 value_fpr PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int fpr, FP_formats));
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#define ValueFPR(FPR,FMT) value_fpr (SD, CPU, cia, (FPR), (FMT))
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void store_fpr PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int fpr, FP_formats fmt, unsigned64 value));
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#define StoreFPR(FPR,FMT,VALUE) store_fpr (SD, CPU, cia, (FPR), (FMT), (VALUE))
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int NaN PARAMS ((unsigned64 op, FP_formats fmt));
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int Infinity PARAMS ((unsigned64 op, FP_formats fmt));
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int Less PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
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int Equal PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
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unsigned64 AbsoluteValue PARAMS ((unsigned64 op, FP_formats fmt));
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unsigned64 Negate PARAMS ((unsigned64 op, FP_formats fmt));
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unsigned64 Add PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
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unsigned64 Sub PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
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unsigned64 Multiply PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
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unsigned64 Divide PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
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unsigned64 Recip PARAMS ((unsigned64 op, FP_formats fmt));
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unsigned64 SquareRoot PARAMS ((unsigned64 op, FP_formats fmt));
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unsigned64 convert PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int rm, unsigned64 op, FP_formats from, FP_formats to));
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#define Convert(rm,op,from,to) \
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convert (SD, CPU, cia, rm, op, from, to)
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/* Macro to update FPSR condition-code field. This is complicated by
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the fact that there is a hole in the index range of the bits within
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the FCSR register. Also, the number of bits visible depends on the
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@ -729,6 +707,30 @@ decode_coproc (SD, CPU, cia, (instruction))
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int sim_monitor (SIM_DESC sd, sim_cpu *cpu, address_word cia, unsigned int arg);
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/* FPR access. */
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unsigned64 value_fpr (SIM_STATE, int fpr, FP_formats);
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#define ValueFPR(FPR,FMT) value_fpr (SIM_ARGS, (FPR), (FMT))
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void store_fpr (SIM_STATE, int fpr, FP_formats fmt, unsigned64 value);
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#define StoreFPR(FPR,FMT,VALUE) store_fpr (SIM_ARGS, (FPR), (FMT), (VALUE))
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/* FPU operations. */
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int NaN (unsigned64 op, FP_formats fmt);
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int Infinity (unsigned64 op, FP_formats fmt);
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int Less (unsigned64 op1, unsigned64 op2, FP_formats fmt);
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int Equal (unsigned64 op1, unsigned64 op2, FP_formats fmt);
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unsigned64 AbsoluteValue (unsigned64 op, FP_formats fmt);
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unsigned64 Negate (unsigned64 op, FP_formats fmt);
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unsigned64 Add (unsigned64 op1, unsigned64 op2, FP_formats fmt);
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unsigned64 Sub (unsigned64 op1, unsigned64 op2, FP_formats fmt);
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unsigned64 Multiply (unsigned64 op1, unsigned64 op2, FP_formats fmt);
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unsigned64 Divide (unsigned64 op1, unsigned64 op2, FP_formats fmt);
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unsigned64 Recip (unsigned64 op, FP_formats fmt);
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unsigned64 SquareRoot (unsigned64 op, FP_formats fmt);
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unsigned64 convert (SIM_STATE, int rm, unsigned64 op, FP_formats from, FP_formats to);
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#define Convert(rm,op,from,to) convert (SIM_ARGS, rm, op, from, to)
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/* MDMX access. */
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typedef unsigned int MX_fmtsel; /* MDMX format select field (5 bits). */
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