* m68k-opc.c (m68k_opcodes): Consistantly Use "s" as the storage
specifier of the effective-address operand in immediate forms of arithmetic instructions. The specifier for the immediate operand notes how and where the constant will be stored.
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a0a2af4f95
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2 changed files with 41 additions and 30 deletions
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@ -1,5 +1,15 @@
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Mon Nov 25 13:08:40 1996 J.T. Conklin <jtc@cygnus.com>
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* m68k-opc.c (m68k_opcodes): Consistantly Use "s" as the storage
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specifier of the effective-address operand in immediate forms of
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arithmetic instructions. The specifier for the immediate operand
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notes how and where the constant will be stored.
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Mon Nov 25 11:17:01 1996 Jeffrey A Law (law@cygnus.com)
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* mn10300-opc.c (mn10300_opcodes): Remove redundant "lcc"
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opcode.
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* mn10300-dis.c (disassemble): Use '$' instead of '%' for
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register prefix.
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@ -36,9 +36,9 @@ const struct m68k_opcode m68k_opcodes[] =
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{"addaw", one(0150300), one(0170700), "*wAd", m68000up },
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{"addal", one(0150700), one(0170700), "*lAd", m68000up | mcf5200 },
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{"addib", one(0003000), one(0177700), "#b$b", m68000up },
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{"addiw", one(0003100), one(0177700), "#w$w", m68000up },
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{"addil", one(0003200), one(0177700), "#l$l", m68000up | mcf5200 },
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{"addib", one(0003000), one(0177700), "#b$s", m68000up },
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{"addiw", one(0003100), one(0177700), "#w$s", m68000up },
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{"addil", one(0003200), one(0177700), "#l$s", m68000up | mcf5200 },
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{"addqb", one(0050000), one(0170700), "Qd$b", m68000up },
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{"addqw", one(0050100), one(0170700), "Qd%w", m68000up },
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@ -46,16 +46,16 @@ const struct m68k_opcode m68k_opcodes[] =
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/* The add opcode can generate the adda, addi, and addq instructions. */
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{"addb", one(0050000), one(0170700), "Qd$b", m68000up },
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{"addb", one(0003000), one(0177700), "#b$b", m68000up },
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{"addb", one(0003000), one(0177700), "#b$s", m68000up },
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{"addb", one(0150000), one(0170700), ";bDd", m68000up },
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{"addb", one(0150400), one(0170700), "Dd~b", m68000up },
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{"addw", one(0050100), one(0170700), "Qd%w", m68000up },
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{"addw", one(0150300), one(0170700), "*wAd", m68000up },
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{"addw", one(0003100), one(0177700), "#w$w", m68000up },
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{"addw", one(0003100), one(0177700), "#w$s", m68000up },
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{"addw", one(0150100), one(0170700), "*wDd", m68000up },
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{"addw", one(0150500), one(0170700), "Dd~w", m68000up },
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{"addl", one(0050200), one(0170700), "Qd%l", m68000up | mcf5200 },
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{"addl", one(0003200), one(0177700), "#l$l", m68000up | mcf5200 },
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{"addl", one(0003200), one(0177700), "#l$s", m68000up | mcf5200 },
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{"addl", one(0150700), one(0170700), "*lAd", m68000up | mcf5200 },
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{"addl", one(0150200), one(0170700), "*lDd", m68000up | mcf5200 },
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{"addl", one(0150600), one(0170700), "Dd~l", m68000up | mcf5200 },
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@ -67,30 +67,30 @@ const struct m68k_opcode m68k_opcodes[] =
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{"addxl", one(0150600), one(0170770), "DsDd", m68000up | mcf5200 },
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{"addxl", one(0150610), one(0170770), "-s-d", m68000up },
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{"andib", one(0001000), one(0177700), "#b$b", m68000up },
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{"andib", one(0001074), one(0177777), "#bCb", m68000up },
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{"andiw", one(0001100), one(0177700), "#w$w", m68000up },
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{"andiw", one(0001174), one(0177777), "#wSw", m68000up },
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{"andil", one(0001200), one(0177700), "#l$l", m68000up | mcf5200 },
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{"andi", one(0001100), one(0177700), "#w$w", m68000up },
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{"andi", one(0001074), one(0177777), "#bCb", m68000up },
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{"andi", one(0001174), one(0177777), "#wSw", m68000up },
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{"andib", one(0001000), one(0177700), "#b$s", m68000up },
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{"andib", one(0001074), one(0177777), "#bCs", m68000up },
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{"andiw", one(0001100), one(0177700), "#w$s", m68000up },
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{"andiw", one(0001174), one(0177777), "#wSs", m68000up },
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{"andil", one(0001200), one(0177700), "#l$s", m68000up | mcf5200 },
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{"andi", one(0001100), one(0177700), "#w$s", m68000up },
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{"andi", one(0001074), one(0177777), "#bCs", m68000up },
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{"andi", one(0001174), one(0177777), "#wSs", m68000up },
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/* The and opcode can generate the andi instruction. */
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{"andb", one(0001000), one(0177700), "#b$b", m68000up },
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{"andb", one(0001074), one(0177777), "#bCb", m68000up },
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{"andb", one(0001000), one(0177700), "#b$s", m68000up },
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{"andb", one(0001074), one(0177777), "#bCs", m68000up },
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{"andb", one(0140000), one(0170700), ";bDd", m68000up },
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{"andb", one(0140400), one(0170700), "Dd~b", m68000up },
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{"andw", one(0001100), one(0177700), "#w$w", m68000up },
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{"andw", one(0001174), one(0177777), "#wSw", m68000up },
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{"andw", one(0001100), one(0177700), "#w$s", m68000up },
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{"andw", one(0001174), one(0177777), "#wSs", m68000up },
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{"andw", one(0140100), one(0170700), ";wDd", m68000up },
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{"andw", one(0140500), one(0170700), "Dd~w", m68000up },
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{"andl", one(0001200), one(0177700), "#l$l", m68000up | mcf5200 },
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{"andl", one(0001200), one(0177700), "#l$s", m68000up | mcf5200 },
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{"andl", one(0140200), one(0170700), ";lDd", m68000up | mcf5200 },
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{"andl", one(0140600), one(0170700), "Dd~l", m68000up | mcf5200 },
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{"and", one(0001100), one(0177700), "#w$w", m68000up },
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{"and", one(0001074), one(0177777), "#bCb", m68000up },
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{"and", one(0001174), one(0177777), "#wSw", m68000up },
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{"and", one(0001074), one(0177777), "#bCs", m68000up },
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{"and", one(0001174), one(0177777), "#wSs", m68000up },
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{"and", one(0140100), one(0170700), ";wDd", m68000up },
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{"and", one(0140500), one(0170700), "Dd~w", m68000up },
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@ -231,6 +231,7 @@ const struct m68k_opcode m68k_opcodes[] =
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{"cpusha", one(0xf420|SCOPE_ALL), one(0xff38), "ce", m68040up },
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{"cpushl", one(0xf420|SCOPE_LINE), one(0xff38), "ceas", m68040up },
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{"cpushl", one(0x04e8), one(0xfff8), "as", mcf5200 },
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{"cpushp", one(0xf420|SCOPE_PAGE), one(0xff38), "ceas", m68040up },
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#undef SCOPE_LINE
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@ -248,24 +249,24 @@ const struct m68k_opcode m68k_opcodes[] =
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{"cmpaw", one(0130300), one(0170700), "*wAd", m68000up },
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{"cmpal", one(0130700), one(0170700), "*lAd", m68000up | mcf5200 },
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{"cmpib", one(0006000), one(0177700), "#b;b", m68000up },
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{"cmpiw", one(0006100), one(0177700), "#w;w", m68000up },
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{"cmpil", one(0006200), one(0177700), "#l;l", m68000up | mcf5200 },
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{"cmpib", one(0006000), one(0177700), "#b;s", m68000up },
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{"cmpiw", one(0006100), one(0177700), "#w;s", m68000up },
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{"cmpil", one(0006200), one(0177700), "#l;s", m68000up | mcf5200 },
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{"cmpmb", one(0130410), one(0170770), "+s+d", m68000up },
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{"cmpmw", one(0130510), one(0170770), "+s+d", m68000up },
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{"cmpml", one(0130610), one(0170770), "+s+d", m68000up | mcf5200 },
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/* The cmp opcode can generate the cmpa, cmpm, and cmpi instructions. */
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{"cmpb", one(0006000), one(0177700), "#b;b", m68000up },
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{"cmpb", one(0006000), one(0177700), "#b;s", m68000up },
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{"cmpb", one(0130410), one(0170770), "+s+d", m68000up },
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{"cmpb", one(0130000), one(0170700), ";bDd", m68000up },
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{"cmpw", one(0130300), one(0170700), "*wAd", m68000up },
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{"cmpw", one(0006100), one(0177700), "#w;w", m68000up },
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{"cmpw", one(0006100), one(0177700), "#w;s", m68000up },
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{"cmpw", one(0130510), one(0170770), "+s+d", m68000up },
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{"cmpw", one(0130100), one(0170700), "*wDd", m68000up },
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{"cmpl", one(0130700), one(0170700), "*lAd", m68000up | mcf5200 },
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{"cmpl", one(0006200), one(0177700), "#l;l", m68000up | mcf5200 },
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{"cmpl", one(0006200), one(0177700), "#l;s", m68000up | mcf5200 },
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{"cmpl", one(0130610), one(0170770), "+s+d", m68000up | mcf5200 },
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{"cmpl", one(0130200), one(0170700), "*lDd", m68000up | mcf5200 },
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{"fmovecrx", two(0xF000, 0x5C00), two(0xF1FF, 0xFC00), "Ii#CF7", mfloat },
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{"fmovemx", two(0xF000, 0xF800), two(0xF1C0, 0xFF8F), "IiDk&s", mfloat },
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{"fmovemx", two(0xF020, 0xE800), two(0xF1F8, 0xFF8F), "IiDk-s", mfloat },
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{"fmovemx", two(0xF000, 0xD800), two(0xF1C0, 0xFF8F), "Ii&sDk", mfloat },
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{"fmovemx", two(0xF018, 0xD800), two(0xF1F8, 0xFF8F), "Ii+sDk", mfloat },
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{"fmovemx", two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Idl3&s", mfloat },
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{"fmovemx", two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Id#3&s", mfloat },
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{"fmovemx", two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&sl3", mfloat },
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{"fmovemx", two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&s#3", mfloat },
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{"fmovemx", two(0xF020, 0xE800), two(0xF1F8, 0xFF8F), "IiDk-s", mfloat },
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{"fmovemx", two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "IdL3-s", mfloat },
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{"fmovemx", two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "Id#3-s", mfloat },
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{"fmovemx", two(0xF018, 0xD800), two(0xF1F8, 0xFF8F), "Ii+sDk", mfloat },
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{"fmovemx", two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+sl3", mfloat },
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{"fmovemx", two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+s#3", mfloat },
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{"pea", one(0044100), one(0177700), "!s", m68000up|mcf5200 },
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{"pflusha", two(0xf000,0x2400), two(0xffff,0xffff), "", m68030 | m68851 },
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{"pflusha", one(0xf518), one(0xfff8), "", m68040up },
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{"pflusha", two(0xf000,0x2400), two(0xffff,0xffff), "", m68030 | m68851 },
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{"pflush", two(0xf000,0x3010), two(0xffc0,0xfe10), "T3T9", m68030|m68851 },
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{"pflush", two(0xf000,0x3810), two(0xffc0,0xfe10), "T3T9&s", m68030|m68851 },
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