Fixes for the encoding and decoding of the PDP11's SOB instruction

This commit is contained in:
Nick Clifton 2004-10-01 11:19:38 +00:00
parent 99f5fc1b75
commit 14127cc4f2
6 changed files with 19 additions and 3 deletions

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@ -1,3 +1,8 @@
2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
* config/tc-pdp11.c (md_apply_fix3): Change to sign of the SOB
instruction's offset.
2004-10-01 Adam Nemet <anemet@lnxw.com>
* (TARGET_FORMAT): Remove LynxOS COFF definition.

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@ -1,5 +1,5 @@
/* tc-pdp11.c - pdp11-specific -
Copyright 2001, 2002 Free Software Foundation, Inc.
Copyright 2001, 2002, 2004 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@ -199,6 +199,7 @@ md_apply_fix3 (fixP, valP, seg)
case BFD_RELOC_PDP11_DISP_6_PCREL:
mask = 0x003f;
shift = 1;
val = -val;
break;
default:
BAD_CASE (fixP->fx_r_type);

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@ -1,3 +1,7 @@
2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
* gas/pdp11/opcode.d: Fix sob opcode value.
2004-09-30 Paul Brook <paul@codesourcery.com>
* gas/arm/arch6zk.d: New file.

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@ -134,7 +134,7 @@ Disassembly of section .text:
108: 7c7f [ ]*cvtlpi
10a: 7d80 [ ]*med
10c: 7dea [ ]*xfc 52
10e: 7e3e [ ]*sob r0, 10c <start2\+0x106>
10e: 7e02 [ ]*sob r0, 10c <start2\+0x106>
110: 80fd [ ]*bpl 10c <start2\+0x106>
112: 81fc [ ]*bmi 10c <start2\+0x106>
114: 82fb [ ]*bhi 10c <start2\+0x106>

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@ -1,3 +1,8 @@
2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
* pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
rather than add it.
2004-09-30 Paul Brook <paul@codesourcery.com>
* arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.

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@ -342,7 +342,8 @@ print_insn_pdp11 (memaddr, info)
case PDP11_OPCODE_REG_DISPL:
{
int displ = (opcode & 0x3f) << 10;
bfd_vma address = memaddr + (sign_extend (displ) >> 9);
bfd_vma address = memaddr - (displ >> 9);
FPRINTF (F, OP.name);
FPRINTF (F, AFTER_INSTRUCTION);
print_reg (src, info);