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Fix compiling for COFF targets.

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Some minor formatting tidyups.
This commit is contained in:
Nick Clifton 2002-08-14 13:27:06 +00:00
parent 85c09e8a4a
commit 11f45fb5ff
2 changed files with 162 additions and 151 deletions
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5
gas/ChangeLog
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@ -1,3 +1,8 @@
2002-08-14 Nick Clifton <nickc@redhat.com>
* config/tc-alpha.c: Fix compiling for COFF targets.
Some minor formatting tidyups.
2002-08-13 Stephane Carrez <stcarrez@nerim.fr>
* config/tc-m68hc11.h (MD_PCREL_FROM_SECTION): Remove.

308
gas/config/tc-alpha.c
View file

@ -64,7 +64,7 @@
#include "safe-ctype.h"
/* Local types */
/* Local types. */
#define TOKENIZE_ERROR -1
#define TOKENIZE_ERROR_REPORT -2
@ -72,29 +72,33 @@
#define MAX_INSN_FIXUPS 2
#define MAX_INSN_ARGS 5
struct alpha_fixup {
struct alpha_fixup
{
expressionS exp;
bfd_reloc_code_real_type reloc;
};
struct alpha_insn {
struct alpha_insn
{
unsigned insn;
int nfixups;
struct alpha_fixup fixups[MAX_INSN_FIXUPS];
long sequence;
};
enum alpha_macro_arg {
MACRO_EOA = 1,
MACRO_IR,
MACRO_PIR,
MACRO_OPIR,
MACRO_CPIR,
MACRO_FPR,
MACRO_EXP,
};
enum alpha_macro_arg
{
MACRO_EOA = 1,
MACRO_IR,
MACRO_PIR,
MACRO_OPIR,
MACRO_CPIR,
MACRO_FPR,
MACRO_EXP,
};
struct alpha_macro {
struct alpha_macro
{
const char *name;
void (*emit) PARAMS ((const expressionS *, int, const PTR));
const PTR arg;
@ -139,13 +143,13 @@ struct alpha_macro {
#define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_tprel)
/* Macros for extracting the type and number of encoded register tokens */
/* Macros for extracting the type and number of encoded register tokens. */
#define is_ir_num(x) (((x) & 32) == 0)
#define is_fpr_num(x) (((x) & 32) != 0)
#define regno(x) ((x) & 31)
/* Something odd inherited from the old assembler */
/* Something odd inherited from the old assembler. */
#define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
#define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
@ -179,7 +183,7 @@ struct alpha_macro {
^ 0x80000000) - 0x80000000)
#endif
/* Macros to build tokens */
/* Macros to build tokens. */
#define set_tok_reg(t, r) (memset (&(t), 0, sizeof (t)), \
(t).X_op = O_register, \
@ -201,7 +205,7 @@ struct alpha_macro {
(t).X_op = O_constant, \
(t).X_add_number = (n))
/* Prototypes for all local functions */
/* Prototypes for all local functions. */
static struct alpha_reloc_tag *get_alpha_reloc_tag PARAMS ((long));
static void alpha_adjust_symtab_relocs PARAMS ((bfd *, asection *, PTR));
@ -315,19 +319,20 @@ const char *md_shortopts = "Fm:g+1h:HG:";
const char *md_shortopts = "Fm:gG:";
#endif
struct option md_longopts[] = {
struct option md_longopts[] =
{
#define OPTION_32ADDR (OPTION_MD_BASE)
{ "32addr", no_argument, NULL, OPTION_32ADDR },
{ "32addr", no_argument, NULL, OPTION_32ADDR },
#define OPTION_RELAX (OPTION_32ADDR + 1)
{ "relax", no_argument, NULL, OPTION_RELAX },
{ "relax", no_argument, NULL, OPTION_RELAX },
#ifdef OBJ_ELF
#define OPTION_MDEBUG (OPTION_RELAX + 1)
#define OPTION_NO_MDEBUG (OPTION_MDEBUG + 1)
{ "mdebug", no_argument, NULL, OPTION_MDEBUG },
{ "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG },
{ "mdebug", no_argument, NULL, OPTION_MDEBUG },
{ "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG },
#endif
{ NULL, no_argument, NULL, 0 }
};
{ NULL, no_argument, NULL, 0 }
};
size_t md_longopts_size = sizeof (md_longopts);
@ -351,34 +356,33 @@ size_t md_longopts_size = sizeof (md_longopts);
#define AXP_REG_GP AXP_REG_PV
#endif /* OBJ_EVAX */
/* The cpu for which we are generating code */
/* The cpu for which we are generating code. */
static unsigned alpha_target = AXP_OPCODE_BASE;
static const char *alpha_target_name = "<all>";
/* The hash table of instruction opcodes */
/* The hash table of instruction opcodes. */
static struct hash_control *alpha_opcode_hash;
/* The hash table of macro opcodes */
/* The hash table of macro opcodes. */
static struct hash_control *alpha_macro_hash;
#ifdef OBJ_ECOFF
/* The $gp relocation symbol */
/* The $gp relocation symbol. */
static symbolS *alpha_gp_symbol;
/* XXX: what is this, and why is it exported? */
valueT alpha_gp_value;
#endif
/* The current $gp register */
/* The current $gp register. */
static int alpha_gp_register = AXP_REG_GP;
/* A table of the register symbols */
/* A table of the register symbols. */
static symbolS *alpha_register_table[64];
/* Constant sections, or sections of constants */
/* Constant sections, or sections of constants. */
#ifdef OBJ_ECOFF
static segT alpha_lita_section;
static segT alpha_lit4_section;
#endif
#ifdef OBJ_EVAX
static segT alpha_link_section;
@ -390,7 +394,6 @@ static segT alpha_lit8_section;
/* Symbols referring to said sections. */
#ifdef OBJ_ECOFF
static symbolS *alpha_lita_symbol;
static symbolS *alpha_lit4_symbol;
#endif
#ifdef OBJ_EVAX
static symbolS *alpha_link_symbol;
@ -399,9 +402,8 @@ static symbolS *alpha_dtors_symbol;
#endif
static symbolS *alpha_lit8_symbol;
/* Literal for .litX+0x8000 within .lita */
/* Literal for .litX+0x8000 within .lita. */
#ifdef OBJ_ECOFF
static offsetT alpha_lit4_literal;
static offsetT alpha_lit8_literal;
#endif
@ -410,16 +412,16 @@ static offsetT alpha_lit8_literal;
static symbolS *alpha_cur_ent_sym;
#endif
/* Is the assembler not allowed to use $at? */
/* Is the assembler not allowed to use $at? */
static int alpha_noat_on = 0;
/* Are macros enabled? */
/* Are macros enabled? */
static int alpha_macros_on = 1;
/* Are floats disabled? */
/* Are floats disabled? */
static int alpha_nofloats_on = 0;
/* Are addresses 32 bit? */
/* Are addresses 32 bit? */
static int alpha_addr32_on = 0;
/* Symbol labelling the current insn. When the Alpha gas sees
@ -473,8 +475,7 @@ static int alpha_flag_hash_long_names = 0; /* -+ */
static int alpha_flag_show_after_trunc = 0; /* -H */
/* If the -+ switch is given, then a hash is appended to any name that is
* longer than 64 characters, else longer symbol names are truncated.
*/
longer than 64 characters, else longer symbol names are truncated. */
#endif
@ -491,14 +492,17 @@ static int alpha_flag_show_after_trunc = 0; /* -H */
#define DEF(NAME, RELOC, REQ, ALLOW) \
{ #NAME, sizeof(#NAME)-1, O_##NAME, RELOC, REQ, ALLOW}
static const struct alpha_reloc_op_tag {
static const struct alpha_reloc_op_tag
{
const char *name; /* string to lookup */
size_t length; /* size of the string */
operatorT op; /* which operator to use */
bfd_reloc_code_real_type reloc; /* relocation before frob */
unsigned int require_seq : 1; /* require a sequence number */
unsigned int allow_seq : 1; /* allow a sequence number */
} alpha_reloc_op[] = {
}
alpha_reloc_op[] =
{
DEF(literal, BFD_RELOC_ALPHA_ELF_LITERAL, 0, 1),
DEF(lituse_addr, DUMMY_RELOC_LITUSE_ADDR, 1, 1),
DEF(lituse_base, DUMMY_RELOC_LITUSE_BASE, 1, 1),
@ -557,10 +561,13 @@ static long next_sequence_num = -1;
/* A table of CPU names and opcode sets. */
static const struct cpu_type {
static const struct cpu_type
{
const char *name;
unsigned flags;
} cpu_types[] = {
}
cpu_types[] =
{
/* Ad hoc convention: cpu number gets palcode, process code doesn't.
This supports usage under DU 4.0b that does ".arch ev4", and
usage in MILO that does -m21064. Probably something more
@ -597,7 +604,8 @@ static const struct cpu_type {
/* The macro table */
static const struct alpha_macro alpha_macros[] = {
static const struct alpha_macro alpha_macros[] =
{
/* Load/Store macros */
{ "lda", emit_lda, NULL,
{ MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
@ -809,8 +817,7 @@ md_begin ()
assert (e.X_op == O_max);
}
/* Create the opcode hash table */
/* Create the opcode hash table. */
alpha_opcode_hash = hash_new ();
for (i = 0; i < alpha_num_opcodes;)
{
@ -844,8 +851,7 @@ md_begin ()
continue;
}
/* Create the macro hash table */
/* Create the macro hash table. */
alpha_macro_hash = hash_new ();
for (i = 0; i < alpha_num_macros;)
{
@ -863,11 +869,11 @@ md_begin ()
continue;
}
/* Construct symbols for each of the registers */
/* Construct symbols for each of the registers. */
for (i = 0; i < 32; ++i)
{
char name[4];
sprintf (name, "$%d", i);
alpha_register_table[i] = symbol_create (name, reg_section, i,
&zero_address_frag);
@ -875,12 +881,13 @@ md_begin ()
for (; i < 64; ++i)
{
char name[5];
sprintf (name, "$f%d", i - 32);
alpha_register_table[i] = symbol_create (name, reg_section, i,
&zero_address_frag);
}
/* Create the special symbols and sections we'll be using */
/* Create the special symbols and sections we'll be using. */
/* So .sbss will get used for tiny objects. */
bfd_set_gp_size (stdoutput, g_switch_value);
@ -919,12 +926,12 @@ void
md_assemble (str)
char *str;
{
char opname[32]; /* current maximum is 13 */
char opname[32]; /* Current maximum is 13. */
expressionS tok[MAX_INSN_ARGS];
int ntok, trunclen;
size_t opnamelen;
/* split off the opcode */
/* Split off the opcode. */
opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/46819");
trunclen = (opnamelen < sizeof (opname) - 1
? opnamelen
@ -932,7 +939,7 @@ md_assemble (str)
memcpy (opname, str, trunclen);
opname[trunclen] = '\0';
/* tokenize the rest of the line */
/* Tokenize the rest of the line. */
if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0)
{
if (ntok != TOKENIZE_ERROR_REPORT)
@ -941,7 +948,7 @@ md_assemble (str)
return;
}
/* finish it off */
/* Finish it off. */
assemble_tokens (opname, tok, ntok, alpha_macros_on);
}
@ -963,7 +970,7 @@ md_section_align (seg, size)
of LITTLENUMS emitted is stored in *SIZEP. An error message is
returned, or NULL on OK. */
/* Equal to MAX_PRECISION in atof-ieee.c */
/* Equal to MAX_PRECISION in atof-ieee.c. */
#define MAX_LITTLENUMS 6
extern char *vax_md_atof PARAMS ((int, char *, int *));
@ -1415,11 +1422,11 @@ alpha_define_label (sym)
/* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and
let it get resolved at assembly time. */
#ifdef OBJ_ELF
void
alpha_validate_fix (f)
fixS *f;
{
#ifdef OBJ_ELF
int offset = 0;
const char *name;
@ -1452,8 +1459,8 @@ alpha_validate_fix (f)
f->fx_r_type = BFD_RELOC_23_PCREL_S2;
f->fx_offset += offset;
}
#endif
}
#endif
/* Return true if we must always emit a reloc for a type and false if
there is some hope of resolving it at assembly time. */
@ -1606,7 +1613,7 @@ tc_gen_reloc (sec, fixp)
#ifdef OBJ_ECOFF
if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL)
{
/* fake out bfd_perform_relocation. sigh */
/* Fake out bfd_perform_relocation. sigh. */
reloc->addend = -alpha_gp_value;
}
else
@ -1614,12 +1621,10 @@ tc_gen_reloc (sec, fixp)
{
reloc->addend = fixp->fx_offset;
#ifdef OBJ_ELF
/*
* Ohhh, this is ugly. The problem is that if this is a local global
* symbol, the relocation will entirely be performed at link time, not
* at assembly time. bfd_perform_reloc doesn't know about this sort
* of thing, and as a result we need to fake it out here.
*/
/* Ohhh, this is ugly. The problem is that if this is a local global
symbol, the relocation will entirely be performed at link time, not
at assembly time. bfd_perform_reloc doesn't know about this sort
of thing, and as a result we need to fake it out here. */
if ((S_IS_EXTERN (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)
|| (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE)
|| (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_THREAD_LOCAL))
@ -1757,6 +1762,7 @@ alpha_adjust_symtab_relocs (abfd, sec, ptr)
as_bad_where (fixp->fx_file, fixp->fx_line,
_("No !literal!%ld was found"),
fixp->tc_fix_data.info->sequence);
#ifdef RELOC_OP_P
if (fixp->fx_offset == LITUSE_ALPHA_TLSGD)
{
if (! fixp->tc_fix_data.info->saw_tlsgd)
@ -1771,6 +1777,7 @@ alpha_adjust_symtab_relocs (abfd, sec, ptr)
_("No !tlsldm!%ld was found"),
fixp->tc_fix_data.info->sequence);
}
#endif
break;
case BFD_RELOC_ALPHA_GPDISP_LO16:
@ -1885,6 +1892,7 @@ debug_exp (tok, ntok)
{
expressionS *t = &tok[i];
const char *name;
switch (t->X_op)
{
default: name = "unknown"; break;
@ -1968,15 +1976,17 @@ tokenize_arguments (str, tok, ntok)
#ifdef DEBUG_ALPHA
expressionS *orig_tok = tok;
#endif
#ifdef RELOC_OP_P
char *p;
const struct alpha_reloc_op_tag *r;
int c, i;
size_t len;
int reloc_found_p = 0;
#endif
memset (tok, 0, sizeof (*tok) * ntok);
/* Save and restore input_line_pointer around this function */
/* Save and restore input_line_pointer around this function. */
old_input_line_pointer = input_line_pointer;
input_line_pointer = str;
@ -1999,7 +2009,8 @@ tokenize_arguments (str, tok, ntok)
assembly language statement, and has the following form:
!relocation_type!sequence_number. */
if (reloc_found_p)
{ /* only support one relocation op per insn */
{
/* Only support one relocation op per insn. */
as_bad (_("More than one relocation op per insn"));
goto err_report;
}
@ -2012,7 +2023,7 @@ tokenize_arguments (str, tok, ntok)
p = input_line_pointer;
c = get_symbol_end ();
/* Parse !relocation_type */
/* Parse !relocation_type. */
len = input_line_pointer - p;
if (len == 0)
{
@ -2052,7 +2063,7 @@ tokenize_arguments (str, tok, ntok)
input_line_pointer++;
/* Parse !sequence_number */
/* Parse !sequence_number. */
expression (tok);
if (tok->X_op != O_constant || tok->X_add_number <= 0)
{
@ -2091,7 +2102,7 @@ tokenize_arguments (str, tok, ntok)
break;
}
/* ... then fall through to plain expression */
/* ... then fall through to plain expression. */
input_line_pointer = hold;
}
@ -2131,8 +2142,8 @@ err:
input_line_pointer = old_input_line_pointer;
return TOKENIZE_ERROR;
err_report:
#ifdef RELOC_OP_P
err_report:
is_end_of_line[(unsigned char) '!'] = 0;
#endif
input_line_pointer = old_input_line_pointer;
@ -2158,7 +2169,7 @@ find_opcode_match (first_opcode, tok, pntok, pcpumatch)
const unsigned char *opidx;
int tokidx = 0;
/* Don't match opcodes that don't exist on this architecture */
/* Don't match opcodes that don't exist on this architecture. */
if (!(opcode->flags & alpha_target))
goto match_failed;
@ -2168,11 +2179,11 @@ find_opcode_match (first_opcode, tok, pntok, pcpumatch)
{
const struct alpha_operand *operand = &alpha_operands[*opidx];
/* only take input from real operands */
/* Only take input from real operands. */
if (operand->flags & AXP_OPERAND_FAKE)
continue;
/* when we expect input, make sure we have it */
/* When we expect input, make sure we have it. */
if (tokidx >= ntok)
{
if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0)
@ -2180,7 +2191,7 @@ find_opcode_match (first_opcode, tok, pntok, pcpumatch)
continue;
}
/* match operand type with expression type */
/* Match operand type with expression type. */
switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK)
{
case AXP_OPERAND_IR:
@ -2222,13 +2233,13 @@ find_opcode_match (first_opcode, tok, pntok, pcpumatch)
break;
default:
/* everything else should have been fake */
/* Everything else should have been fake. */
abort ();
}
++tokidx;
}
/* possible match -- did we use all of our input? */
/* Possible match -- did we use all of our input? */
if (tokidx == ntok)
{
*pntok = ntok;
@ -2237,7 +2248,7 @@ find_opcode_match (first_opcode, tok, pntok, pcpumatch)
match_failed:;
}
while (++opcode - alpha_opcodes < alpha_num_opcodes
while (++opcode - alpha_opcodes < (int) alpha_num_opcodes
&& !strcmp (opcode->name, first_opcode->name));
if (*pcpumatch)
@ -2274,7 +2285,7 @@ find_macro_match (first_macro, tok, pntok)
tokidx = 0;
break;
/* index register */
/* Index register. */
case MACRO_IR:
if (tokidx >= ntok || tok[tokidx].X_op != O_register
|| !is_ir_num (tok[tokidx].X_add_number))
@ -2282,7 +2293,7 @@ find_macro_match (first_macro, tok, pntok)
++tokidx;
break;
/* parenthesized index register */
/* Parenthesized index register. */
case MACRO_PIR:
if (tokidx >= ntok || tok[tokidx].X_op != O_pregister
|| !is_ir_num (tok[tokidx].X_add_number))
@ -2290,14 +2301,14 @@ find_macro_match (first_macro, tok, pntok)
++tokidx;
break;
/* optional parenthesized index register */
/* Optional parenthesized index register. */
case MACRO_OPIR:
if (tokidx < ntok && tok[tokidx].X_op == O_pregister
&& is_ir_num (tok[tokidx].X_add_number))
++tokidx;
break;
/* leading comma with a parenthesized index register */
/* Leading comma with a parenthesized index register. */
case MACRO_CPIR:
if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister
|| !is_ir_num (tok[tokidx].X_add_number))
@ -2305,7 +2316,7 @@ find_macro_match (first_macro, tok, pntok)
++tokidx;
break;
/* floating point register */
/* Floating point register. */
case MACRO_FPR:
if (tokidx >= ntok || tok[tokidx].X_op != O_register
|| !is_fpr_num (tok[tokidx].X_add_number))
@ -2313,7 +2324,7 @@ find_macro_match (first_macro, tok, pntok)
++tokidx;
break;
/* normal expression */
/* Normal expression. */
case MACRO_EXP:
if (tokidx >= ntok)
goto match_failed;
@ -2350,7 +2361,7 @@ find_macro_match (first_macro, tok, pntok)
++arg;
}
}
while (++macro - alpha_macros < alpha_num_macros
while (++macro - alpha_macros < (int) alpha_num_macros
&& !strcmp (macro->name, first_macro->name));
return NULL;
@ -2409,10 +2420,8 @@ insert_operand (insn, operand, val, file, line)
return insn;
}
/*
* Turn an opcode description and a set of arguments into
* an instruction and a fixup.
*/
/* Turn an opcode description and a set of arguments into
an instruction and a fixup. */
static void
assemble_insn (opcode, tok, ntok, insn, reloc)
@ -2561,9 +2570,7 @@ assemble_insn (opcode, tok, ntok, insn, reloc)
insn->insn = image;
}
/*
* Actually output an instruction with its fixup.
*/
/* Actually output an instruction with its fixup. */
static void
emit_insn (insn)
@ -2587,7 +2594,7 @@ emit_insn (insn)
dwarf2_emit_insn (4);
#endif
/* Apply the fixups in order */
/* Apply the fixups in order. */
for (i = 0; i < insn->nfixups; ++i)
{
const struct alpha_operand *operand = (const struct alpha_operand *) 0;
@ -2596,7 +2603,7 @@ emit_insn (insn)
int size, pcrel;
fixS *fixP;
/* Some fixups are only used internally and so have no howto */
/* Some fixups are only used internally and so have no howto. */
if ((int) fixup->reloc < 0)
{
operand = &alpha_operands[-(int) fixup->reloc];
@ -2686,6 +2693,7 @@ emit_insn (insn)
fixP->tc_fix_data.info = info;
break;
#ifdef RELOC_OP_P
case DUMMY_RELOC_LITUSE_ADDR:
fixP->fx_offset = LITUSE_ALPHA_ADDR;
goto do_lituse;
@ -2760,7 +2768,7 @@ emit_insn (insn)
info->saw_tlsldm = 1;
fixP->tc_fix_data.info = info;
break;
#endif
default:
if ((int) fixup->reloc < 0)
{
@ -2849,7 +2857,7 @@ assemble_tokens (opname, tok, ntok, local_macros_on)
}
}
/* search opcodes */
/* Search opcodes. */
opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
if (opcode)
{
@ -2881,7 +2889,7 @@ assemble_tokens (opname, tok, ntok, local_macros_on)
as_bad (_("unknown opcode `%s'"), opname);
}
/* Some instruction sets indexed by lg(size) */
/* Some instruction sets indexed by lg(size). */
static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL };
static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" };
static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" };
@ -3052,7 +3060,7 @@ load_expression (targreg, exp, pbasereg, poffset)
#ifdef OBJ_ECOFF
offsetT lit;
/* attempt to reduce .lit load by splitting the offset from
/* Attempt to reduce .lit load by splitting the offset from
its symbol when possible, but don't create a situation in
which we'd fail. */
if (!range_signed_32 (addend) &&
@ -3904,19 +3912,18 @@ emit_division (tok, ntok, symname)
const PTR symname;
{
/* DIVISION and MODULUS. Yech.
*
* Convert
* OP x,y,result
* to
* mov x,R16 # if x != R16
* mov y,R17 # if y != R17
* lda AT,__OP
* jsr AT,(AT),0
* mov R0,result
*
* with appropriate optimizations if R0,R16,R17 are the registers
* specified by the compiler.
*/
Convert
OP x,y,result
to
mov x,R16 # if x != R16
mov y,R17 # if y != R17
lda AT,__OP
jsr AT,(AT),0
mov R0,result
with appropriate optimizations if R0,R16,R17 are the registers
specified by the compiler. */
int xr, yr, rr;
symbolS *sym;
@ -3930,10 +3937,10 @@ emit_division (tok, ntok, symname)
else
rr = regno (tok[2].X_add_number);
/* Move the operands into the right place */
/* Move the operands into the right place. */
if (yr == AXP_REG_R16 && xr == AXP_REG_R17)
{
/* They are in exactly the wrong order -- swap through AT */
/* They are in exactly the wrong order -- swap through AT. */
if (alpha_noat_on)
as_bad (_("macro requires $at register while noat in effect"));
@ -3980,13 +3987,13 @@ emit_division (tok, ntok, symname)
set_tok_sym (newtok[1], sym, 0);
assemble_tokens ("lda", newtok, 2, 1);
/* Call the division routine */
/* Call the division routine. */
set_tok_reg (newtok[0], AXP_REG_AT);
set_tok_cpreg (newtok[1], AXP_REG_AT);
set_tok_const (newtok[2], 0);
assemble_tokens ("jsr", newtok, 3, 1);
/* Move the result to the right place */
/* Move the result to the right place. */
if (rr != AXP_REG_R0)
{
set_tok_reg (newtok[0], AXP_REG_R0);
@ -4004,18 +4011,17 @@ emit_division (tok, ntok, symname)
const PTR symname;
{
/* DIVISION and MODULUS. Yech.
* Convert
* OP x,y,result
* to
* lda pv,__OP
* mov x,t10
* mov y,t11
* jsr t9,(pv),__OP
* mov t12,result
*
* with appropriate optimizations if t10,t11,t12 are the registers
* specified by the compiler.
*/
Convert
OP x,y,result
to
lda pv,__OP
mov x,t10
mov y,t11
jsr t9,(pv),__OP
mov t12,result
with appropriate optimizations if t10,t11,t12 are the registers
specified by the compiler. */
int xr, yr, rr;
symbolS *sym;
@ -4031,11 +4037,10 @@ emit_division (tok, ntok, symname)
sym = symbol_find_or_make ((const char *) symname);
/* Move the operands into the right place */
/* Move the operands into the right place. */
if (yr == AXP_REG_T10 && xr == AXP_REG_T11)
{
/* They are in exactly the wrong order -- swap through AT */
/* They are in exactly the wrong order -- swap through AT. */
if (alpha_noat_on)
as_bad (_("macro requires $at register while noat in effect"));
@ -4075,12 +4080,12 @@ emit_division (tok, ntok, symname)
}
}
/* Call the division routine */
/* Call the division routine. */
set_tok_reg (newtok[0], AXP_REG_T9);
set_tok_sym (newtok[1], sym, 0);
assemble_tokens ("jsr", newtok, 2, 1);
/* Reload the GP register */
/* Reload the GP register. */
#ifdef OBJ_AOUT
FIXME
#endif
@ -4091,7 +4096,7 @@ FIXME
assemble_tokens ("ldgp", newtok, 3, 1);
#endif
/* Move the result to the right place */
/* Move the result to the right place. */
if (rr != AXP_REG_T12)
{
set_tok_reg (newtok[0], AXP_REG_T12);
@ -4199,7 +4204,7 @@ emit_retjcr (tok, ntok, vopname)
assemble_tokens (opname, newtok, 3, 0);
}
/* Assembler directives */
/* Assembler directives. */
/* Handle the .text pseudo-op. This is like the usual one, but it
clears alpha_insn_label and restores auto alignment. */
@ -4243,7 +4248,7 @@ s_alpha_data (i)
static void
s_alpha_comm (ignore)
int ignore;
int ignore ATTRIBUTE_UNUSED;
{
register char *name;
register char c;
@ -4359,7 +4364,7 @@ s_alpha_comm (ignore)
static void
s_alpha_rdata (ignore)
int ignore;
int ignore ATTRIBUTE_UNUSED;
{
int temp;
@ -4380,7 +4385,7 @@ s_alpha_rdata (ignore)
static void
s_alpha_sdata (ignore)
int ignore;
int ignore ATTRIBUTE_UNUSED;
{
int temp;
@ -4400,7 +4405,7 @@ s_alpha_sdata (ignore)
static void
s_alpha_section (ignore)
int ignore;
int ignore ATTRIBUTE_UNUSED;
{
obj_elf_section (ignore);
@ -4682,7 +4687,7 @@ s_alpha_section (secid)
static void
s_alpha_ent (ignore)
int ignore;
int ignore ATTRIBUTE_UNUSED;
{
symbolS *symbol;
expressionS symexpr;
@ -4719,7 +4724,7 @@ s_alpha_ent (ignore)
static void
s_alpha_frame (ignore)
int ignore;
int ignore ATTRIBUTE_UNUSED;
{
long val;
@ -4753,7 +4758,7 @@ s_alpha_frame (ignore)
static void
s_alpha_pdesc (ignore)
int ignore;
int ignore ATTRIBUTE_UNUSED;
{
char *name;
char name_end;
@ -4906,7 +4911,7 @@ s_alpha_pdesc (ignore)
static void
s_alpha_name (ignore)
int ignore;
int ignore ATTRIBUTE_UNUSED;
{
register char *p;
expressionS exp;
@ -4944,7 +4949,7 @@ s_alpha_name (ignore)
static void
s_alpha_linkage (ignore)
int ignore;
int ignore ATTRIBUTE_UNUSED;
{
expressionS exp;
char *p;
@ -4972,7 +4977,7 @@ s_alpha_linkage (ignore)
static void
s_alpha_code_address (ignore)
int ignore;
int ignore ATTRIBUTE_UNUSED;
{
expressionS exp;
char *p;
@ -5000,7 +5005,7 @@ s_alpha_code_address (ignore)
static void
s_alpha_fp_save (ignore)
int ignore;
int ignore ATTRIBUTE_UNUSED;
{
alpha_evax_proc.fp_save = tc_get_register (1);
@ -5011,7 +5016,7 @@ s_alpha_fp_save (ignore)
static void
s_alpha_mask (ignore)
int ignore;
int ignore ATTRIBUTE_UNUSED;
{
long val;
@ -5032,7 +5037,7 @@ s_alpha_mask (ignore)
static void
s_alpha_fmask (ignore)
int ignore;
int ignore ATTRIBUTE_UNUSED;
{
long val;
@ -5053,7 +5058,7 @@ s_alpha_fmask (ignore)
static void
s_alpha_end (ignore)
int ignore;
int ignore ATTRIBUTE_UNUSED;
{
char c;
@ -5067,7 +5072,7 @@ s_alpha_end (ignore)
static void
s_alpha_file (ignore)
int ignore;
int ignore ATTRIBUTE_UNUSED;
{
symbolS *s;
int length;
@ -5587,6 +5592,7 @@ create_literal_section (name, secp, symp)
/* @@@ GP selection voodoo. All of this seems overly complicated and
unnecessary; which is the primary reason it's for ECOFF only. */
static inline void maybe_set_gp PARAMS ((asection *));
static inline void
maybe_set_gp (sec)