Optimize R_386_GOT32/R_386_GOT32X only if addend is 0
Linker can't optimize R_386_GOT32 and R_386_GOT32X relocations if addend isn't 0. It isn't valid to convert movl foo@GOT+1(%ecx), %eax to leal foo@GOTOFF+1(%ecx), %eax nor to convert movq foo@GOTPCREL+1(%rip), %rax to leaq foo(%rip), %rax for x86-64. We should check if addend is 0 before optimizing R_386_GOT32 and R_386_GOT32X relocations. Testcases are added for i386 and x86-64. bfd/ * elf32-i386.c (elf_i386_convert_load): Skip if addend isn't 0. (elf_i386_relocate_section): Skip R_386_GOT32X optimization if addend isn't 0. ld/testsuite/ * ld-i386/i386.exp: Run mov2a, mov2b and mov3. * ld-i386/mov2.s: New file. * ld-i386/mov2a.d: Likewise. * ld-i386/mov2b.d: Likewise. * ld-i386/mov3.d: Likewise. * ld-i386/mov3.s: Likewise. * ld-x86-64/mov2.s: Likewise. * ld-x86-64/mov2a.d: Likewise. * ld-x86-64/mov2b.d: Likewise. * ld-x86-64/mov2c.d: Likewise. * ld-x86-64/mov2d.d: Likewise. * ld-x86-64/x86-64.exp: Run mov2a, mov2b, mov2c and mov2d.
This commit is contained in:
H.J. Lu
parent
f27c5390b2
commit
02e2aef89b
15 changed files with 186 additions and 13 deletions
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@ -1,3 +1,9 @@
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2015-12-04 H.J. Lu <hongjiu.lu@intel.com>
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* elf32-i386.c (elf_i386_convert_load): Skip if addend isn't 0.
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(elf_i386_relocate_section): Skip R_386_GOT32X optimization if
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addend isn't 0.
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2015-12-04 Tristan Gingold <gingold@adacore.com>
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* elf.c (rewrite_elf_program_header): Remove useless loop.
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@ -2820,6 +2820,11 @@ elf_i386_convert_load (bfd *abfd, asection *sec,
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if (roff < 2)
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continue;
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/* Addend for R_386_GOT32 and R_386_GOT32X relocations must be 0. */
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addend = bfd_get_32 (abfd, contents + roff);
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if (addend != 0)
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continue;
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modrm = bfd_get_8 (abfd, contents + roff - 1);
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baseless = (modrm & 0xc7) == 0x5;
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@ -2913,11 +2918,6 @@ elf_i386_convert_load (bfd *abfd, asection *sec,
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{
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/* The function is locally defined. */
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convert_branch:
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addend = bfd_get_32 (abfd, contents + roff);
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/* Addend for R_386_GOT32X relocation must be 0. */
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if (addend != 0)
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continue;
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/* Convert R_386_GOT32X to R_386_PC32. */
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if (modrm == 0x15 || (modrm & 0xf8) == 0x90)
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{
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@ -3007,11 +3007,6 @@ convert_load:
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}
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else
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{
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/* Addend for R_386_GOT32X relocation must be 0. */
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addend = bfd_get_32 (abfd, contents + roff);
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if (addend != 0)
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continue;
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if (opcode == 0x85)
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{
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/* Convert "test %reg1, foo@GOT(%reg2)" to
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@ -3998,8 +3993,11 @@ elf_i386_relocate_section (bfd *output_bfd,
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branch to direct branch. It is OK to convert adc,
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add, and, cmp, or, sbb, sub, test, xor only when PIC
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is false. */
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unsigned int opcode;
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opcode = bfd_get_8 (abfd, contents + rel->r_offset - 2);
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unsigned int opcode, addend;
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addend = bfd_get_32 (input_bfd, contents + rel->r_offset);
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if (addend != 0)
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goto r_386_got32;
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opcode = bfd_get_8 (input_bfd, contents + rel->r_offset - 2);
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if (opcode != 0x8b && opcode != 0xff)
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goto r_386_got32;
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}
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@ -4031,7 +4029,7 @@ elf_i386_relocate_section (bfd *output_bfd,
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/* If not PIC, add the .got.plt section address for
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baseless addressing. */
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unsigned int modrm;
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modrm = bfd_get_8 (abfd, contents + rel->r_offset - 1);
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modrm = bfd_get_8 (input_bfd, contents + rel->r_offset - 1);
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if ((modrm & 0xc7) == 0x5)
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relocation += offplt;
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}
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@ -1,3 +1,16 @@
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2015-12-04 H.J. Lu <hongjiu.lu@intel.com>
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* ld-i386/i386.exp: Run mov2a and mov2b.
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* ld-i386/mov2.s: New file.
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* ld-i386/mov2a.d: Likewise.
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* ld-i386/mov2b.d: Likewise.
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* ld-x86-64/mov2.s: Likewise.
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* ld-x86-64/mov2a.d: Likewise.
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* ld-x86-64/mov2b.d: Likewise.
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* ld-x86-64/mov2c.d: Likewise.
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* ld-x86-64/mov2d.d: Likewise.
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* ld-x86-64/x86-64.exp: Run mov2a, mov2b, mov2c and mov2d.
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2015-12-01 H.J. Lu <hongjiu.lu@intel.com>
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PR ld/19319
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@ -293,6 +293,9 @@ run_dump_test "lea1e"
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run_dump_test "lea1f"
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run_dump_test "mov1a"
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run_dump_test "mov1b"
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run_dump_test "mov2a"
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run_dump_test "mov2b"
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run_dump_test "mov3"
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run_dump_test "branch1"
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run_dump_test "call1"
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run_dump_test "call2"
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15
ld/testsuite/ld-i386/mov2.s
Normal file
15
ld/testsuite/ld-i386/mov2.s
Normal file
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@ -0,0 +1,15 @@
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.section my_section,"aw",@progbits
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.long 0x12345678
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.text
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.globl foo
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.type foo, @function
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foo:
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ret
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.size foo, .-foo
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.globl _start
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.type _start, @function
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_start:
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movl foo@GOT+1(%ecx), %eax
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movl __start_my_section@GOT+1(%ecx), %eax
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movl __stop_my_section@GOT+1(%ecx), %eax
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.size _start, .-_start
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15
ld/testsuite/ld-i386/mov2a.d
Normal file
15
ld/testsuite/ld-i386/mov2a.d
Normal file
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@ -0,0 +1,15 @@
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#source: mov2.s
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#as: --32
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#ld: -shared -melf_i386
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#objdump: -dw
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.*: +file format .*
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Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
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[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
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[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
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#pass
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15
ld/testsuite/ld-i386/mov2b.d
Normal file
15
ld/testsuite/ld-i386/mov2b.d
Normal file
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@ -0,0 +1,15 @@
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#source: mov2.s
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#as: --32
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#ld: -pie -melf_i386
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#objdump: -dw
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.*: +file format .*
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Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
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[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
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[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
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#pass
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14
ld/testsuite/ld-i386/mov3.d
Normal file
14
ld/testsuite/ld-i386/mov3.d
Normal file
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@ -0,0 +1,14 @@
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#as: --32
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#ld: -melf_i386
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#objdump: -dw
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.*: +file format .*
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Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\,%eax
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[ ]*[a-f0-9]+: 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\,%eax
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[ ]*[a-f0-9]+: 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\,%eax
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#pass
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15
ld/testsuite/ld-i386/mov3.s
Normal file
15
ld/testsuite/ld-i386/mov3.s
Normal file
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@ -0,0 +1,15 @@
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.section my_section,"aw",@progbits
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.long 0x12345678
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.text
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.globl foo
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.type foo, @function
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foo:
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ret
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.size foo, .-foo
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.globl _start
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.type _start, @function
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_start:
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movl foo@GOT+1, %eax
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movl __start_my_section@GOT+1, %eax
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movl __stop_my_section@GOT+1, %eax
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.size _start, .-_start
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15
ld/testsuite/ld-x86-64/mov2.s
Normal file
15
ld/testsuite/ld-x86-64/mov2.s
Normal file
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@ -0,0 +1,15 @@
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.section my_section,"aw",@progbits
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.long 0x12345678
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.text
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.globl foo
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.type foo, @function
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foo:
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ret
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.size foo, .-foo
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.globl _start
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.type _start, @function
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_start:
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movq foo@GOTPCREL+1(%rip), %rax
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movq __start_my_section@GOTPCREL+1(%rip), %rax
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movq __stop_my_section@GOTPCREL+1(%rip), %rax
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.size _start, .-_start
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15
ld/testsuite/ld-x86-64/mov2a.d
Normal file
15
ld/testsuite/ld-x86-64/mov2a.d
Normal file
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@ -0,0 +1,15 @@
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#source: mov2.s
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#as: --64
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#ld: -shared -melf_x86_64
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#objdump: -dw
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.*: +file format .*
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Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
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[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
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[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
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#pass
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15
ld/testsuite/ld-x86-64/mov2b.d
Normal file
15
ld/testsuite/ld-x86-64/mov2b.d
Normal file
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@ -0,0 +1,15 @@
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#source: mov2.s
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#as: --64
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#ld: -pie -melf_x86_64
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#objdump: -dw
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.*: +file format .*
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Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
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[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
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[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
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#pass
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15
ld/testsuite/ld-x86-64/mov2c.d
Normal file
15
ld/testsuite/ld-x86-64/mov2c.d
Normal file
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@ -0,0 +1,15 @@
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#source: mov2.s
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#as: --x32
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#ld: -shared -melf32_x86_64
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#objdump: -dw
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.*: +file format .*
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Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
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[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
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[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
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#pass
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15
ld/testsuite/ld-x86-64/mov2d.d
Normal file
15
ld/testsuite/ld-x86-64/mov2d.d
Normal file
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@ -0,0 +1,15 @@
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#source: mov2.s
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#as: --x32
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#ld: -pie -melf32_x86_64
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#objdump: -dw
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.*: +file format .*
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Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
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[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
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[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
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#pass
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@ -321,6 +321,10 @@ run_dump_test "mov1a"
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run_dump_test "mov1b"
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run_dump_test "mov1c"
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run_dump_test "mov1d"
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run_dump_test "mov2a"
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run_dump_test "mov2b"
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run_dump_test "mov2c"
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run_dump_test "mov2d"
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run_dump_test "load1a"
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run_dump_test "load1b"
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run_dump_test "load1c"
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