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[include/elf]

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* mips.h (E_MIPS_MACH_4120, E_MIPS_MACH_5400, E_MIPS_MACH_5500): New.

[bfd/]
	* archures.c (bfd_mach_mips4120, bfd_mach_mips5400): New.
	(bfd_mach_mips5500): New.
	* cpu-mips.c (I_mips4120, I_mips5400, I_mips5500): New.
	(arch_info_struct): Add corresponding entries here.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_4120,
	E_MIPS_MACH_5400 and E_MIPS_MACH_5500.
	(_bfd_mips_elf_final_write_processing): Handle bfd_mach_mips4120,
	bfd_mach_mips5400 and bfd_mach_mips5500.
	(_bfd_mips_elf_mach_extends_p): New function.
	(_bfd_mips_elf_merge_private_bfd_data): Use it to help merge
	the EF_MIPS_MACH flags.
	* bfd-in2.h: Regenerate.
This commit is contained in:
Richard Sandiford 2002-09-30 11:53:56 +00:00
parent 82a9b2d95c
commit 00707a0e89
7 changed files with 92 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

19
bfd/ChangeLog
View file

@ -1,3 +1,22 @@
2002-09-30 Gavin Romig-Koch <gavin@redhat.com>
Ken Raeburn <raeburn@cygnus.com>
Aldy Hernandez <aldyh@redhat.com>
Eric Christopher <echristo@redhat.com>
Richard Sandiford <rsandifo@redhat.com>
* archures.c (bfd_mach_mips4120, bfd_mach_mips5400): New.
(bfd_mach_mips5500): New.
* cpu-mips.c (I_mips4120, I_mips5400, I_mips5500): New.
(arch_info_struct): Add corresponding entries here.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_4120,
E_MIPS_MACH_5400 and E_MIPS_MACH_5500.
(_bfd_mips_elf_final_write_processing): Handle bfd_mach_mips4120,
bfd_mach_mips5400 and bfd_mach_mips5500.
(_bfd_mips_elf_mach_extends_p): New function.
(_bfd_mips_elf_merge_private_bfd_data): Use it to help merge
the EF_MIPS_MACH flags.
* bfd-in2.h: Regenerate.
2002-09-28 Jason Thorpe <thorpej@wasabisystems.com>
* elf32-vax.c (elf_vax_size_dynamic_section): Don't strip

3
bfd/archures.c
View file

@ -129,11 +129,14 @@ DESCRIPTION
.#define bfd_mach_mips4010 4010
.#define bfd_mach_mips4100 4100
.#define bfd_mach_mips4111 4111
.#define bfd_mach_mips4120 4120
.#define bfd_mach_mips4300 4300
.#define bfd_mach_mips4400 4400
.#define bfd_mach_mips4600 4600
.#define bfd_mach_mips4650 4650
.#define bfd_mach_mips5000 5000
.#define bfd_mach_mips5400 5400
.#define bfd_mach_mips5500 5500
.#define bfd_mach_mips6000 6000
.#define bfd_mach_mips8000 8000
.#define bfd_mach_mips10000 10000

3
bfd/bfd-in2.h
View file

@ -1524,11 +1524,14 @@ enum bfd_architecture
#define bfd_mach_mips4010 4010
#define bfd_mach_mips4100 4100
#define bfd_mach_mips4111 4111
#define bfd_mach_mips4120 4120
#define bfd_mach_mips4300 4300
#define bfd_mach_mips4400 4400
#define bfd_mach_mips4600 4600
#define bfd_mach_mips4650 4650
#define bfd_mach_mips5000 5000
#define bfd_mach_mips5400 5400
#define bfd_mach_mips5500 5500
#define bfd_mach_mips6000 6000
#define bfd_mach_mips8000 8000
#define bfd_mach_mips10000 10000

6
bfd/cpu-mips.c
View file

@ -67,11 +67,14 @@ enum
I_mips4010,
I_mips4100,
I_mips4111,
I_mips4120,
I_mips4300,
I_mips4400,
I_mips4600,
I_mips4650,
I_mips5000,
I_mips5400,
I_mips5500,
I_mips6000,
I_mips8000,
I_mips10000,
@ -93,11 +96,14 @@ static const bfd_arch_info_type arch_info_struct[] =
N (64, 64, bfd_mach_mips4010, "mips:4010", false, NN(I_mips4010)),
N (64, 64, bfd_mach_mips4100, "mips:4100", false, NN(I_mips4100)),
N (64, 64, bfd_mach_mips4111, "mips:4111", false, NN(I_mips4111)),
N (64, 64, bfd_mach_mips4120, "mips:4120", false, NN(I_mips4120)),
N (64, 64, bfd_mach_mips4300, "mips:4300", false, NN(I_mips4300)),
N (64, 64, bfd_mach_mips4400, "mips:4400", false, NN(I_mips4400)),
N (64, 64, bfd_mach_mips4600, "mips:4600", false, NN(I_mips4600)),
N (64, 64, bfd_mach_mips4650, "mips:4650", false, NN(I_mips4650)),
N (64, 64, bfd_mach_mips5000, "mips:5000", false, NN(I_mips5000)),
N (64, 64, bfd_mach_mips5400, "mips:5400", false, NN(I_mips5400)),
N (64, 64, bfd_mach_mips5500, "mips:5500", false, NN(I_mips5500)),
N (32, 32, bfd_mach_mips6000, "mips:6000", false, NN(I_mips6000)),
N (64, 64, bfd_mach_mips8000, "mips:8000", false, NN(I_mips8000)),
N (64, 64, bfd_mach_mips10000,"mips:10000", false, NN(I_mips10000)),

56
bfd/elfxx-mips.c
View file

@ -364,6 +364,7 @@ static INLINE int elf_mips_isa PARAMS ((flagword));
static INLINE char* elf_mips_abi_name PARAMS ((bfd *));
static void mips_elf_irix6_finish_dynamic_symbol
PARAMS ((bfd *, const char *, Elf_Internal_Sym *));
static boolean _bfd_mips_elf_mach_extends_p PARAMS ((flagword, flagword));
/* This will be used when we sort the dynamic relocation records. */
static bfd *reldyn_sorting_bfd;
@ -3058,9 +3059,18 @@ _bfd_elf_mips_mach (flags)
case E_MIPS_MACH_4111:
return bfd_mach_mips4111;
case E_MIPS_MACH_4120:
return bfd_mach_mips4120;
case E_MIPS_MACH_4650:
return bfd_mach_mips4650;
case E_MIPS_MACH_5400:
return bfd_mach_mips5400;
case E_MIPS_MACH_5500:
return bfd_mach_mips5500;
case E_MIPS_MACH_SB1:
return bfd_mach_mips_sb1;
@ -5935,10 +5945,22 @@ _bfd_mips_elf_final_write_processing (abfd, linker)
val = E_MIPS_ARCH_3 | E_MIPS_MACH_4111;
break;
case bfd_mach_mips4120:
val = E_MIPS_ARCH_3 | E_MIPS_MACH_4120;
break;
case bfd_mach_mips4650:
val = E_MIPS_ARCH_3 | E_MIPS_MACH_4650;
break;
case bfd_mach_mips5400:
val = E_MIPS_ARCH_4 | E_MIPS_MACH_5400;
break;
case bfd_mach_mips5500:
val = E_MIPS_ARCH_4 | E_MIPS_MACH_5500;
break;
case bfd_mach_mips5000:
case bfd_mach_mips8000:
case bfd_mach_mips10000:
@ -7637,6 +7659,26 @@ _bfd_mips_elf_final_link (abfd, info)
return true;
}
/* Return true if machine EXTENSION is an extension of machine BASE,
meaning that it should be safe to link code for the two machines
and set the output machine to EXTENSION. EXTENSION and BASE are
both submasks of EF_MIPS_MACH. */
static boolean
_bfd_mips_elf_mach_extends_p (base, extension)
flagword base, extension;
{
/* The vr5500 ISA is an extension of the core vr5400 ISA, but doesn't
include the multimedia stuff. It seems better to allow vr5400
and vr5500 code to be merged anyway, since many libraries will
just use the core ISA. Perhaps we could add some sort of ASE
flag if this ever proves a problem. */
return (base == 0
|| (base == E_MIPS_MACH_5400 && extension == E_MIPS_MACH_5500)
|| (base == E_MIPS_MACH_4100 && extension == E_MIPS_MACH_4111)
|| (base == E_MIPS_MACH_4100 && extension == E_MIPS_MACH_4120));
}
/* Merge backend specific data from an object file to the output
object file when linking. */
@ -7743,10 +7785,9 @@ _bfd_mips_elf_merge_private_bfd_data (ibfd, obfd)
/* If either has no machine specified, just compare the general isa's.
Some combinations of machines are ok, if the isa's match. */
if (! new_mach
|| ! old_mach
|| new_mach == old_mach
)
if (new_mach == old_mach
|| _bfd_mips_elf_mach_extends_p (new_mach, old_mach)
|| _bfd_mips_elf_mach_extends_p (old_mach, new_mach))
{
/* Don't warn about mixing code using 32-bit ISAs, or mixing code
using 64-bit ISAs. They will normally use the same data sizes
@ -7763,8 +7804,11 @@ _bfd_mips_elf_merge_private_bfd_data (ibfd, obfd)
else
{
/* Do we need to update the mach field? */
if (old_mach == 0 && new_mach != 0)
elf_elfheader (obfd)->e_flags |= new_mach;
if (_bfd_mips_elf_mach_extends_p (old_mach, new_mach))
{
elf_elfheader (obfd)->e_flags &= ~EF_MIPS_MACH;
elf_elfheader (obfd)->e_flags |= new_mach;
}
/* Do we need to update the ISA field? */
if (new_isa > old_isa)

8
include/elf/ChangeLog
View file

@ -1,3 +1,11 @@
2002-09-30 Gavin Romig-Koch <gavin@redhat.com>
Ken Raeburn <raeburn@cygnus.com>
Aldy Hernandez <aldyh@redhat.com>
Eric Christopher <echristo@redhat.com>
Richard Sandiford <rsandifo@redhat.com>
* mips.h (E_MIPS_MACH_4120, E_MIPS_MACH_5400, E_MIPS_MACH_5500): New.
2002-09-12 Roland McGrath <roland@redhat.com>
* dwarf2.h: Updates from GCC version of thie file:

3
include/elf/mips.h
View file

@ -175,8 +175,11 @@ END_RELOC_NUMBERS (R_MIPS_maxext)
#define E_MIPS_MACH_4010 0x00820000
#define E_MIPS_MACH_4100 0x00830000
#define E_MIPS_MACH_4650 0x00850000
#define E_MIPS_MACH_4120 0x00870000
#define E_MIPS_MACH_4111 0x00880000
#define E_MIPS_MACH_SB1 0x008a0000
#define E_MIPS_MACH_5400 0x00910000
#define E_MIPS_MACH_5500 0x00980000
/* Processor specific section indices. These sections do not actually
exist. Symbols with a st_shndx field corresponding to one of these