old-cross-binutils/gdb/testsuite/gdb.arch/amd64-pseudo.c

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Support x86 pseudo byte, word and dword registers. gdb/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * amd64-tdep.c (amd64_byte_names): New. (amd64_word_names): Likewise. (amd64_dword_names): Likewise. (amd64_pseudo_register_name): Likewise. (amd64_pseudo_register_read): Likewise. (amd64_pseudo_register_write): Likewise. (amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs and num_mmx_regs. Call set_gdbarch_pseudo_register_read, set_gdbarch_pseudo_register_write and set_tdesc_pseudo_register_name. Don't call set_gdbarch_num_pseudo_regs. Don't set mm0_regnum. * i386-tdep.c (i386_num_mmx_regs): Removed. (i386_num_pseudo_regs): Likewise. (i386_byte_names): New. (i386_word_names): Likewise. (i386_byte_regnum_p): Likewise. (i386_word_regnum_p): Likewise. (i386_mmx_regnum_p): Updated. (i386_pseudo_register_name): Make it global. Handle byte and word pseudo-registers. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. (i386_pseudo_register_type): Handle byte, word and dword pseudo-registers (i386_register_reggroup_p): Don't include pseudo registers, except for MXX, in any register groups. Don't include pseudo byte, word, dword registers in general_reggroup. (i386_gdbarch_init): Set num_byte_regs, num_word_regs, num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX pseudo-registers after word pseudo-registers. Call set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi. * i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs, al_regnum, num_word_regs, ax_regnum, num_dword_regs and eax_regnum. (i386_byte_regnum_p): New. (i386_word_regnum_p): Likewise. (i386_dword_regnum_p): Likewise. (i386_pseudo_register_name): Likewise. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. gdb/testsuite/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * gdb.arch/amd64-byte.exp: New. * gdb.arch/amd64-dword.exp: Likewise. * gdb.arch/amd64-pseudo.c: Likewise. * gdb.arch/amd64-word.exp: Likewise. * gdb.arch/i386-byte.exp: Likewise. * gdb.arch/i386-pseudo.c: Likewise. * gdb.arch/i386-word.exp: Likewise.
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/* Test program for byte registers.
Copyright 2010-2014 Free Software Foundation, Inc.
Support x86 pseudo byte, word and dword registers. gdb/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * amd64-tdep.c (amd64_byte_names): New. (amd64_word_names): Likewise. (amd64_dword_names): Likewise. (amd64_pseudo_register_name): Likewise. (amd64_pseudo_register_read): Likewise. (amd64_pseudo_register_write): Likewise. (amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs and num_mmx_regs. Call set_gdbarch_pseudo_register_read, set_gdbarch_pseudo_register_write and set_tdesc_pseudo_register_name. Don't call set_gdbarch_num_pseudo_regs. Don't set mm0_regnum. * i386-tdep.c (i386_num_mmx_regs): Removed. (i386_num_pseudo_regs): Likewise. (i386_byte_names): New. (i386_word_names): Likewise. (i386_byte_regnum_p): Likewise. (i386_word_regnum_p): Likewise. (i386_mmx_regnum_p): Updated. (i386_pseudo_register_name): Make it global. Handle byte and word pseudo-registers. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. (i386_pseudo_register_type): Handle byte, word and dword pseudo-registers (i386_register_reggroup_p): Don't include pseudo registers, except for MXX, in any register groups. Don't include pseudo byte, word, dword registers in general_reggroup. (i386_gdbarch_init): Set num_byte_regs, num_word_regs, num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX pseudo-registers after word pseudo-registers. Call set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi. * i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs, al_regnum, num_word_regs, ax_regnum, num_dword_regs and eax_regnum. (i386_byte_regnum_p): New. (i386_word_regnum_p): Likewise. (i386_dword_regnum_p): Likewise. (i386_pseudo_register_name): Likewise. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. gdb/testsuite/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * gdb.arch/amd64-byte.exp: New. * gdb.arch/amd64-dword.exp: Likewise. * gdb.arch/amd64-pseudo.c: Likewise. * gdb.arch/amd64-word.exp: Likewise. * gdb.arch/i386-byte.exp: Likewise. * gdb.arch/i386-pseudo.c: Likewise. * gdb.arch/i386-word.exp: Likewise.
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This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include <stdio.h>
int data[] = {
0x14131211,
0x24232221,
0x34333231,
0x44434241,
0x54535251,
0x64636261,
0x74737271,
0x84838281,
0x94939291,
0xa4a3a2a1,
0xb4b3b2b1,
0xc4c3c2c1,
0xd4d3d2d1,
0xe4e3e2e1,
};
int
main (int argc, char **argv)
{
register int eax asm ("eax");
register int ebx asm ("ebx");
register int ecx asm ("ecx");
register int edx asm ("edx");
register int esi asm ("esi");
register int edi asm ("edi");
register long r8 asm ("r8");
register long r9 asm ("r9");
register long r10 asm ("r10");
register long r11 asm ("r11");
register long r12 asm ("r12");
register long r13 asm ("r13");
register long r14 asm ("r14");
register long r15 asm ("r15");
Support x86 pseudo byte, word and dword registers. gdb/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * amd64-tdep.c (amd64_byte_names): New. (amd64_word_names): Likewise. (amd64_dword_names): Likewise. (amd64_pseudo_register_name): Likewise. (amd64_pseudo_register_read): Likewise. (amd64_pseudo_register_write): Likewise. (amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs and num_mmx_regs. Call set_gdbarch_pseudo_register_read, set_gdbarch_pseudo_register_write and set_tdesc_pseudo_register_name. Don't call set_gdbarch_num_pseudo_regs. Don't set mm0_regnum. * i386-tdep.c (i386_num_mmx_regs): Removed. (i386_num_pseudo_regs): Likewise. (i386_byte_names): New. (i386_word_names): Likewise. (i386_byte_regnum_p): Likewise. (i386_word_regnum_p): Likewise. (i386_mmx_regnum_p): Updated. (i386_pseudo_register_name): Make it global. Handle byte and word pseudo-registers. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. (i386_pseudo_register_type): Handle byte, word and dword pseudo-registers (i386_register_reggroup_p): Don't include pseudo registers, except for MXX, in any register groups. Don't include pseudo byte, word, dword registers in general_reggroup. (i386_gdbarch_init): Set num_byte_regs, num_word_regs, num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX pseudo-registers after word pseudo-registers. Call set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi. * i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs, al_regnum, num_word_regs, ax_regnum, num_dword_regs and eax_regnum. (i386_byte_regnum_p): New. (i386_word_regnum_p): Likewise. (i386_dword_regnum_p): Likewise. (i386_pseudo_register_name): Likewise. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. gdb/testsuite/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * gdb.arch/amd64-byte.exp: New. * gdb.arch/amd64-dword.exp: Likewise. * gdb.arch/amd64-pseudo.c: Likewise. * gdb.arch/amd64-word.exp: Likewise. * gdb.arch/i386-byte.exp: Likewise. * gdb.arch/i386-pseudo.c: Likewise. * gdb.arch/i386-word.exp: Likewise.
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asm ("mov 0(%0), %%eax\n\t"
"mov 4(%0), %%ebx\n\t"
"mov 8(%0), %%ecx\n\t"
"mov 12(%0), %%edx\n\t"
"mov 16(%0), %%esi\n\t"
"mov 20(%0), %%edi\n\t"
: /* no output operands */
: "r" (data)
: "eax", "ebx", "ecx", "edx", "esi", "edi");
asm ("nop"); /* first breakpoint here */
asm ("mov 24(%0), %%r8d\n\t"
"mov 28(%0), %%r9d\n\t"
"mov 32(%0), %%r10d\n\t"
"mov 36(%0), %%r11\n\t"
"mov 40(%0), %%r12d\n\t"
"mov 44(%0), %%r13d\n\t"
"mov 48(%0), %%r14d\n\t"
"mov 52(%0), %%r15d\n\t"
: /* no output operands */
: "r" (data)
: "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15");
asm ("nop" /* second breakpoint here */
/* amd64-{byte,word,dword}.exp write eax-edi here.
Tell gcc/clang they're live. */
: "=r" (eax), "=r" (ebx), "=r" (ecx),
"=r" (edx), "=r" (esi), "=r" (edi)
: /* no inputs */);
Support x86 pseudo byte, word and dword registers. gdb/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * amd64-tdep.c (amd64_byte_names): New. (amd64_word_names): Likewise. (amd64_dword_names): Likewise. (amd64_pseudo_register_name): Likewise. (amd64_pseudo_register_read): Likewise. (amd64_pseudo_register_write): Likewise. (amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs and num_mmx_regs. Call set_gdbarch_pseudo_register_read, set_gdbarch_pseudo_register_write and set_tdesc_pseudo_register_name. Don't call set_gdbarch_num_pseudo_regs. Don't set mm0_regnum. * i386-tdep.c (i386_num_mmx_regs): Removed. (i386_num_pseudo_regs): Likewise. (i386_byte_names): New. (i386_word_names): Likewise. (i386_byte_regnum_p): Likewise. (i386_word_regnum_p): Likewise. (i386_mmx_regnum_p): Updated. (i386_pseudo_register_name): Make it global. Handle byte and word pseudo-registers. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. (i386_pseudo_register_type): Handle byte, word and dword pseudo-registers (i386_register_reggroup_p): Don't include pseudo registers, except for MXX, in any register groups. Don't include pseudo byte, word, dword registers in general_reggroup. (i386_gdbarch_init): Set num_byte_regs, num_word_regs, num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX pseudo-registers after word pseudo-registers. Call set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi. * i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs, al_regnum, num_word_regs, ax_regnum, num_dword_regs and eax_regnum. (i386_byte_regnum_p): New. (i386_word_regnum_p): Likewise. (i386_dword_regnum_p): Likewise. (i386_pseudo_register_name): Likewise. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. gdb/testsuite/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * gdb.arch/amd64-byte.exp: New. * gdb.arch/amd64-dword.exp: Likewise. * gdb.arch/amd64-pseudo.c: Likewise. * gdb.arch/amd64-word.exp: Likewise. * gdb.arch/i386-byte.exp: Likewise. * gdb.arch/i386-pseudo.c: Likewise. * gdb.arch/i386-word.exp: Likewise.
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asm ("mov %%eax, 0(%0)\n\t"
"mov %%ebx, 4(%0)\n\t"
"mov %%ecx, 8(%0)\n\t"
"mov %%edx, 12(%0)\n\t"
"mov %%esi, 16(%0)\n\t"
"mov %%edi, 20(%0)\n\t"
: /* no output operands */
: "r" (data),
/* Mark these as inputs so that gcc/clang won't try to use them as
a temp to build %0. */
"r" (eax), "r" (ebx), "r" (ecx),
"r" (edx), "r" (esi), "r" (edi));
Support x86 pseudo byte, word and dword registers. gdb/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * amd64-tdep.c (amd64_byte_names): New. (amd64_word_names): Likewise. (amd64_dword_names): Likewise. (amd64_pseudo_register_name): Likewise. (amd64_pseudo_register_read): Likewise. (amd64_pseudo_register_write): Likewise. (amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs and num_mmx_regs. Call set_gdbarch_pseudo_register_read, set_gdbarch_pseudo_register_write and set_tdesc_pseudo_register_name. Don't call set_gdbarch_num_pseudo_regs. Don't set mm0_regnum. * i386-tdep.c (i386_num_mmx_regs): Removed. (i386_num_pseudo_regs): Likewise. (i386_byte_names): New. (i386_word_names): Likewise. (i386_byte_regnum_p): Likewise. (i386_word_regnum_p): Likewise. (i386_mmx_regnum_p): Updated. (i386_pseudo_register_name): Make it global. Handle byte and word pseudo-registers. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. (i386_pseudo_register_type): Handle byte, word and dword pseudo-registers (i386_register_reggroup_p): Don't include pseudo registers, except for MXX, in any register groups. Don't include pseudo byte, word, dword registers in general_reggroup. (i386_gdbarch_init): Set num_byte_regs, num_word_regs, num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX pseudo-registers after word pseudo-registers. Call set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi. * i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs, al_regnum, num_word_regs, ax_regnum, num_dword_regs and eax_regnum. (i386_byte_regnum_p): New. (i386_word_regnum_p): Likewise. (i386_dword_regnum_p): Likewise. (i386_pseudo_register_name): Likewise. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. gdb/testsuite/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * gdb.arch/amd64-byte.exp: New. * gdb.arch/amd64-dword.exp: Likewise. * gdb.arch/amd64-pseudo.c: Likewise. * gdb.arch/amd64-word.exp: Likewise. * gdb.arch/i386-byte.exp: Likewise. * gdb.arch/i386-pseudo.c: Likewise. * gdb.arch/i386-word.exp: Likewise.
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asm ("nop" /* third breakpoint here */
/* amd64-{byte,word,dword}.exp write r8-r15 here.
Tell gcc/clang they're live. */
: "=r" (r8), "=r" (r9), "=r" (r10), "=r" (r11),
"=r" (r12), "=r" (r13), "=r" (r14), "=r" (r15)
: /* no inputs */);
Support x86 pseudo byte, word and dword registers. gdb/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * amd64-tdep.c (amd64_byte_names): New. (amd64_word_names): Likewise. (amd64_dword_names): Likewise. (amd64_pseudo_register_name): Likewise. (amd64_pseudo_register_read): Likewise. (amd64_pseudo_register_write): Likewise. (amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs and num_mmx_regs. Call set_gdbarch_pseudo_register_read, set_gdbarch_pseudo_register_write and set_tdesc_pseudo_register_name. Don't call set_gdbarch_num_pseudo_regs. Don't set mm0_regnum. * i386-tdep.c (i386_num_mmx_regs): Removed. (i386_num_pseudo_regs): Likewise. (i386_byte_names): New. (i386_word_names): Likewise. (i386_byte_regnum_p): Likewise. (i386_word_regnum_p): Likewise. (i386_mmx_regnum_p): Updated. (i386_pseudo_register_name): Make it global. Handle byte and word pseudo-registers. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. (i386_pseudo_register_type): Handle byte, word and dword pseudo-registers (i386_register_reggroup_p): Don't include pseudo registers, except for MXX, in any register groups. Don't include pseudo byte, word, dword registers in general_reggroup. (i386_gdbarch_init): Set num_byte_regs, num_word_regs, num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX pseudo-registers after word pseudo-registers. Call set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi. * i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs, al_regnum, num_word_regs, ax_regnum, num_dword_regs and eax_regnum. (i386_byte_regnum_p): New. (i386_word_regnum_p): Likewise. (i386_dword_regnum_p): Likewise. (i386_pseudo_register_name): Likewise. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. gdb/testsuite/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * gdb.arch/amd64-byte.exp: New. * gdb.arch/amd64-dword.exp: Likewise. * gdb.arch/amd64-pseudo.c: Likewise. * gdb.arch/amd64-word.exp: Likewise. * gdb.arch/i386-byte.exp: Likewise. * gdb.arch/i386-pseudo.c: Likewise. * gdb.arch/i386-word.exp: Likewise.
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asm ("mov %%r8d, 24(%0)\n\t"
"mov %%r9d, 28(%0)\n\t"
"mov %%r10d, 32(%0)\n\t"
"mov %%r11d, 36(%0)\n\t"
"mov %%r12d, 40(%0)\n\t"
"mov %%r13d, 44(%0)\n\t"
"mov %%r14d, 48(%0)\n\t"
"mov %%r15d, 52(%0)\n\t"
: /* no output operands */
: "r" (data),
/* Mark these as inputs so that gcc/clang won't try to use them as
a temp to build %0. */
"r" (r8), "r" (r9), "r" (r10), "r" (r11),
"r" (r12), "r" (r13), "r" (r14), "r" (r15));
Support x86 pseudo byte, word and dword registers. gdb/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * amd64-tdep.c (amd64_byte_names): New. (amd64_word_names): Likewise. (amd64_dword_names): Likewise. (amd64_pseudo_register_name): Likewise. (amd64_pseudo_register_read): Likewise. (amd64_pseudo_register_write): Likewise. (amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs and num_mmx_regs. Call set_gdbarch_pseudo_register_read, set_gdbarch_pseudo_register_write and set_tdesc_pseudo_register_name. Don't call set_gdbarch_num_pseudo_regs. Don't set mm0_regnum. * i386-tdep.c (i386_num_mmx_regs): Removed. (i386_num_pseudo_regs): Likewise. (i386_byte_names): New. (i386_word_names): Likewise. (i386_byte_regnum_p): Likewise. (i386_word_regnum_p): Likewise. (i386_mmx_regnum_p): Updated. (i386_pseudo_register_name): Make it global. Handle byte and word pseudo-registers. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. (i386_pseudo_register_type): Handle byte, word and dword pseudo-registers (i386_register_reggroup_p): Don't include pseudo registers, except for MXX, in any register groups. Don't include pseudo byte, word, dword registers in general_reggroup. (i386_gdbarch_init): Set num_byte_regs, num_word_regs, num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX pseudo-registers after word pseudo-registers. Call set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi. * i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs, al_regnum, num_word_regs, ax_regnum, num_dword_regs and eax_regnum. (i386_byte_regnum_p): New. (i386_word_regnum_p): Likewise. (i386_dword_regnum_p): Likewise. (i386_pseudo_register_name): Likewise. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. gdb/testsuite/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * gdb.arch/amd64-byte.exp: New. * gdb.arch/amd64-dword.exp: Likewise. * gdb.arch/amd64-pseudo.c: Likewise. * gdb.arch/amd64-word.exp: Likewise. * gdb.arch/i386-byte.exp: Likewise. * gdb.arch/i386-pseudo.c: Likewise. * gdb.arch/i386-word.exp: Likewise.
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puts ("Bye!"); /* forth breakpoint here */
return 0;
}