1997-09-16 14:00:15 +00:00
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Tue Sep 16 22:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* simops.c (trace_output): Add result argument.
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(trace_result): New function. Simpler version of trace_output,
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assumes trace needed.
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(trace_output): Call trace_result.
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(trace_output): For IMM_REG_REG, trace correct register.
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(trace_input): Add case for 16bit immediates.
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(OP_600, OP_640, OP_680, OP_6C0, OP_6A0): Use.
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* sim-main.h (TRACE_ALU_INPUT, TRACE_ALU_RESULT): Define.
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(trace_values, trace_name, trace_pc, trace_num_values): Make
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global.
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(GR, SR): Define.
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v850.insn (movea, stsr): Use.
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start-sanitize-v850e
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(sxb, sxh, zxb, zxh): Ditto.
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end-sanitize-v850e
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Tue Sep 16 21:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* simops.c: Move "movea" from here.
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* v850.igen: To here.
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* v850.igen (simm16): Define, sign extend imm16.
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(uimm16): Define, no sign extension.
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(addi, andi, movea, movhi, mulhi, ori, satsubi, xori): Use.
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start-sanitize-v850e
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* simops.c: Move "sxh", "switch", "sxb", "callt", "dispose",
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"mov32" from here.
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* v850.igen: To here.
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(switch): Fix off by two error in NIA calc.
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end-sanitize-v850e
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1997-09-16 07:03:41 +00:00
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Tue Sep 16 15:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* simops.c (trace_pc, trace_name, trace_values, trace_num_values):
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New static globals.
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(trace_input): Just save pc, name and values for trace_output.
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(trace_output): Write trace values to a buffer. Use
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trace_one_insn to print trace info and buffer.
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(SIZE_OPERANDS, SIZE_LOCATION): Delete.
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1997-09-16 04:49:24 +00:00
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Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* sim-main.h (struct _sim_cpu): Add psw_mask so that reserved bits
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can be masked out.
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* simops.c (OP_2007E0, OP_4007E0): Move "ldsr", "stsr"
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instructions from here.
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* v850.igen (ldsr, stsr): To here. Mask out reserved bits when
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setting PSW.
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* interp.c (sim_open): Set psw_mask if machine known.
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1997-09-16 02:15:55 +00:00
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Tue Sep 16 10:20:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
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start-sanitize-v850e
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* v850-dc: Add rule to diferentiate between breakpoint and divh.
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* v850.igen (break): New instruction, breakpoint simulator.
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end-sanitize-v850e
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* v850.igen (breakpoint): Enable. Change to a 32bit instruction.
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1997-09-16 01:45:23 +00:00
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start-sanitize-v850e
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Mon Sep 15 18:44:05 1997 Jim Wilson <wilson@cygnus.com>
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* simops.c (Multiply64): Don't store into register zero.
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start-sanitize-v850e
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1997-09-15 23:09:26 +00:00
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Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* Makefile.in (semantics.o): Add dependency.
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* sim-main.h (SAVE_1, SAVE_2): Perform backward compatible save,
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do not adjust CIA/NIA.
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1997-09-15 08:18:20 +00:00
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Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
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start-sanitize-v850eq
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1997-09-15 14:42:51 +00:00
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* simops.c (OP_300, OP_400, OP_70): Make behavour depend on PSW[US].
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* simops.c: Move "divun", "sld.bu", "divhn", "divhun", "divn",
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"divun", "pushml" code from here to v850.igen.
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(divun): Make global.
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(type3_regs): Make global
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* v850.igen: Move simops.c code to here.
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1997-09-15 08:18:20 +00:00
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* interp.c (sim_create_inferior): For v850eq set US bit by
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default.
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end-sanitize-v850eq
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start-sanitize-v850e
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* interp.c (sim_open): Don't set arch, now set by
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sim_analyze_program.
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end-sanitize-v850e
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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Mon Sep 15 14:39:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* simops.c (op_types): Move from here.
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sim-main.h: To here.
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* sim-main.h (trace_input, trace_output), simops.c: Make global.
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* simops.c (OP_60): Move "jmp" code from here.
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* v850.igen (jmp): To here.
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start-sanitize-v850eq
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* simops.c (OP_60): Move "sld.bu" code from here.
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* v850.igen (sld.bu): To here.
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end-sanitize-v850eq
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1997-09-12 05:56:38 +00:00
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Fri Sep 12 15:11:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
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start-sanitize-v850eq
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* v850.igen (prepare, ...): Add to v850eq architecture.
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end-sanitize-v850eq
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start-sanitize-v850e
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* interp.c (sim_open): Default to v850eq.
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end-sanitize-v850e
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start-sanitize-v850eq
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* interp.c (sim_open): Default to v850e.
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end-sanitize-v850eq
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* sim-main.h (signal.h): Include.
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* v850.igen (illegal): Report/halt illegal instructions.
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* Makefile.in (SIM_EXTRA_CFLAGS): Add SIM_RESERVED_BITS.
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* configure.in: Add reserved bits option.
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* configure: Regenerate.
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1997-09-10 22:47:12 +00:00
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Thu Sep 11 08:40:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
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1997-09-12 02:44:03 +00:00
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* interp.c (sim_open): Use sim_do_commandf instead of asprintf.
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* sim-main.h (INSN_NAME):
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* Makefile.in (INCLUDE): Add SIM_EXTRA_DEPS.
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(SIM_EXTRA_DEPS): Add itable.h
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(tmp-gencode): Does not depend on simops.h
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* sim-main.h (itable.h): Include.
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(MAX_INSNS, INSN_NAME): Define.
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1997-09-10 22:47:12 +00:00
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* interp.c: Compute inttype from the interrupt_names index that
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was passed in.
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1997-09-10 05:40:04 +00:00
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Wed Sep 10 10:25:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* simops.c (trace_input): Use trace_printf instead of
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sim_io_printf.
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(trace_output): Ditto.
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(trace_input): Only trace when TRACE_ALU_P. Delete code
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disasembling instruction.
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(trace_output): Only trace when TRACE_ALU_P.
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1997-09-08 17:42:48 +00:00
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Tue Sep 9 01:29:50 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* simops.c (trace_input, trace_output): Use sim_io_printf.
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(OP_620): Pass correct argument to trace.
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(OP_E607E0): Ditto.
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(trace_input): Obtain prog_bfd, text_start et.al from simulator
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struct.
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Mon Sep 8 21:03:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* v850.igen: New file.
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* v850-dc: New file.
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Mon Sep 8 18:33:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* sim-main.h (SEXT16): Delete, use EXTEND16.
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(SEXT8): Delete, use EXTEND8.
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(SEXT32): Delete, used?
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(SEXT40, SEXT44, SEXT64): Use UNSIGNED64 for constants, not ...LL.
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(WITH_TARGET_WORD_MSB): Define as 31. v850 little bit endian.
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* simops.c: Use EXTEND15 from sim-bits instead of SEXT16.
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* sim-main.h (DEBUG_TRACE, DEBUG_VALUES, v850_debug): Delete,
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replace with TRACE_INSN_P and TRACE_ALU_P.
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* simops.c (trace_input, trace_output): Update.
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* interp.c (sim_engine_run): Delete.
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(lookup_hash): Delete.
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(sim_open): Do not fill hash table.
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(sim_trace): Delete.
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Fri Sep 5 17:04:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* simops.c (OP_FFFF): Use sim_engine_halt.
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(OP_12007E0): Ditto.
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(OP_10007E0): Ditto.
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* sim-main.h (struct sim_cpu): Delete member exception. Using
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sim-engine et.al.
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* interp.c (sim_info): Do not do anything in sim-info.
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(sim_stop): Delete, replace with sim-stop.
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(sim_stop_reason): Delete, replace with sim-reason.
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* sim-main.h (WITH_WATCHPOINTS): Define.
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(WITH_MODULO_MEMORY): Define
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* Makefile.in (SIM_OBJS): Add sim-resume, sim-watch, sim-stop,
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sim-reason.
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* interp.c (enum interrupt_cond_type): Delete.
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(struct interrupt_generator): Delete.
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(enum interrupt_type): Drop int_none.
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(sim_open): Initialize WATCHPOINT module.
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(sim_resume, sim_run): Rename sim_resume to sim_run.
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(sim_engine_run): Replace interrupt code with call to sim-events.
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(sim_set_interrupt): Delete.
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(sim_parse_number): Delete.
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1997-09-05 00:42:05 +00:00
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Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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1997-09-04 10:10:02 +00:00
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Thu Sep 4 18:11:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* simops.c (fetch_argv): New function, fetch a arg vector from
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simulator memory.
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* configure.in: Check for fork, execve, execv.
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* configure: Regenerate.
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* interp.c (sim_store_register, sim_fetch_register): Use H2T_4 and
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T2H_4 for byte swapping.
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* sim-main.h, interp.c (get_word, get_half, get_byte, put_word,
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put_half, put_byte): Delete.
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* Makefile.in (SIM_OBJS): Add sim-memopt.o module.
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* sim-main.h (load_mem, store_mem): Redefine as macros.
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(IMEM, IMEM_IMMED): New macros - fetch instructions.
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* simops.c (OP_10007E0): For SYS_read, SYS_write, SYS_open
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transfer data via a buffer.
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(fetch_str): New function, fetch string from memory.
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* Makefile.in (SIM_OBJS): Add sim-hrw.o module.
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* interp.c (sim_open): Establish memory maps using sim-memopt.c
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via sim_do_command.
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(sim_do_command): Print error if memory-map command is used. Call
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sim_args_command.
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(map): Delete, replaced by sim-core.
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(sim_memory_init): Delete, replaced by sim-core.
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(sim_set_memory_map): Delete, replaced by sim-memopt.
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(load_mem): Delete, replaced by sim-core.
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(store_mem): Delete, replaced by sim-core.
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(sim_write): Delete, replaced by sim-hrw.
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(sim_read): Delete, replaced by sim-hrw.
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* sim-main.h (struct sim_state): Remove memory members, using
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sim-core.c
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1997-09-03 04:10:33 +00:00
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Wed Sep 3 10:18:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
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1997-09-03 07:30:17 +00:00
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* sim-main.h: Replace SIM_HAVE_FLATMEM with mem ptr.
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* interp.c (map): Do not add to a void pointer.
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* Makefile.in (INCLUDE): Add sim-main.h
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* configure.in: Check for time.h
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* configure: Re-generate.
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* interp.c (struct interrupt_generator): Make time unsigned long,
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address SIM_ADDR.
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(sim_resume): Make oldpc SIM_ADDR.
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(struct hash_entry): Make mask/opcode unsigned.
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* v850_sim.h (struct simops ): Make opcode and mask unsigned.
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1997-09-03 04:10:33 +00:00
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* simops.c (utime.h): Include if available.
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(OP_10007E0): Check for UTIME function.
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(divun): Put parentheses around shift argument.
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(OP_640): Put parentheses around shift argument, was wrong.
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(OP_107F0): Return something.
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* interp.c (sim_parse_number): Use strtoul not strtol.
|
|
|
|
|
(sim_resume): Use sim_elapsed_time_get to keep track of the time.
|
|
|
|
|
|
|
|
|
|
* configure.in (SIM_AC_OPTION_WARNINGS): Add.
|
|
|
|
|
(SIM_AC_OPTION_ENDIAN): Set to hardwired big.
|
|
|
|
|
(SIM_AC_OPTION_HOST_ENDIAN): Add.
|
|
|
|
|
(AC_CHECK_FUNCS): Add utime.
|
|
|
|
|
(AC_CHECK_HEADERS): Add stdlib.h, string.h, strings.h, utime.h
|
|
|
|
|
configure: Regenerate.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.in (SIM_RUN_OBJS): Use nrun.o.
|
|
|
|
|
(SIM_OBJS): Add sim-io.o, sim-hload.o, sim-utils.o, sim-options.o,
|
|
|
|
|
sim-config.o, sim-module.o, sim-events.o, sim-core.o,
|
|
|
|
|
sim-endian.o, sim-engine.o, sim-trace.o, sim-profile.o
|
|
|
|
|
(SIM_ENDIAN, SIM_WARNGINS): Define.
|
|
|
|
|
|
|
|
|
|
* simops.c (OP_10007E0): Use sim_io_* for transfers.
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_resume): Pass sd around.
|
|
|
|
|
|
|
|
|
|
* simops.c (sim-main.h): Include.
|
|
|
|
|
|
|
|
|
|
* gencode.c (write_template): Generate #include sim-main.h.
|
|
|
|
|
(write_opcodes): Ditto.
|
|
|
|
|
|
|
|
|
|
* interp.c (prog_bfd, prog_bfd_was_opened_p): Delete.
|
|
|
|
|
(v850_callback): Ditto.
|
|
|
|
|
(sim_kind, myname): Ditto.
|
|
|
|
|
(lookup_hash): Pass SD. Use sim_io_error.
|
|
|
|
|
(sim_set_memory_map): Pass in SD, use.
|
|
|
|
|
(init_system): Pass in SD, use.
|
|
|
|
|
(sim_open): Update.
|
|
|
|
|
(sim_set_profile): Delete.
|
|
|
|
|
(sim_set_profile_size): Delete.
|
|
|
|
|
(do_interrupt): Pass in SD, use.
|
|
|
|
|
(sim_info): Use sim_io_printf.
|
|
|
|
|
(sim_create_inferior): Reset registers. Set PC from prog_bfd
|
|
|
|
|
argument.
|
|
|
|
|
(sim_load): Delete, use common/sim-hload.c
|
|
|
|
|
(sim_size): Rename to sim_memory_init.
|
|
|
|
|
(sim_write): Remove call to init_system.
|
|
|
|
|
(init_system): Delete.
|
|
|
|
|
(sim_set_callbacks): Delete.
|
|
|
|
|
(sim_set_interrupt): Pass in SD, use.
|
|
|
|
|
(start_time): Delete.
|
|
|
|
|
|
|
|
|
|
* v850_sim.h: Remove everything except `struct simops' from here.
|
|
|
|
|
* sim-main.h: Move most to here.
|
|
|
|
|
* gencode.c: Move #includes to here.
|
|
|
|
|
|
|
|
|
|
* sim-main.h(struct _sim_cpu): Rename struct _state.
|
|
|
|
|
(#define PC, et.al.): Update
|
|
|
|
|
(v850_callback): Delete. Replaced with SIM_DESC arg.
|
|
|
|
|
(int8, uint8, int16, uint16, int32, uint32): Define types using
|
|
|
|
|
unsigned8 et.al from common/sim-types.h.
|
|
|
|
|
* sim-main.h (State): Define as STATE_CPU.
|
|
|
|
|
|
1997-09-01 03:43:56 +00:00
|
|
|
Mon Sep 1 12:07:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure.in: Check for time, chmod.
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
* simops.c (SYS_time, SYS_chmod): Use HAVE_TIME, HAVE_CHMOD.
|
|
|
|
|
|
|
|
|
|
* simops.c (../../libgloss/v850/sys/syscall.h): Include instead of
|
|
|
|
|
sys/syscall.h.
|
|
|
|
|
(OP_10007E0): Check the existance each SYS_* macro independantly.
|
|
|
|
|
|
|
|
|
|
* v850_sim.h (SIGQUIT, SIGTRAP): Only define if missing.
|
|
|
|
|
|
1997-08-27 22:43:18 +00:00
|
|
|
Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
* config.in: Ditto.
|
|
|
|
|
|
1997-08-26 02:05:18 +00:00
|
|
|
Tue Aug 26 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_kill): Delete.
|
1997-08-27 04:44:41 +00:00
|
|
|
(sim_create_inferior): Add ABFD argument.
|
|
|
|
|
(sim_load): Move setting of PC from here.
|
|
|
|
|
(sim_create_inferior): To here.
|
1997-08-26 02:05:18 +00:00
|
|
|
|
1997-08-25 23:14:25 +00:00
|
|
|
Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
* config.in: Ditto.
|
|
|
|
|
|
|
|
|
|
Mon Aug 25 11:31:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open): Add ABFD argument.
|
|
|
|
|
|
1997-08-22 17:41:20 +00:00
|
|
|
start-sanitize-v850e
|
|
|
|
|
Fri Aug 22 10:39:28 1997 Nick Clifton <nickc@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* simops.c (bsh): Only set CY flag if either of the bottom
|
|
|
|
|
bytes is zero.
|
|
|
|
|
|
|
|
|
|
* simops.c (prepare, dispose): Lower numbered
|
|
|
|
|
registers go to higher numbered address.
|
|
|
|
|
|
|
|
|
|
* simops.c (unsigned divide instructions): S bit set if result has
|
|
|
|
|
top bit set.
|
|
|
|
|
|
|
|
|
|
start-sanitize-v850eq
|
|
|
|
|
* simops.c (pushml, pushmh, popml, popmh): Lower numbered
|
|
|
|
|
registers go to higher numbered address.
|
|
|
|
|
end-sanitize-v850eq
|
|
|
|
|
end-sanitize-v850e
|
|
|
|
|
|
1997-08-20 20:57:05 +00:00
|
|
|
Wed Aug 20 13:56:35 1997 Nick Clifton <nickc@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct
|
|
|
|
|
interpretation of SR bit in list18 structure.
|
1997-08-20 22:42:55 +00:00
|
|
|
start-sanitize-v850eq
|
|
|
|
|
(divn, divun): New functions to perform N step divide functions.
|
|
|
|
|
end-sanitize-v850eq
|
1997-08-20 20:57:05 +00:00
|
|
|
|
|
|
|
|
start-sanitize-v850eq
|
|
|
|
|
Mon Aug 18 10:59:02 1997 Nick Clifton <nickc@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* simops.c (OP_300, OP_400, OP_60, OP_70): Support variant opcodes
|
|
|
|
|
with US bit set in the PSW.
|
|
|
|
|
start-sanitize-v850eq
|
|
|
|
|
|
1997-08-14 19:45:14 +00:00
|
|
|
Wed Aug 13 19:06:55 1997 Nick Clifton <nickc@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_resume): Opcode functions return amount to be
|
|
|
|
|
added to PC and all opcodes take a standard format in the OP[]
|
|
|
|
|
array.
|
|
|
|
|
|
|
|
|
|
(do_format_*): Functions removed.
|
|
|
|
|
|
|
|
|
|
* v850_sim.h (SP, EP): New register mnemonics.
|
|
|
|
|
|
|
|
|
|
* gencode.c (write_header): Functions prototypes return an
|
|
|
|
|
integer.
|
|
|
|
|
|
|
|
|
|
* simops.c: Opcode functions return amount to be added to PC.
|
|
|
|
|
|
|
|
|
|
start-sanitize-v850e
|
|
|
|
|
* v850_sim.h (CTPC, CTPSW, CTBP): New register mnemonics.
|
|
|
|
|
|
|
|
|
|
* simops.c: Add support for v850e instructions.
|
|
|
|
|
|
|
|
|
|
* .Sanitize (Do-first, Do-last): Add support for keep-v850e
|
|
|
|
|
command line option.
|
|
|
|
|
|
|
|
|
|
end-sanitize-v850e
|
|
|
|
|
|
|
|
|
|
start-sanitize-v850eq
|
|
|
|
|
* .Sanitize (Do-first, Do-last): Add support for keep-v850eq
|
|
|
|
|
command line option.
|
|
|
|
|
|
|
|
|
|
* simops.c: Add support for v850eq instructions.
|
|
|
|
|
end-sanitize-v850eq
|
|
|
|
|
|
|
|
|
|
Tue May 20 10:24:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open): Add callback argument.
|
|
|
|
|
(sim_set_callbacks): Delete SIM_DESC argument.
|
|
|
|
|
|
|
|
|
|
Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-04-24 00:22:10 +00:00
|
|
|
Wed Apr 23 17:20:16 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (prog_bfd_was_opened_p): New static local.
|
|
|
|
|
(prog_bfd): New global variable.
|
|
|
|
|
(sim_open): Undo patch to add -E support.
|
|
|
|
|
(sim_close): Close prog_bfd if sim_load opened it.
|
|
|
|
|
(sim_load): Record bfd of loaded file in prog_bfd.
|
|
|
|
|
* simops.c (prog_bfd): Renamed from exec_bfd.
|
|
|
|
|
|
1997-04-18 12:24:52 +00:00
|
|
|
Fri Apr 18 14:17:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_stop): Stub function.
|
|
|
|
|
|
1997-04-17 10:54:07 +00:00
|
|
|
Thu Apr 17 03:53:18 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in (SIM_OBJS): Add sim-load.o.
|
|
|
|
|
* interp.c (sim_kind, myname): New static locals.
|
|
|
|
|
(sim_open): Set sim_kind, myname. Ignore -E arg.
|
|
|
|
|
(sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
|
|
|
|
|
load file into simulator. Set start address from bfd.
|
|
|
|
|
(sim_create_inferior): Return SIM_RC. Delete arg start_address.
|
|
|
|
|
|
1997-04-17 06:05:19 +00:00
|
|
|
Wed Apr 16 19:53:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* simops.c (OP_10007E0): Only provide system calls SYS_execv,
|
|
|
|
|
SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host.
|
|
|
|
|
|
|
|
|
|
Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
* config.in: Ditto.
|
|
|
|
|
|
1997-04-02 23:17:50 +00:00
|
|
|
Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
1997-04-02 23:39:50 +00:00
|
|
|
* interp.c (sim_open): New arg `kind'.
|
|
|
|
|
|
1997-04-02 23:17:50 +00:00
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-04-02 05:04:25 +00:00
|
|
|
Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
|
|
|
|
Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-03-17 15:29:29 +00:00
|
|
|
Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Re-generate.
|
|
|
|
|
|
1997-03-14 16:21:57 +00:00
|
|
|
Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerate to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-03-13 21:01:38 +00:00
|
|
|
Thu Mar 13 13:00:54 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open): New SIM_DESC result. Argument is now
|
|
|
|
|
in argv form.
|
|
|
|
|
(other sim_*): New SIM_DESC argument.
|
|
|
|
|
|
|
|
|
|
Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in (@COMMON_MAKEFILE_FRAG): Use
|
|
|
|
|
COMMON_{PRE,POST}_CONFIG_FRAG instead.
|
|
|
|
|
* configure.in: sinclude ../common/aclocal.m4.
|
|
|
|
|
* configure: Regenerated.
|
|
|
|
|
|
1997-01-23 22:09:52 +00:00
|
|
|
Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
|
|
|
|
|
|
|
|
|
|
* configure configure.in Makefile.in: Update to new configure
|
|
|
|
|
scheme which is more compatible with WinGDB builds.
|
|
|
|
|
* configure.in: Improve comment on how to run autoconf.
|
|
|
|
|
* configure: Re-run autoconf to get new ../common/aclocal.m4.
|
|
|
|
|
* Makefile.in: Use autoconf substitution to install common
|
|
|
|
|
makefile fragment.
|
|
|
|
|
|
1997-01-20 21:06:48 +00:00
|
|
|
Mon Jan 20 16:05:34 1997 Michael Meissner <meissner@tiktok.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* simops.c (OP_{E0,2E0,6E0}): The multiply operations sign extend,
|
|
|
|
|
not zero extend.
|
|
|
|
|
|
|
|
|
|
Tue Jan 14 17:06:03 1997 Stu Grossman (grossman@critters.cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c: Put ifdefs around things to make MSVC happy. Get rid
|
|
|
|
|
of unistd.h. Disable SYS_stat, SYS_chown, SYS_time, SYS_times,
|
|
|
|
|
SYS_gettimeofday and SYS_utime from MSVC.
|
|
|
|
|
|
1996-12-31 23:18:55 +00:00
|
|
|
Tue Dec 31 18:11:13 1996 Michael Meissner <meissner@tiktok.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* simops.c (OP_10007E0): Know that kill encodes the signal number
|
|
|
|
|
via: 0xdead0000 | signal and turn it back into a signal.
|
|
|
|
|
|
1996-12-27 19:50:03 +00:00
|
|
|
Fri Dec 27 14:44:06 1996 Michael Meissner <meissner@tiktok.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* v850_sim.h (SIG_V850_EXIT): Define as -1.
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open): Cast calloc function.
|
|
|
|
|
(sim_stop_reason): If signal is SIG_V850_EXIT, inform gdb the
|
|
|
|
|
program exited with the appropriate exit code.
|
|
|
|
|
(sim_set_interrupt): Declare buildargv.
|
|
|
|
|
|
|
|
|
|
* simops.c (OP_10007E0): Make exit signal normal exit. Make time
|
|
|
|
|
type correct and work on big endian systems.
|
|
|
|
|
|
|
|
|
|
Wed Nov 20 02:18:44 1996 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in: Delete stuff moved to ../common/Make-common.in.
|
|
|
|
|
(SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define.
|
|
|
|
|
* configure.in: Simplify using macros in ../common/aclocal.m4.
|
|
|
|
|
Call AC_CHECK_HEADERS(unistd.h).
|
|
|
|
|
* configure: Regenerated.
|
|
|
|
|
* config.in: New file.
|
|
|
|
|
* simops.c: #include "config.h". #include <unistd.h> if present.
|
|
|
|
|
|
|
|
|
|
Sun Nov 3 23:02:54 1996 Stan Shebs <shebs@andros.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* v850_sim.h (State): New slots dummy_mem, pending_nmi.
|
|
|
|
|
(EIPC, etc): New macros for system registers.
|
|
|
|
|
* simops.c, interp.c: Use everywhere.
|
|
|
|
|
|
|
|
|
|
* interp.c: Add support for interrupts issued by interrupt
|
|
|
|
|
generators, either PC- or time-based. Controlled by simulator
|
|
|
|
|
command "sim interrupt".
|
|
|
|
|
|
|
|
|
|
* interp.c: Add support for variable-size allocation of memory,
|
|
|
|
|
via simulator command "sim memory-map".
|
|
|
|
|
(map): Issue SIGSEGV for references to invalid memory regions.
|
|
|
|
|
|
1996-10-31 19:58:14 +00:00
|
|
|
Thu Oct 31 14:44:10 1996 Gavin Koch <gavin@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* simops.c: Include <sys/time.h> for struct timeval and
|
|
|
|
|
struct timezone.
|
|
|
|
|
|
1996-10-30 15:51:39 +00:00
|
|
|
Wed Oct 30 08:49:10 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
1996-10-30 16:30:59 +00:00
|
|
|
* simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday.
|
|
|
|
|
|
1996-10-30 15:51:39 +00:00
|
|
|
* simops.c (OP_10007E0): Handle SYS_time.
|
|
|
|
|
|
1996-10-29 21:24:01 +00:00
|
|
|
Tue Oct 29 14:22:55 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c: Include <sys/stat.h>.
|
|
|
|
|
(OP_10007E0): Handle SYS_stat.
|
|
|
|
|
|
1996-10-24 18:28:43 +00:00
|
|
|
Thu Oct 24 12:26:35 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
1996-10-29 21:24:01 +00:00
|
|
|
* simops.c (OP_10007E0): Don't declare errno.
|
|
|
|
|
|
1996-10-24 21:19:22 +00:00
|
|
|
* simops.c (OP_500): Mask off low bit in displacement
|
|
|
|
|
for sld.w.
|
|
|
|
|
(OP_501): Similarly.
|
|
|
|
|
|
1996-10-24 20:49:06 +00:00
|
|
|
* simops.c (OP_500): Fix displacement handling for sld.w.
|
|
|
|
|
(OP_501): Similarly for sst.w.
|
|
|
|
|
|
1996-10-24 18:28:43 +00:00
|
|
|
* simops.c (trace_input): Remove all references to SEXT7.
|
|
|
|
|
(OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement
|
|
|
|
|
is zero extended for sst/sld instructions.
|
|
|
|
|
* v850_sim.h (SEX7): Delete. It's no longer needed (and it
|
|
|
|
|
was incorrect anyway).
|
|
|
|
|
|
1996-10-24 17:39:30 +00:00
|
|
|
Thu Oct 24 10:33:33 1996 Stu Grossman (grossman@critters.cygnus.com)
|
|
|
|
|
|
|
|
|
|
* Makefile.in: Get rid of srcroot. Set all INSTALL macros via
|
|
|
|
|
autoconf.
|
|
|
|
|
* gencode.c (write_opcodes): Pad operands field to account for
|
|
|
|
|
MSVC braindamage.
|
|
|
|
|
* simops.c: Include errno.h. Exclude SYS_chown, since MSVC
|
|
|
|
|
doesn't support it. (Why is this here in the first place?!?)
|
|
|
|
|
* v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's.
|
|
|
|
|
Change number of operands in struct simops from 9 to 6. Define
|
|
|
|
|
SIGTRAP and SIGQUIT for MSVC.
|
|
|
|
|
|
1996-10-15 23:23:00 +00:00
|
|
|
Tue Oct 15 16:19:51 1996 Stu Grossman (grossman@critters.cygnus.com)
|
|
|
|
|
|
|
|
|
|
* interp.c (MEM_SIZE): It's now bytes, not a power of 2.
|
|
|
|
|
* (map): Add support for external mem in the 1->2 meg range.
|
|
|
|
|
Also, abort() when memory access is way out of bounds. (Better to
|
|
|
|
|
die than to give wrong result. (This will be fixed later.))
|
|
|
|
|
* (sim_size): MEM_SIZE is now bytes, not shift factor.
|
|
|
|
|
|
|
|
|
|
Tue Oct 1 15:53:24 1996 Gavin Koch <gavin@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* simops.c (trace_input): Swapped order of operands for output
|
|
|
|
|
output of OP_IMM_REG. Changed the fetching of the operands for
|
|
|
|
|
OP_LOAD32, and OP_STORE32 to work like op-function.
|
|
|
|
|
|
|
|
|
|
Mon Sep 30 15:46:33 1996 Stu Grossman (grossman@critters.cygnus.com)
|
|
|
|
|
|
|
|
|
|
* interp.c: Move includes of remote-sim.h and callback.h to
|
|
|
|
|
v850-sim.h.
|
|
|
|
|
* (lookup_hash): Add PC to report of hash failure.
|
|
|
|
|
* (map load_mem store_mem): New memory subsystem. Models V851
|
|
|
|
|
memory system.
|
|
|
|
|
* (sim_write sim_read): Use new memory subsystem.
|
|
|
|
|
* (sim_resume): Don't load and save PC into EIPC anymore. Needed
|
|
|
|
|
to make user-defined traps work right.
|
|
|
|
|
* simops.c (OP_*): Use new memory subsystem.
|
|
|
|
|
* (OP_14007E0 (reti)): Implement reti.
|
|
|
|
|
* (OP_14996E0 (trap)): Implement user-defined traps. Move I/O to
|
|
|
|
|
trap 31. Use new memory subsystem.
|
|
|
|
|
* v850_sim.h: Prototypes for load_mem, store_mem and map. Use
|
|
|
|
|
load_mem in RLW macro.
|
|
|
|
|
|
1996-09-28 01:38:45 +00:00
|
|
|
Fri Sep 27 18:34:09 1996 Stu Grossman (grossman@critters.cygnus.com)
|
|
|
|
|
|
|
|
|
|
* gencode.c (write_opcodes): Output hex values for opcode mask
|
|
|
|
|
and patterns.
|
|
|
|
|
* interp.c (sim_resume): Save and restore PC from the appropriate
|
|
|
|
|
register.
|
|
|
|
|
* (sim_fetch_register sim_store_register): Fix byte-order problem
|
|
|
|
|
with reading and writing registers.
|
|
|
|
|
* simops.c (OP_FFFF): Implement pseudo-breakpoint insn.
|
|
|
|
|
|
1996-09-27 23:41:12 +00:00
|
|
|
Fri Sep 27 17:42:37 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c (trace_input): Fix thinko.
|
|
|
|
|
|
|
|
|
|
Wed Sep 18 09:54:12 1996 Michael Meissner <meissner@tiktok.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* simops.c (exec_bfd): Rename from sim_bfd.
|
|
|
|
|
(trace_input): Ditto.
|
|
|
|
|
|
1996-09-12 16:06:02 +00:00
|
|
|
Thu Sep 12 12:03:05 1996 Michael Meissner <meissner@tiktok.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* simops.c (trace_input): Use find_nearest_line to print line
|
|
|
|
|
number, function name or file name of PC.
|
|
|
|
|
|
1996-09-11 20:54:21 +00:00
|
|
|
Wed Sep 11 16:44:37 1996 Michael Meissner <meissner@tiktok.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* simops.c: Add tracing support. Use SEXTxx macros instead of
|
|
|
|
|
doing hardwired shifts.
|
|
|
|
|
|
|
|
|
|
* configure.in (--enable-sim-cflags): Add switch to add additional
|
|
|
|
|
flags to simulator buld. If --enable-sim-cflags=trace, turn on
|
|
|
|
|
tracing.
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
|
|
|
* Makefile.in: Don't require a VPATH capable make if configuring
|
|
|
|
|
in the same directory. Don't use CFLAGS for configuration flags.
|
|
|
|
|
Add flags from --enable-sim-cflags. Support canadian cross
|
|
|
|
|
builds. Rebuild whole simulator if include files change.
|
|
|
|
|
|
|
|
|
|
* interp.c (v850_debug): New global for debugging.
|
|
|
|
|
(lookup_hash,sim_size,sim_set_profile): Use
|
|
|
|
|
printf_filtered callback, instead of calling printf directly.
|
|
|
|
|
(sim_{open,trace}): Enable tracing if -t and compiled for tracing.
|
|
|
|
|
|
|
|
|
|
* v850_sim.h: Use limits.h to set the various sized types.
|
|
|
|
|
(SEXT{5,7,16,22}): New macros.
|
|
|
|
|
|
1996-09-10 02:51:07 +00:00
|
|
|
Mon Sep 9 20:50:46 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* interp.c (hash): Make this an inline function
|
|
|
|
|
when compiling with GCC. Simplify.
|
|
|
|
|
* simpos.c: Explicitly include "sys/syscall.h". Remove
|
|
|
|
|
some #if 0'd code. Enable more emulated syscalls.
|
|
|
|
|
|
|
|
|
|
Wed Sep 4 01:48:55 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* interp.c: Fix sign bit handling for add and sub instructions.
|
|
|
|
|
|
1996-09-03 16:25:51 +00:00
|
|
|
Tue Sep 3 10:20:30 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
1996-09-03 18:31:48 +00:00
|
|
|
* gencode.c: Fix various indention & style problems.
|
|
|
|
|
Remove test code. Remove #if 0 code.
|
|
|
|
|
* interp.c: Provide prototypes for all static functions.
|
|
|
|
|
Fix minor indention problems.
|
|
|
|
|
(sim_open, sim_resume): Remove unused variables.
|
|
|
|
|
(sim_read): Return type is "int".
|
|
|
|
|
* simops.c: Remove unused variables.
|
|
|
|
|
(divh): Make result of divide-by-zero zero.
|
|
|
|
|
(setf): Initialize result to keep compiler quiet.
|
|
|
|
|
(sar instructions): These just clear the overflow bit.
|
|
|
|
|
* v850_sim.h: Provide prototypes for put_byte, put_half
|
|
|
|
|
and put_word.
|
|
|
|
|
|
1996-09-03 16:25:51 +00:00
|
|
|
* interp.c: OP should be an array of 32bit operands!
|
|
|
|
|
(v850_callback): Declare.
|
|
|
|
|
(do_format_5): Fix extraction of OP[0].
|
|
|
|
|
(sim_size): Remove debugging printf.
|
|
|
|
|
(sim_set_callbacks): Do something useful.
|
|
|
|
|
(sim_stop_reason): Gross hacks to get c-torture running.
|
|
|
|
|
* simops.c: Simplify code for computing targets of bCC
|
|
|
|
|
insns. Invert 's' bit if 'ov' bit is set for some
|
|
|
|
|
instructions. Fix 'cy' bit handling for numerous
|
|
|
|
|
instructions. Make the simulator stop when a halt
|
|
|
|
|
instruction is encountered. Very crude support for
|
|
|
|
|
emulated syscalls (trap 0).
|
|
|
|
|
* v850_sim.h: Include "callback.h" and declare
|
|
|
|
|
v850_callback. Items in the operand array are 32bits.
|
|
|
|
|
|
|
|
|
|
Sun Sep 1 22:35:35 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_resume): Fix code to check for a format 3
|
|
|
|
|
opcode.
|
|
|
|
|
* simops.c: bCC insns only argument is a constant, not a
|
|
|
|
|
register value (duh...)
|
|
|
|
|
|
1996-08-30 16:35:10 +00:00
|
|
|
Fri Aug 30 10:33:49 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
1996-08-30 21:55:26 +00:00
|
|
|
* simops.c: Fix "not1" and "set1".
|
|
|
|
|
|
1996-08-30 20:15:51 +00:00
|
|
|
* simops.c: Don't forget to initialize temp for
|
|
|
|
|
"ld.h" and "ld.w"
|
|
|
|
|
|
1996-08-30 16:42:49 +00:00
|
|
|
* interp.c: Remove various debugging printfs.
|
|
|
|
|
|
1996-08-30 16:41:39 +00:00
|
|
|
* simops.c: Fix satadd, satsub boundary case handling.
|
|
|
|
|
|
1996-08-30 16:35:10 +00:00
|
|
|
* interp.c (hash): Fix.
|
|
|
|
|
* interp.c (do_format_8): Get operands correctly and
|
|
|
|
|
call the target function.
|
|
|
|
|
* simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
|
|
|
|
|
|
1996-08-29 19:53:37 +00:00
|
|
|
Thu Aug 29 13:53:29 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
1996-08-30 05:49:07 +00:00
|
|
|
* interp.c (do_format_4): Get operands correctly and
|
|
|
|
|
call the target function.
|
|
|
|
|
* simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b",
|
|
|
|
|
"sst.h", and "sst.w".
|
|
|
|
|
|
* v850_sim.h: The V850 doesn't have split I&D spaces. Change
accordingly. Remove many unused definitions.
* interp.c: The V850 doesn't have split I&D spaces. Change
accordingly.
(get_longlong, get_longword, get_word): Deleted.
(write_longlong, write_longword, write_word): Deleted.
(get_operands): Deleted.
(get_byte, get_half, get_word): New functions.
(put_byte, put_half, put_word): New functions.
* simops.c: Remove unused functions. Rough cut at
"ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
1996-08-30 05:41:10 +00:00
|
|
|
* v850_sim.h: The V850 doesn't have split I&D spaces. Change
|
|
|
|
|
accordingly. Remove many unused definitions.
|
|
|
|
|
* interp.c: The V850 doesn't have split I&D spaces. Change
|
|
|
|
|
accordingly.
|
|
|
|
|
(get_longlong, get_longword, get_word): Deleted.
|
|
|
|
|
(write_longlong, write_longword, write_word): Deleted.
|
|
|
|
|
(get_operands): Deleted.
|
|
|
|
|
(get_byte, get_half, get_word): New functions.
|
|
|
|
|
(put_byte, put_half, put_word): New functions.
|
|
|
|
|
* simops.c: Remove unused functions. Rough cut at
|
|
|
|
|
"ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
|
|
|
|
|
|
1996-08-30 05:09:08 +00:00
|
|
|
* v850_sim.h (struct _state): Remove "psw" field. Add
|
|
|
|
|
"sregs" field.
|
|
|
|
|
(PSW): Remove bogus definition.
|
|
|
|
|
* simops.c: Change condition code handling to use the psw
|
|
|
|
|
register within the sregs array. Handle "ldsr" and "stsr".
|
|
|
|
|
|
1996-08-30 04:59:02 +00:00
|
|
|
* simops.c: Handle "satadd", "satsub", "satsubi", "satsubr".
|
|
|
|
|
|
1996-08-30 04:27:48 +00:00
|
|
|
* interp.c (do_format_5): Get operands correctly and
|
|
|
|
|
call the target function.
|
|
|
|
|
(sim_resume): Don't do a PC update for format 5 instructions.
|
|
|
|
|
* simops.c: Handle "jarl" and "jmp" instructions.
|
|
|
|
|
|
1996-08-30 04:11:32 +00:00
|
|
|
* simops.c: Fix minor typos. Handle "cmp", "setf", "tst"
|
|
|
|
|
"di", and "ei" instructions correctly.
|
|
|
|
|
|
1996-08-30 03:48:13 +00:00
|
|
|
* interp.c (do_format_3): Get operands correctly and call
|
|
|
|
|
the target function.
|
|
|
|
|
* simops.c: Handle bCC instructions.
|
|
|
|
|
|
1996-08-30 03:23:36 +00:00
|
|
|
* simops.c: Add condition code handling to shift insns.
|
|
|
|
|
Fix minor typos in condition code handling for other insns.
|
|
|
|
|
|
1996-08-30 03:07:24 +00:00
|
|
|
* Makefile.in: Fix typo.
|
|
|
|
|
* simops.c: Add condition code handling to "sub" "subr" and
|
|
|
|
|
"divh" instructions.
|
|
|
|
|
|
1996-08-29 23:39:23 +00:00
|
|
|
* interp.c (hash): Update to be more accurate.
|
|
|
|
|
(lookup_hash): Call hash rather than computing the hash
|
|
|
|
|
code here.
|
|
|
|
|
(do_format_1_2): Handle format 1 and format 2 instructions.
|
|
|
|
|
Get operands correctly and call the target function.
|
|
|
|
|
(do_format_6): Get operands correctly and call the target
|
|
|
|
|
function.
|
|
|
|
|
(do_formats_9_10): Rough cut so shift ops will work.
|
|
|
|
|
(sim_resume): Tweak to deal with format 1 and format 2
|
|
|
|
|
handling in a single funtion. Don't update the PC
|
|
|
|
|
for format 3 insns. Fix typos.
|
|
|
|
|
* simops.c: Slightly reorganize. Add condition code handling
|
|
|
|
|
to "add", "addi", "and", "andi", "or", "ori", "xor", "xori"
|
|
|
|
|
and "not" instructions.
|
|
|
|
|
* v850_sim.h (reg_t): Registers are 32bits.
|
|
|
|
|
(_state): The V850 has 32 general registers. Add a 32bit
|
|
|
|
|
psw and pc register too. Add accessor macros
|
|
|
|
|
|
|
|
|
|
* Makefile.in, interp.c, v850_sim.h: Bring over endianness
|
|
|
|
|
changes from the d10v simulator.
|
|
|
|
|
|
1996-08-29 22:29:41 +00:00
|
|
|
* simops.c: Add shift support.
|
|
|
|
|
|
1996-08-29 20:08:37 +00:00
|
|
|
* simops.c: Add multiply & divide support. Abort for system
|
|
|
|
|
instructions.
|
|
|
|
|
|
1996-08-29 19:53:37 +00:00
|
|
|
* simops.c: Add logicals, mov, movhi, movea, add, addi, sub
|
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and subr. No condition codes yet.
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1996-08-29 01:06:42 +00:00
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Wed Aug 28 13:53:22 1996 Jeffrey A Law (law@cygnus.com)
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* ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
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gencode.c, interp.c, simops.c: Created.
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