2013-01-01 06:33:28 +00:00
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# Copyright 2010-2013 Free Software Foundation, Inc.
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Support x86 pseudo byte, word and dword registers.
gdb/
2010-03-02 H.J. Lu <hongjiu.lu@intel.com>
* amd64-tdep.c (amd64_byte_names): New.
(amd64_word_names): Likewise.
(amd64_dword_names): Likewise.
(amd64_pseudo_register_name): Likewise.
(amd64_pseudo_register_read): Likewise.
(amd64_pseudo_register_write): Likewise.
(amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs
and num_mmx_regs. Call set_gdbarch_pseudo_register_read,
set_gdbarch_pseudo_register_write and
set_tdesc_pseudo_register_name. Don't call
set_gdbarch_num_pseudo_regs. Don't set mm0_regnum.
* i386-tdep.c (i386_num_mmx_regs): Removed.
(i386_num_pseudo_regs): Likewise.
(i386_byte_names): New.
(i386_word_names): Likewise.
(i386_byte_regnum_p): Likewise.
(i386_word_regnum_p): Likewise.
(i386_mmx_regnum_p): Updated.
(i386_pseudo_register_name): Make it global. Handle byte and
word pseudo-registers.
(i386_pseudo_register_read): Likewise.
(i386_pseudo_register_write): Likewise.
(i386_pseudo_register_type): Handle byte, word and dword
pseudo-registers
(i386_register_reggroup_p): Don't include pseudo
registers, except for MXX, in any register groups. Don't
include pseudo byte, word, dword registers in general_reggroup.
(i386_gdbarch_init): Set num_byte_regs, num_word_regs,
num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX
pseudo-registers after word pseudo-registers. Call
set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi.
* i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs,
al_regnum, num_word_regs, ax_regnum, num_dword_regs and
eax_regnum.
(i386_byte_regnum_p): New.
(i386_word_regnum_p): Likewise.
(i386_dword_regnum_p): Likewise.
(i386_pseudo_register_name): Likewise.
(i386_pseudo_register_read): Likewise.
(i386_pseudo_register_write): Likewise.
gdb/testsuite/
2010-03-02 H.J. Lu <hongjiu.lu@intel.com>
* gdb.arch/amd64-byte.exp: New.
* gdb.arch/amd64-dword.exp: Likewise.
* gdb.arch/amd64-pseudo.c: Likewise.
* gdb.arch/amd64-word.exp: Likewise.
* gdb.arch/i386-byte.exp: Likewise.
* gdb.arch/i386-pseudo.c: Likewise.
* gdb.arch/i386-word.exp: Likewise.
2010-03-02 13:14:36 +00:00
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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# Please email any bugs, comments, and/or additions to this file to:
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# bug-gdb@gnu.org
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# This file is part of the gdb testsuite.
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2010-07-12 17:33:15 +00:00
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if { ![istarget x86_64-*-* ] || ![is_lp64_target] } {
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Support x86 pseudo byte, word and dword registers.
gdb/
2010-03-02 H.J. Lu <hongjiu.lu@intel.com>
* amd64-tdep.c (amd64_byte_names): New.
(amd64_word_names): Likewise.
(amd64_dword_names): Likewise.
(amd64_pseudo_register_name): Likewise.
(amd64_pseudo_register_read): Likewise.
(amd64_pseudo_register_write): Likewise.
(amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs
and num_mmx_regs. Call set_gdbarch_pseudo_register_read,
set_gdbarch_pseudo_register_write and
set_tdesc_pseudo_register_name. Don't call
set_gdbarch_num_pseudo_regs. Don't set mm0_regnum.
* i386-tdep.c (i386_num_mmx_regs): Removed.
(i386_num_pseudo_regs): Likewise.
(i386_byte_names): New.
(i386_word_names): Likewise.
(i386_byte_regnum_p): Likewise.
(i386_word_regnum_p): Likewise.
(i386_mmx_regnum_p): Updated.
(i386_pseudo_register_name): Make it global. Handle byte and
word pseudo-registers.
(i386_pseudo_register_read): Likewise.
(i386_pseudo_register_write): Likewise.
(i386_pseudo_register_type): Handle byte, word and dword
pseudo-registers
(i386_register_reggroup_p): Don't include pseudo
registers, except for MXX, in any register groups. Don't
include pseudo byte, word, dword registers in general_reggroup.
(i386_gdbarch_init): Set num_byte_regs, num_word_regs,
num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX
pseudo-registers after word pseudo-registers. Call
set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi.
* i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs,
al_regnum, num_word_regs, ax_regnum, num_dword_regs and
eax_regnum.
(i386_byte_regnum_p): New.
(i386_word_regnum_p): Likewise.
(i386_dword_regnum_p): Likewise.
(i386_pseudo_register_name): Likewise.
(i386_pseudo_register_read): Likewise.
(i386_pseudo_register_write): Likewise.
gdb/testsuite/
2010-03-02 H.J. Lu <hongjiu.lu@intel.com>
* gdb.arch/amd64-byte.exp: New.
* gdb.arch/amd64-dword.exp: Likewise.
* gdb.arch/amd64-pseudo.c: Likewise.
* gdb.arch/amd64-word.exp: Likewise.
* gdb.arch/i386-byte.exp: Likewise.
* gdb.arch/i386-pseudo.c: Likewise.
* gdb.arch/i386-word.exp: Likewise.
2010-03-02 13:14:36 +00:00
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verbose "Skipping amd64 word register tests."
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return
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}
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set testfile "amd64-word"
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set srcfile amd64-pseudo.c
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set binfile ${objdir}/${subdir}/${testfile}
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2012-06-21 20:46:25 +00:00
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if [get_compiler_info] {
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Support x86 pseudo byte, word and dword registers.
gdb/
2010-03-02 H.J. Lu <hongjiu.lu@intel.com>
* amd64-tdep.c (amd64_byte_names): New.
(amd64_word_names): Likewise.
(amd64_dword_names): Likewise.
(amd64_pseudo_register_name): Likewise.
(amd64_pseudo_register_read): Likewise.
(amd64_pseudo_register_write): Likewise.
(amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs
and num_mmx_regs. Call set_gdbarch_pseudo_register_read,
set_gdbarch_pseudo_register_write and
set_tdesc_pseudo_register_name. Don't call
set_gdbarch_num_pseudo_regs. Don't set mm0_regnum.
* i386-tdep.c (i386_num_mmx_regs): Removed.
(i386_num_pseudo_regs): Likewise.
(i386_byte_names): New.
(i386_word_names): Likewise.
(i386_byte_regnum_p): Likewise.
(i386_word_regnum_p): Likewise.
(i386_mmx_regnum_p): Updated.
(i386_pseudo_register_name): Make it global. Handle byte and
word pseudo-registers.
(i386_pseudo_register_read): Likewise.
(i386_pseudo_register_write): Likewise.
(i386_pseudo_register_type): Handle byte, word and dword
pseudo-registers
(i386_register_reggroup_p): Don't include pseudo
registers, except for MXX, in any register groups. Don't
include pseudo byte, word, dword registers in general_reggroup.
(i386_gdbarch_init): Set num_byte_regs, num_word_regs,
num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX
pseudo-registers after word pseudo-registers. Call
set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi.
* i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs,
al_regnum, num_word_regs, ax_regnum, num_dword_regs and
eax_regnum.
(i386_byte_regnum_p): New.
(i386_word_regnum_p): Likewise.
(i386_dword_regnum_p): Likewise.
(i386_pseudo_register_name): Likewise.
(i386_pseudo_register_read): Likewise.
(i386_pseudo_register_write): Likewise.
gdb/testsuite/
2010-03-02 H.J. Lu <hongjiu.lu@intel.com>
* gdb.arch/amd64-byte.exp: New.
* gdb.arch/amd64-dword.exp: Likewise.
* gdb.arch/amd64-pseudo.c: Likewise.
* gdb.arch/amd64-word.exp: Likewise.
* gdb.arch/i386-byte.exp: Likewise.
* gdb.arch/i386-pseudo.c: Likewise.
* gdb.arch/i386-word.exp: Likewise.
2010-03-02 13:14:36 +00:00
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return -1
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}
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if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable [list debug]] != "" } {
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untested ${testfile}
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return
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}
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gdb_exit
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gdb_start
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gdb_reinitialize_dir $srcdir/$subdir
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gdb_load ${binfile}
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if ![runto_main] then {
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gdb_suppress_tests
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}
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set nr_regs 14
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set word_regs(1) ax
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set word_regs(2) bx
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set word_regs(3) cx
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set word_regs(4) dx
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set word_regs(5) si
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set word_regs(6) di
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set word_regs(7) r8w
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set word_regs(8) r9w
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set word_regs(9) r10w
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set word_regs(10) r11w
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set word_regs(11) r12w
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set word_regs(12) r13w
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set word_regs(13) r14w
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set word_regs(14) r15w
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gdb_test "break [gdb_get_line_number "first breakpoint here"]" \
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"Breakpoint .* at .*${srcfile}.*" \
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"set first breakpoint in main"
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gdb_continue_to_breakpoint "continue to first breakpoint in main"
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for { set r 1 } { $r <= 6 } { incr r } {
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2010-03-30 22:25:59 +00:00
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set hexr [format %x $r]
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Support x86 pseudo byte, word and dword registers.
gdb/
2010-03-02 H.J. Lu <hongjiu.lu@intel.com>
* amd64-tdep.c (amd64_byte_names): New.
(amd64_word_names): Likewise.
(amd64_dword_names): Likewise.
(amd64_pseudo_register_name): Likewise.
(amd64_pseudo_register_read): Likewise.
(amd64_pseudo_register_write): Likewise.
(amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs
and num_mmx_regs. Call set_gdbarch_pseudo_register_read,
set_gdbarch_pseudo_register_write and
set_tdesc_pseudo_register_name. Don't call
set_gdbarch_num_pseudo_regs. Don't set mm0_regnum.
* i386-tdep.c (i386_num_mmx_regs): Removed.
(i386_num_pseudo_regs): Likewise.
(i386_byte_names): New.
(i386_word_names): Likewise.
(i386_byte_regnum_p): Likewise.
(i386_word_regnum_p): Likewise.
(i386_mmx_regnum_p): Updated.
(i386_pseudo_register_name): Make it global. Handle byte and
word pseudo-registers.
(i386_pseudo_register_read): Likewise.
(i386_pseudo_register_write): Likewise.
(i386_pseudo_register_type): Handle byte, word and dword
pseudo-registers
(i386_register_reggroup_p): Don't include pseudo
registers, except for MXX, in any register groups. Don't
include pseudo byte, word, dword registers in general_reggroup.
(i386_gdbarch_init): Set num_byte_regs, num_word_regs,
num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX
pseudo-registers after word pseudo-registers. Call
set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi.
* i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs,
al_regnum, num_word_regs, ax_regnum, num_dword_regs and
eax_regnum.
(i386_byte_regnum_p): New.
(i386_word_regnum_p): Likewise.
(i386_dword_regnum_p): Likewise.
(i386_pseudo_register_name): Likewise.
(i386_pseudo_register_read): Likewise.
(i386_pseudo_register_write): Likewise.
gdb/testsuite/
2010-03-02 H.J. Lu <hongjiu.lu@intel.com>
* gdb.arch/amd64-byte.exp: New.
* gdb.arch/amd64-dword.exp: Likewise.
* gdb.arch/amd64-pseudo.c: Likewise.
* gdb.arch/amd64-word.exp: Likewise.
* gdb.arch/i386-byte.exp: Likewise.
* gdb.arch/i386-pseudo.c: Likewise.
* gdb.arch/i386-word.exp: Likewise.
2010-03-02 13:14:36 +00:00
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gdb_test "print/x \$$word_regs($r)" \
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2010-03-30 22:25:59 +00:00
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".. = 0x${hexr}2${hexr}1" \
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Support x86 pseudo byte, word and dword registers.
gdb/
2010-03-02 H.J. Lu <hongjiu.lu@intel.com>
* amd64-tdep.c (amd64_byte_names): New.
(amd64_word_names): Likewise.
(amd64_dword_names): Likewise.
(amd64_pseudo_register_name): Likewise.
(amd64_pseudo_register_read): Likewise.
(amd64_pseudo_register_write): Likewise.
(amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs
and num_mmx_regs. Call set_gdbarch_pseudo_register_read,
set_gdbarch_pseudo_register_write and
set_tdesc_pseudo_register_name. Don't call
set_gdbarch_num_pseudo_regs. Don't set mm0_regnum.
* i386-tdep.c (i386_num_mmx_regs): Removed.
(i386_num_pseudo_regs): Likewise.
(i386_byte_names): New.
(i386_word_names): Likewise.
(i386_byte_regnum_p): Likewise.
(i386_word_regnum_p): Likewise.
(i386_mmx_regnum_p): Updated.
(i386_pseudo_register_name): Make it global. Handle byte and
word pseudo-registers.
(i386_pseudo_register_read): Likewise.
(i386_pseudo_register_write): Likewise.
(i386_pseudo_register_type): Handle byte, word and dword
pseudo-registers
(i386_register_reggroup_p): Don't include pseudo
registers, except for MXX, in any register groups. Don't
include pseudo byte, word, dword registers in general_reggroup.
(i386_gdbarch_init): Set num_byte_regs, num_word_regs,
num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX
pseudo-registers after word pseudo-registers. Call
set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi.
* i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs,
al_regnum, num_word_regs, ax_regnum, num_dword_regs and
eax_regnum.
(i386_byte_regnum_p): New.
(i386_word_regnum_p): Likewise.
(i386_dword_regnum_p): Likewise.
(i386_pseudo_register_name): Likewise.
(i386_pseudo_register_read): Likewise.
(i386_pseudo_register_write): Likewise.
gdb/testsuite/
2010-03-02 H.J. Lu <hongjiu.lu@intel.com>
* gdb.arch/amd64-byte.exp: New.
* gdb.arch/amd64-dword.exp: Likewise.
* gdb.arch/amd64-pseudo.c: Likewise.
* gdb.arch/amd64-word.exp: Likewise.
* gdb.arch/i386-byte.exp: Likewise.
* gdb.arch/i386-pseudo.c: Likewise.
* gdb.arch/i386-word.exp: Likewise.
2010-03-02 13:14:36 +00:00
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"check contents of %$word_regs($r)"
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}
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gdb_test "break [gdb_get_line_number "second breakpoint here"]" \
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"Breakpoint .* at .*${srcfile}.*" \
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"set second breakpoint in main"
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gdb_continue_to_breakpoint "continue to second breakpoint in main"
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for { set r 7 } { $r <= $nr_regs } { incr r } {
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2010-03-30 22:25:59 +00:00
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set hexr [format %x $r]
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Support x86 pseudo byte, word and dword registers.
gdb/
2010-03-02 H.J. Lu <hongjiu.lu@intel.com>
* amd64-tdep.c (amd64_byte_names): New.
(amd64_word_names): Likewise.
(amd64_dword_names): Likewise.
(amd64_pseudo_register_name): Likewise.
(amd64_pseudo_register_read): Likewise.
(amd64_pseudo_register_write): Likewise.
(amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs
and num_mmx_regs. Call set_gdbarch_pseudo_register_read,
set_gdbarch_pseudo_register_write and
set_tdesc_pseudo_register_name. Don't call
set_gdbarch_num_pseudo_regs. Don't set mm0_regnum.
* i386-tdep.c (i386_num_mmx_regs): Removed.
(i386_num_pseudo_regs): Likewise.
(i386_byte_names): New.
(i386_word_names): Likewise.
(i386_byte_regnum_p): Likewise.
(i386_word_regnum_p): Likewise.
(i386_mmx_regnum_p): Updated.
(i386_pseudo_register_name): Make it global. Handle byte and
word pseudo-registers.
(i386_pseudo_register_read): Likewise.
(i386_pseudo_register_write): Likewise.
(i386_pseudo_register_type): Handle byte, word and dword
pseudo-registers
(i386_register_reggroup_p): Don't include pseudo
registers, except for MXX, in any register groups. Don't
include pseudo byte, word, dword registers in general_reggroup.
(i386_gdbarch_init): Set num_byte_regs, num_word_regs,
num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX
pseudo-registers after word pseudo-registers. Call
set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi.
* i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs,
al_regnum, num_word_regs, ax_regnum, num_dword_regs and
eax_regnum.
(i386_byte_regnum_p): New.
(i386_word_regnum_p): Likewise.
(i386_dword_regnum_p): Likewise.
(i386_pseudo_register_name): Likewise.
(i386_pseudo_register_read): Likewise.
(i386_pseudo_register_write): Likewise.
gdb/testsuite/
2010-03-02 H.J. Lu <hongjiu.lu@intel.com>
* gdb.arch/amd64-byte.exp: New.
* gdb.arch/amd64-dword.exp: Likewise.
* gdb.arch/amd64-pseudo.c: Likewise.
* gdb.arch/amd64-word.exp: Likewise.
* gdb.arch/i386-byte.exp: Likewise.
* gdb.arch/i386-pseudo.c: Likewise.
* gdb.arch/i386-word.exp: Likewise.
2010-03-02 13:14:36 +00:00
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gdb_test "print/x \$$word_regs($r)" \
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2010-03-30 22:25:59 +00:00
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".. = 0x${hexr}2${hexr}1" \
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Support x86 pseudo byte, word and dword registers.
gdb/
2010-03-02 H.J. Lu <hongjiu.lu@intel.com>
* amd64-tdep.c (amd64_byte_names): New.
(amd64_word_names): Likewise.
(amd64_dword_names): Likewise.
(amd64_pseudo_register_name): Likewise.
(amd64_pseudo_register_read): Likewise.
(amd64_pseudo_register_write): Likewise.
(amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs
and num_mmx_regs. Call set_gdbarch_pseudo_register_read,
set_gdbarch_pseudo_register_write and
set_tdesc_pseudo_register_name. Don't call
set_gdbarch_num_pseudo_regs. Don't set mm0_regnum.
* i386-tdep.c (i386_num_mmx_regs): Removed.
(i386_num_pseudo_regs): Likewise.
(i386_byte_names): New.
(i386_word_names): Likewise.
(i386_byte_regnum_p): Likewise.
(i386_word_regnum_p): Likewise.
(i386_mmx_regnum_p): Updated.
(i386_pseudo_register_name): Make it global. Handle byte and
word pseudo-registers.
(i386_pseudo_register_read): Likewise.
(i386_pseudo_register_write): Likewise.
(i386_pseudo_register_type): Handle byte, word and dword
pseudo-registers
(i386_register_reggroup_p): Don't include pseudo
registers, except for MXX, in any register groups. Don't
include pseudo byte, word, dword registers in general_reggroup.
(i386_gdbarch_init): Set num_byte_regs, num_word_regs,
num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX
pseudo-registers after word pseudo-registers. Call
set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi.
* i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs,
al_regnum, num_word_regs, ax_regnum, num_dword_regs and
eax_regnum.
(i386_byte_regnum_p): New.
(i386_word_regnum_p): Likewise.
(i386_dword_regnum_p): Likewise.
(i386_pseudo_register_name): Likewise.
(i386_pseudo_register_read): Likewise.
(i386_pseudo_register_write): Likewise.
gdb/testsuite/
2010-03-02 H.J. Lu <hongjiu.lu@intel.com>
* gdb.arch/amd64-byte.exp: New.
* gdb.arch/amd64-dword.exp: Likewise.
* gdb.arch/amd64-pseudo.c: Likewise.
* gdb.arch/amd64-word.exp: Likewise.
* gdb.arch/i386-byte.exp: Likewise.
* gdb.arch/i386-pseudo.c: Likewise.
* gdb.arch/i386-word.exp: Likewise.
2010-03-02 13:14:36 +00:00
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"check contents of %$word_regs($r)"
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}
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for { set r 1 } { $r <= 6 } { incr r } {
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gdb_test "set var \$$word_regs($r) = $r" "" "set %$word_regs($r)"
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}
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gdb_test "break [gdb_get_line_number "third breakpoint here"]" \
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"Breakpoint .* at .*${srcfile}.*" \
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"set third breakpoint in main"
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gdb_continue_to_breakpoint "continue to third breakpoint in main"
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for { set r 1 } { $r <= 6 } { incr r } {
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gdb_test "print \$$word_regs($r)" \
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".. = $r" \
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"check contents of %$word_regs($r)"
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}
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for { set r 7 } { $r <= $nr_regs } { incr r } {
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gdb_test "set var \$$word_regs($r) = $r" "" "set %$word_regs($r)"
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}
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gdb_test "break [gdb_get_line_number "forth breakpoint here"]" \
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"Breakpoint .* at .*${srcfile}.*" \
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"set forth breakpoint in main"
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gdb_continue_to_breakpoint "continue to forth breakpoint in main"
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for { set r 7 } { $r <= $nr_regs } { incr r } {
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gdb_test "print \$$word_regs($r)" \
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".. = $r" \
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"check contents of %$word_regs($r)"
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}
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