1999-04-16 01:35:26 +00:00
|
|
|
|
/* Main header for the m32r. */
|
|
|
|
|
|
|
|
|
|
|
|
#ifndef SIM_MAIN_H
|
|
|
|
|
|
#define SIM_MAIN_H
|
|
|
|
|
|
|
2015-12-25 07:34:40 +00:00
|
|
|
|
/* This is a global setting. Different cpu families can't mix-n-match -scache
|
|
|
|
|
|
and -pbb. However some cpu families may use -simple while others use
|
|
|
|
|
|
one of -scache/-pbb. */
|
|
|
|
|
|
#define WITH_SCACHE_PBB 1
|
|
|
|
|
|
|
1999-04-16 01:35:26 +00:00
|
|
|
|
#include "symcat.h"
|
|
|
|
|
|
#include "sim-basics.h"
|
|
|
|
|
|
#include "cgen-types.h"
|
|
|
|
|
|
#include "m32r-desc.h"
|
|
|
|
|
|
#include "m32r-opc.h"
|
|
|
|
|
|
#include "arch.h"
|
|
|
|
|
|
#include "sim-base.h"
|
|
|
|
|
|
#include "cgen-sim.h"
|
|
|
|
|
|
#include "m32r-sim.h"
|
|
|
|
|
|
#include "opcode/cgen.h"
|
|
|
|
|
|
|
|
|
|
|
|
/* The _sim_cpu struct. */
|
|
|
|
|
|
|
|
|
|
|
|
struct _sim_cpu {
|
|
|
|
|
|
/* sim/common cpu base. */
|
|
|
|
|
|
sim_cpu_base base;
|
|
|
|
|
|
|
|
|
|
|
|
/* Static parts of cgen. */
|
|
|
|
|
|
CGEN_CPU cgen_cpu;
|
|
|
|
|
|
|
|
|
|
|
|
M32R_MISC_PROFILE m32r_misc_profile;
|
|
|
|
|
|
#define CPU_M32R_MISC_PROFILE(cpu) (& (cpu)->m32r_misc_profile)
|
|
|
|
|
|
|
|
|
|
|
|
/* CPU specific parts go here.
|
|
|
|
|
|
Note that in files that don't need to access these pieces WANT_CPU_FOO
|
|
|
|
|
|
won't be defined and thus these parts won't appear. This is ok in the
|
|
|
|
|
|
sense that things work. It is a source of bugs though.
|
|
|
|
|
|
One has to of course be careful to not take the size of this
|
|
|
|
|
|
struct and no structure members accessed in non-cpu specific files can
|
|
|
|
|
|
go after here. Oh for a better language. */
|
|
|
|
|
|
#if defined (WANT_CPU_M32RBF)
|
|
|
|
|
|
M32RBF_CPU_DATA cpu_data;
|
|
|
|
|
|
#endif
|
2003-12-11 11:33:44 +00:00
|
|
|
|
#if defined (WANT_CPU_M32RXF)
|
|
|
|
|
|
M32RXF_CPU_DATA cpu_data;
|
|
|
|
|
|
#elif defined (WANT_CPU_M32R2F)
|
|
|
|
|
|
M32R2F_CPU_DATA cpu_data;
|
|
|
|
|
|
#endif
|
1999-04-16 01:35:26 +00:00
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
/* The sim_state struct. */
|
|
|
|
|
|
|
|
|
|
|
|
struct sim_state {
|
2015-04-15 05:22:34 +00:00
|
|
|
|
sim_cpu *cpu[MAX_NR_PROCESSORS];
|
1999-04-16 01:35:26 +00:00
|
|
|
|
|
|
|
|
|
|
CGEN_STATE cgen_state;
|
|
|
|
|
|
|
|
|
|
|
|
sim_state_base base;
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
/* Misc. */
|
|
|
|
|
|
|
|
|
|
|
|
/* Catch address exceptions. */
|
|
|
|
|
|
extern SIM_CORE_SIGNAL_FN m32r_core_signal;
|
|
|
|
|
|
#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
|
|
|
|
|
|
m32r_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
|
|
|
|
|
|
(TRANSFER), (ERROR))
|
|
|
|
|
|
|
|
|
|
|
|
/* Default memory size. */
|
2003-12-19 11:44:01 +00:00
|
|
|
|
#ifdef M32R_LINUX
|
|
|
|
|
|
#define M32R_DEFAULT_MEM_SIZE 0x2000000 /* 32M */
|
|
|
|
|
|
#else
|
1999-04-16 01:35:26 +00:00
|
|
|
|
#define M32R_DEFAULT_MEM_SIZE 0x800000 /* 8M */
|
2003-12-19 11:44:01 +00:00
|
|
|
|
#endif
|
1999-04-16 01:35:26 +00:00
|
|
|
|
|
|
|
|
|
|
#endif /* SIM_MAIN_H */
|
