2016-01-01 04:33:14 +00:00
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/* Copyright (C) 2009-2016 Free Software Foundation, Inc.
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Move common aarch64 HW breakpoint/watchpoint code to nat/
When I look at test fails related to watchpoint on aarch64-linux,
I find there are some code duplicates between GDB and GDBserver.
This patch is to move some of them to a nat/aarch64-linux-hw-point.{h,c}.
The only change I do is about the dr_changed_t typedef, which was
ULONGEST in GDB and 'unsigned long long' in GDBserver. Each bit
of dr_changed_t represents a status of each HW breakpoint or
watchpoint register, and the max number of HW breakpoint or watchpoint
registers is 16, so the width of 'unsigned long long' is sufficient.
gdb:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (HFILES_NO_SRCDIR): Add
nat/aarch64-linux-hw-point.h.
(aarch64-linux-hw-point.o): New rule.
* nat/aarch64-linux-hw-point.h: New file.
* nat/aarch64-linux-hw-point.c: New file.
* aarch64-linux-nat.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_linux_set_debug_regs): Likewise.
(aarch64_notify_debug_reg_change): Remove static.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
* config/aarch64/linux.mh (NAT_FILE): Add
aarch64-linux-hw-point.o.
gdb/gdbserver:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (aarch64-linux-hw-point.o): New rule.
* configure.srv (srv_tgtobj): Append aarch64-linux-hw-point.o.
* linux-aarch64-low.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_align_watchpoint): Likewise.
(aarch64_linux_set_debug_regs):
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
2015-07-17 13:32:40 +00:00
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Contributed by ARM Ltd.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "common-defs.h"
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#include "break-common.h"
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aarch64 multi-arch part 6: HW breakpoint on unaligned address
Nowadays, both aarch64 GDB and linux kernel assumes that address for
setting breakpoint should be 4-byte aligned. However that is not true
after we support multi-arch, because thumb instruction can be at 2-byte
aligned address. Patch http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/375141.html
to linux kernel is to teach kernel to handle 2-byte aligned address for
HW breakpoint, while this patch is to teach aarch64 GDB handle 2-byte
aligned address.
First of all, we call gdbarch_breakpoint_from_pc to get the instruction
length rather than using hard-coded 4. Secondly, in GDBserver, we set
length back to 2 if it is 3, because GDB encode 3 in it to indicate it
is a 32-bit thumb breakpoint. Then we relax the address alignment
check from 4-byte aligned to 2-byte aligned.
This patch enables some tests (such as gdb.base/break-idempotent.exp,
gdb.base/cond-eval-mode.exp, gdb.base/watchpoint-reuse-slot.exp,) and
fixes many fails (such as gdb.base/hbreak2.exp) when the program is
compiled in thumb mode on aarch64.
Regression tested on aarch64-linux, both native and gdbserver. This
is the last patch of multi-arch work.
gdb:
2015-10-15 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_insert_hw_breakpoint):
Call gdbarch_breakpoint_from_pc to instruction length.
(aarch64_linux_remove_hw_breakpoint): Likewise.
* common/common-regcache.h (regcache_register_size): Declare.
* nat/aarch64-linux-hw-point.c: Include "common-regcache.h".
(aarch64_point_is_aligned): Set alignment to 2 for breakpoint if
the process is 32bit, otherwise set alignment to 4.
(aarch64_handle_breakpoint): Update comments.
* regcache.c (regcache_register_size): New function.
gdb/gdbserver:
2015-10-15 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_insert_point): Set len to 2
if it is 3.
(aarch64_remove_point): Likewise.
* regcache.c (regcache_register_size): New function.
2015-10-15 14:05:10 +00:00
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#include "common-regcache.h"
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2015-08-25 10:38:29 +00:00
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#include "nat/linux-nat.h"
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Move common aarch64 HW breakpoint/watchpoint code to nat/
When I look at test fails related to watchpoint on aarch64-linux,
I find there are some code duplicates between GDB and GDBserver.
This patch is to move some of them to a nat/aarch64-linux-hw-point.{h,c}.
The only change I do is about the dr_changed_t typedef, which was
ULONGEST in GDB and 'unsigned long long' in GDBserver. Each bit
of dr_changed_t represents a status of each HW breakpoint or
watchpoint register, and the max number of HW breakpoint or watchpoint
registers is 16, so the width of 'unsigned long long' is sufficient.
gdb:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (HFILES_NO_SRCDIR): Add
nat/aarch64-linux-hw-point.h.
(aarch64-linux-hw-point.o): New rule.
* nat/aarch64-linux-hw-point.h: New file.
* nat/aarch64-linux-hw-point.c: New file.
* aarch64-linux-nat.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_linux_set_debug_regs): Likewise.
(aarch64_notify_debug_reg_change): Remove static.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
* config/aarch64/linux.mh (NAT_FILE): Add
aarch64-linux-hw-point.o.
gdb/gdbserver:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (aarch64-linux-hw-point.o): New rule.
* configure.srv (srv_tgtobj): Append aarch64-linux-hw-point.o.
* linux-aarch64-low.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_align_watchpoint): Likewise.
(aarch64_linux_set_debug_regs):
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
2015-07-17 13:32:40 +00:00
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#include "aarch64-linux-hw-point.h"
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#include <sys/uio.h>
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#include <asm/ptrace.h>
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#include <sys/ptrace.h>
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#include <elf.h>
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/* Number of hardware breakpoints/watchpoints the target supports.
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They are initialized with values obtained via the ptrace calls
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with NT_ARM_HW_BREAK and NT_ARM_HW_WATCH respectively. */
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int aarch64_num_bp_regs;
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int aarch64_num_wp_regs;
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/* Utility function that returns the length in bytes of a watchpoint
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according to the content of a hardware debug control register CTRL.
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Note that the kernel currently only supports the following Byte
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Address Select (BAS) values: 0x1, 0x3, 0xf and 0xff, which means
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that for a hardware watchpoint, its valid length can only be 1
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byte, 2 bytes, 4 bytes or 8 bytes. */
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unsigned int
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aarch64_watchpoint_length (unsigned int ctrl)
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{
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switch (DR_CONTROL_LENGTH (ctrl))
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{
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case 0x01:
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return 1;
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case 0x03:
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return 2;
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case 0x0f:
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return 4;
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case 0xff:
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return 8;
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default:
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return 0;
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}
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}
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/* Given the hardware breakpoint or watchpoint type TYPE and its
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length LEN, return the expected encoding for a hardware
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breakpoint/watchpoint control register. */
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static unsigned int
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aarch64_point_encode_ctrl_reg (enum target_hw_bp_type type, int len)
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{
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unsigned int ctrl, ttype;
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/* type */
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switch (type)
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{
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case hw_write:
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ttype = 2;
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break;
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case hw_read:
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ttype = 1;
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break;
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case hw_access:
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ttype = 3;
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break;
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case hw_execute:
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ttype = 0;
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break;
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default:
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perror_with_name (_("Unrecognized breakpoint/watchpoint type"));
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}
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ctrl = ttype << 3;
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/* length bitmask */
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ctrl |= ((1 << len) - 1) << 5;
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/* enabled at el0 */
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ctrl |= (2 << 1) | 1;
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return ctrl;
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}
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/* Addresses to be written to the hardware breakpoint and watchpoint
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value registers need to be aligned; the alignment is 4-byte and
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8-type respectively. Linux kernel rejects any non-aligned address
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it receives from the related ptrace call. Furthermore, the kernel
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currently only supports the following Byte Address Select (BAS)
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values: 0x1, 0x3, 0xf and 0xff, which means that for a hardware
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watchpoint to be accepted by the kernel (via ptrace call), its
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valid length can only be 1 byte, 2 bytes, 4 bytes or 8 bytes.
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Despite these limitations, the unaligned watchpoint is supported in
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this port.
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Return 0 for any non-compliant ADDR and/or LEN; return 1 otherwise. */
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static int
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aarch64_point_is_aligned (int is_watchpoint, CORE_ADDR addr, int len)
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{
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aarch64 multi-arch part 6: HW breakpoint on unaligned address
Nowadays, both aarch64 GDB and linux kernel assumes that address for
setting breakpoint should be 4-byte aligned. However that is not true
after we support multi-arch, because thumb instruction can be at 2-byte
aligned address. Patch http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/375141.html
to linux kernel is to teach kernel to handle 2-byte aligned address for
HW breakpoint, while this patch is to teach aarch64 GDB handle 2-byte
aligned address.
First of all, we call gdbarch_breakpoint_from_pc to get the instruction
length rather than using hard-coded 4. Secondly, in GDBserver, we set
length back to 2 if it is 3, because GDB encode 3 in it to indicate it
is a 32-bit thumb breakpoint. Then we relax the address alignment
check from 4-byte aligned to 2-byte aligned.
This patch enables some tests (such as gdb.base/break-idempotent.exp,
gdb.base/cond-eval-mode.exp, gdb.base/watchpoint-reuse-slot.exp,) and
fixes many fails (such as gdb.base/hbreak2.exp) when the program is
compiled in thumb mode on aarch64.
Regression tested on aarch64-linux, both native and gdbserver. This
is the last patch of multi-arch work.
gdb:
2015-10-15 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_insert_hw_breakpoint):
Call gdbarch_breakpoint_from_pc to instruction length.
(aarch64_linux_remove_hw_breakpoint): Likewise.
* common/common-regcache.h (regcache_register_size): Declare.
* nat/aarch64-linux-hw-point.c: Include "common-regcache.h".
(aarch64_point_is_aligned): Set alignment to 2 for breakpoint if
the process is 32bit, otherwise set alignment to 4.
(aarch64_handle_breakpoint): Update comments.
* regcache.c (regcache_register_size): New function.
gdb/gdbserver:
2015-10-15 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_insert_point): Set len to 2
if it is 3.
(aarch64_remove_point): Likewise.
* regcache.c (regcache_register_size): New function.
2015-10-15 14:05:10 +00:00
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unsigned int alignment = 0;
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if (is_watchpoint)
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alignment = AARCH64_HWP_ALIGNMENT;
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else
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{
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struct regcache *regcache
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= get_thread_regcache_for_ptid (current_lwp_ptid ());
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/* Set alignment to 2 only if the current process is 32-bit,
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since thumb instruction can be 2-byte aligned. Otherwise, set
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alignment to AARCH64_HBP_ALIGNMENT. */
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if (regcache_register_size (regcache, 0) == 8)
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alignment = AARCH64_HBP_ALIGNMENT;
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else
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alignment = 2;
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}
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Move common aarch64 HW breakpoint/watchpoint code to nat/
When I look at test fails related to watchpoint on aarch64-linux,
I find there are some code duplicates between GDB and GDBserver.
This patch is to move some of them to a nat/aarch64-linux-hw-point.{h,c}.
The only change I do is about the dr_changed_t typedef, which was
ULONGEST in GDB and 'unsigned long long' in GDBserver. Each bit
of dr_changed_t represents a status of each HW breakpoint or
watchpoint register, and the max number of HW breakpoint or watchpoint
registers is 16, so the width of 'unsigned long long' is sufficient.
gdb:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (HFILES_NO_SRCDIR): Add
nat/aarch64-linux-hw-point.h.
(aarch64-linux-hw-point.o): New rule.
* nat/aarch64-linux-hw-point.h: New file.
* nat/aarch64-linux-hw-point.c: New file.
* aarch64-linux-nat.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_linux_set_debug_regs): Likewise.
(aarch64_notify_debug_reg_change): Remove static.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
* config/aarch64/linux.mh (NAT_FILE): Add
aarch64-linux-hw-point.o.
gdb/gdbserver:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (aarch64-linux-hw-point.o): New rule.
* configure.srv (srv_tgtobj): Append aarch64-linux-hw-point.o.
* linux-aarch64-low.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_align_watchpoint): Likewise.
(aarch64_linux_set_debug_regs):
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
2015-07-17 13:32:40 +00:00
|
|
|
|
|
|
|
if (addr & (alignment - 1))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (len != 8 && len != 4 && len != 2 && len != 1)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Given the (potentially unaligned) watchpoint address in ADDR and
|
|
|
|
length in LEN, return the aligned address and aligned length in
|
|
|
|
*ALIGNED_ADDR_P and *ALIGNED_LEN_P, respectively. The returned
|
|
|
|
aligned address and length will be valid values to write to the
|
|
|
|
hardware watchpoint value and control registers.
|
|
|
|
|
|
|
|
The given watchpoint may get truncated if more than one hardware
|
|
|
|
register is needed to cover the watched region. *NEXT_ADDR_P
|
|
|
|
and *NEXT_LEN_P, if non-NULL, will return the address and length
|
|
|
|
of the remaining part of the watchpoint (which can be processed
|
|
|
|
by calling this routine again to generate another aligned address
|
|
|
|
and length pair.
|
|
|
|
|
|
|
|
Essentially, unaligned watchpoint is achieved by minimally
|
|
|
|
enlarging the watched area to meet the alignment requirement, and
|
|
|
|
if necessary, splitting the watchpoint over several hardware
|
|
|
|
watchpoint registers. The trade-off is that there will be
|
|
|
|
false-positive hits for the read-type or the access-type hardware
|
|
|
|
watchpoints; for the write type, which is more commonly used, there
|
|
|
|
will be no such issues, as the higher-level breakpoint management
|
|
|
|
in gdb always examines the exact watched region for any content
|
|
|
|
change, and transparently resumes a thread from a watchpoint trap
|
|
|
|
if there is no change to the watched region.
|
|
|
|
|
|
|
|
Another limitation is that because the watched region is enlarged,
|
|
|
|
the watchpoint fault address returned by
|
|
|
|
aarch64_stopped_data_address may be outside of the original watched
|
|
|
|
region, especially when the triggering instruction is accessing a
|
|
|
|
larger region. When the fault address is not within any known
|
|
|
|
range, watchpoints_triggered in gdb will get confused, as the
|
|
|
|
higher-level watchpoint management is only aware of original
|
|
|
|
watched regions, and will think that some unknown watchpoint has
|
|
|
|
been triggered. In such a case, gdb may stop without displaying
|
|
|
|
any detailed information.
|
|
|
|
|
|
|
|
Once the kernel provides the full support for Byte Address Select
|
|
|
|
(BAS) in the hardware watchpoint control register, these
|
|
|
|
limitations can be largely relaxed with some further work. */
|
|
|
|
|
|
|
|
static void
|
|
|
|
aarch64_align_watchpoint (CORE_ADDR addr, int len, CORE_ADDR *aligned_addr_p,
|
|
|
|
int *aligned_len_p, CORE_ADDR *next_addr_p,
|
|
|
|
int *next_len_p)
|
|
|
|
{
|
|
|
|
int aligned_len;
|
|
|
|
unsigned int offset;
|
|
|
|
CORE_ADDR aligned_addr;
|
|
|
|
const unsigned int alignment = AARCH64_HWP_ALIGNMENT;
|
|
|
|
const unsigned int max_wp_len = AARCH64_HWP_MAX_LEN_PER_REG;
|
|
|
|
|
|
|
|
/* As assumed by the algorithm. */
|
|
|
|
gdb_assert (alignment == max_wp_len);
|
|
|
|
|
|
|
|
if (len <= 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* Address to be put into the hardware watchpoint value register
|
|
|
|
must be aligned. */
|
|
|
|
offset = addr & (alignment - 1);
|
|
|
|
aligned_addr = addr - offset;
|
|
|
|
|
|
|
|
gdb_assert (offset >= 0 && offset < alignment);
|
|
|
|
gdb_assert (aligned_addr >= 0 && aligned_addr <= addr);
|
|
|
|
gdb_assert (offset + len > 0);
|
|
|
|
|
|
|
|
if (offset + len >= max_wp_len)
|
|
|
|
{
|
|
|
|
/* Need more than one watchpoint registers; truncate it at the
|
|
|
|
alignment boundary. */
|
|
|
|
aligned_len = max_wp_len;
|
|
|
|
len -= (max_wp_len - offset);
|
|
|
|
addr += (max_wp_len - offset);
|
|
|
|
gdb_assert ((addr & (alignment - 1)) == 0);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* Find the smallest valid length that is large enough to
|
|
|
|
accommodate this watchpoint. */
|
|
|
|
static const unsigned char
|
|
|
|
aligned_len_array[AARCH64_HWP_MAX_LEN_PER_REG] =
|
|
|
|
{ 1, 2, 4, 4, 8, 8, 8, 8 };
|
|
|
|
|
|
|
|
aligned_len = aligned_len_array[offset + len - 1];
|
|
|
|
addr += len;
|
|
|
|
len = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (aligned_addr_p)
|
|
|
|
*aligned_addr_p = aligned_addr;
|
|
|
|
if (aligned_len_p)
|
|
|
|
*aligned_len_p = aligned_len;
|
|
|
|
if (next_addr_p)
|
|
|
|
*next_addr_p = addr;
|
|
|
|
if (next_len_p)
|
|
|
|
*next_len_p = len;
|
|
|
|
}
|
|
|
|
|
2015-08-25 10:38:29 +00:00
|
|
|
struct aarch64_dr_update_callback_param
|
|
|
|
{
|
|
|
|
int is_watchpoint;
|
|
|
|
unsigned int idx;
|
|
|
|
};
|
|
|
|
|
|
|
|
/* Callback for iterate_over_lwps. Records the
|
|
|
|
information about the change of one hardware breakpoint/watchpoint
|
|
|
|
setting for the thread LWP.
|
|
|
|
The information is passed in via PTR.
|
|
|
|
N.B. The actual updating of hardware debug registers is not
|
|
|
|
carried out until the moment the thread is resumed. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
debug_reg_change_callback (struct lwp_info *lwp, void *ptr)
|
|
|
|
{
|
|
|
|
struct aarch64_dr_update_callback_param *param_p
|
|
|
|
= (struct aarch64_dr_update_callback_param *) ptr;
|
2015-08-25 13:08:45 +00:00
|
|
|
int tid = ptid_get_lwp (ptid_of_lwp (lwp));
|
2015-08-25 10:38:29 +00:00
|
|
|
int idx = param_p->idx;
|
|
|
|
int is_watchpoint = param_p->is_watchpoint;
|
|
|
|
struct arch_lwp_info *info = lwp_arch_private_info (lwp);
|
|
|
|
dr_changed_t *dr_changed_ptr;
|
|
|
|
dr_changed_t dr_changed;
|
|
|
|
|
|
|
|
if (info == NULL)
|
|
|
|
{
|
|
|
|
info = XCNEW (struct arch_lwp_info);
|
|
|
|
lwp_set_arch_private_info (lwp, info);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (show_debug_regs)
|
|
|
|
{
|
|
|
|
debug_printf ("debug_reg_change_callback: \n\tOn entry:\n");
|
2015-08-25 13:08:45 +00:00
|
|
|
debug_printf ("\ttid%d, dr_changed_bp=0x%s, "
|
|
|
|
"dr_changed_wp=0x%s\n", tid,
|
2015-08-25 10:38:29 +00:00
|
|
|
phex (info->dr_changed_bp, 8),
|
|
|
|
phex (info->dr_changed_wp, 8));
|
|
|
|
}
|
|
|
|
|
|
|
|
dr_changed_ptr = is_watchpoint ? &info->dr_changed_wp
|
|
|
|
: &info->dr_changed_bp;
|
|
|
|
dr_changed = *dr_changed_ptr;
|
|
|
|
|
|
|
|
gdb_assert (idx >= 0
|
|
|
|
&& (idx <= (is_watchpoint ? aarch64_num_wp_regs
|
|
|
|
: aarch64_num_bp_regs)));
|
|
|
|
|
|
|
|
/* The actual update is done later just before resuming the lwp,
|
|
|
|
we just mark that one register pair needs updating. */
|
|
|
|
DR_MARK_N_CHANGED (dr_changed, idx);
|
|
|
|
*dr_changed_ptr = dr_changed;
|
|
|
|
|
|
|
|
/* If the lwp isn't stopped, force it to momentarily pause, so
|
|
|
|
we can update its debug registers. */
|
|
|
|
if (!lwp_is_stopped (lwp))
|
|
|
|
linux_stop_lwp (lwp);
|
|
|
|
|
|
|
|
if (show_debug_regs)
|
|
|
|
{
|
2015-08-25 13:08:45 +00:00
|
|
|
debug_printf ("\tOn exit:\n\ttid%d, dr_changed_bp=0x%s, "
|
|
|
|
"dr_changed_wp=0x%s\n", tid,
|
2015-08-25 10:38:29 +00:00
|
|
|
phex (info->dr_changed_bp, 8),
|
|
|
|
phex (info->dr_changed_wp, 8));
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Notify each thread that their IDXth breakpoint/watchpoint register
|
|
|
|
pair needs to be updated. The message will be recorded in each
|
|
|
|
thread's arch-specific data area, the actual updating will be done
|
|
|
|
when the thread is resumed. */
|
|
|
|
|
|
|
|
static void
|
|
|
|
aarch64_notify_debug_reg_change (const struct aarch64_debug_reg_state *state,
|
|
|
|
int is_watchpoint, unsigned int idx)
|
|
|
|
{
|
|
|
|
struct aarch64_dr_update_callback_param param;
|
|
|
|
ptid_t pid_ptid = pid_to_ptid (ptid_get_pid (current_lwp_ptid ()));
|
|
|
|
|
|
|
|
param.is_watchpoint = is_watchpoint;
|
|
|
|
param.idx = idx;
|
|
|
|
|
|
|
|
iterate_over_lwps (pid_ptid, debug_reg_change_callback, (void *) ¶m);
|
|
|
|
}
|
|
|
|
|
Move common aarch64 HW breakpoint/watchpoint code to nat/
When I look at test fails related to watchpoint on aarch64-linux,
I find there are some code duplicates between GDB and GDBserver.
This patch is to move some of them to a nat/aarch64-linux-hw-point.{h,c}.
The only change I do is about the dr_changed_t typedef, which was
ULONGEST in GDB and 'unsigned long long' in GDBserver. Each bit
of dr_changed_t represents a status of each HW breakpoint or
watchpoint register, and the max number of HW breakpoint or watchpoint
registers is 16, so the width of 'unsigned long long' is sufficient.
gdb:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (HFILES_NO_SRCDIR): Add
nat/aarch64-linux-hw-point.h.
(aarch64-linux-hw-point.o): New rule.
* nat/aarch64-linux-hw-point.h: New file.
* nat/aarch64-linux-hw-point.c: New file.
* aarch64-linux-nat.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_linux_set_debug_regs): Likewise.
(aarch64_notify_debug_reg_change): Remove static.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
* config/aarch64/linux.mh (NAT_FILE): Add
aarch64-linux-hw-point.o.
gdb/gdbserver:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (aarch64-linux-hw-point.o): New rule.
* configure.srv (srv_tgtobj): Append aarch64-linux-hw-point.o.
* linux-aarch64-low.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_align_watchpoint): Likewise.
(aarch64_linux_set_debug_regs):
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
2015-07-17 13:32:40 +00:00
|
|
|
/* Record the insertion of one breakpoint/watchpoint, as represented
|
|
|
|
by ADDR and CTRL, in the process' arch-specific data area *STATE. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
aarch64_dr_state_insert_one_point (struct aarch64_debug_reg_state *state,
|
|
|
|
enum target_hw_bp_type type,
|
|
|
|
CORE_ADDR addr, int len)
|
|
|
|
{
|
|
|
|
int i, idx, num_regs, is_watchpoint;
|
|
|
|
unsigned int ctrl, *dr_ctrl_p, *dr_ref_count;
|
|
|
|
CORE_ADDR *dr_addr_p;
|
|
|
|
|
|
|
|
/* Set up state pointers. */
|
|
|
|
is_watchpoint = (type != hw_execute);
|
|
|
|
gdb_assert (aarch64_point_is_aligned (is_watchpoint, addr, len));
|
|
|
|
if (is_watchpoint)
|
|
|
|
{
|
|
|
|
num_regs = aarch64_num_wp_regs;
|
|
|
|
dr_addr_p = state->dr_addr_wp;
|
|
|
|
dr_ctrl_p = state->dr_ctrl_wp;
|
|
|
|
dr_ref_count = state->dr_ref_count_wp;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
num_regs = aarch64_num_bp_regs;
|
|
|
|
dr_addr_p = state->dr_addr_bp;
|
|
|
|
dr_ctrl_p = state->dr_ctrl_bp;
|
|
|
|
dr_ref_count = state->dr_ref_count_bp;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl = aarch64_point_encode_ctrl_reg (type, len);
|
|
|
|
|
|
|
|
/* Find an existing or free register in our cache. */
|
|
|
|
idx = -1;
|
|
|
|
for (i = 0; i < num_regs; ++i)
|
|
|
|
{
|
|
|
|
if ((dr_ctrl_p[i] & 1) == 0)
|
|
|
|
{
|
|
|
|
gdb_assert (dr_ref_count[i] == 0);
|
|
|
|
idx = i;
|
|
|
|
/* no break; continue hunting for an exising one. */
|
|
|
|
}
|
|
|
|
else if (dr_addr_p[i] == addr && dr_ctrl_p[i] == ctrl)
|
|
|
|
{
|
|
|
|
gdb_assert (dr_ref_count[i] != 0);
|
|
|
|
idx = i;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* No space. */
|
|
|
|
if (idx == -1)
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
/* Update our cache. */
|
|
|
|
if ((dr_ctrl_p[idx] & 1) == 0)
|
|
|
|
{
|
|
|
|
/* new entry */
|
|
|
|
dr_addr_p[idx] = addr;
|
|
|
|
dr_ctrl_p[idx] = ctrl;
|
|
|
|
dr_ref_count[idx] = 1;
|
|
|
|
/* Notify the change. */
|
|
|
|
aarch64_notify_debug_reg_change (state, is_watchpoint, idx);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* existing entry */
|
|
|
|
dr_ref_count[idx]++;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Record the removal of one breakpoint/watchpoint, as represented by
|
|
|
|
ADDR and CTRL, in the process' arch-specific data area *STATE. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
aarch64_dr_state_remove_one_point (struct aarch64_debug_reg_state *state,
|
|
|
|
enum target_hw_bp_type type,
|
|
|
|
CORE_ADDR addr, int len)
|
|
|
|
{
|
|
|
|
int i, num_regs, is_watchpoint;
|
|
|
|
unsigned int ctrl, *dr_ctrl_p, *dr_ref_count;
|
|
|
|
CORE_ADDR *dr_addr_p;
|
|
|
|
|
|
|
|
/* Set up state pointers. */
|
|
|
|
is_watchpoint = (type != hw_execute);
|
|
|
|
if (is_watchpoint)
|
|
|
|
{
|
|
|
|
num_regs = aarch64_num_wp_regs;
|
|
|
|
dr_addr_p = state->dr_addr_wp;
|
|
|
|
dr_ctrl_p = state->dr_ctrl_wp;
|
|
|
|
dr_ref_count = state->dr_ref_count_wp;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
num_regs = aarch64_num_bp_regs;
|
|
|
|
dr_addr_p = state->dr_addr_bp;
|
|
|
|
dr_ctrl_p = state->dr_ctrl_bp;
|
|
|
|
dr_ref_count = state->dr_ref_count_bp;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl = aarch64_point_encode_ctrl_reg (type, len);
|
|
|
|
|
|
|
|
/* Find the entry that matches the ADDR and CTRL. */
|
|
|
|
for (i = 0; i < num_regs; ++i)
|
|
|
|
if (dr_addr_p[i] == addr && dr_ctrl_p[i] == ctrl)
|
|
|
|
{
|
|
|
|
gdb_assert (dr_ref_count[i] != 0);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Not found. */
|
|
|
|
if (i == num_regs)
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
/* Clear our cache. */
|
|
|
|
if (--dr_ref_count[i] == 0)
|
|
|
|
{
|
|
|
|
/* Clear the enable bit. */
|
|
|
|
ctrl &= ~1;
|
|
|
|
dr_addr_p[i] = 0;
|
|
|
|
dr_ctrl_p[i] = ctrl;
|
|
|
|
/* Notify the change. */
|
|
|
|
aarch64_notify_debug_reg_change (state, is_watchpoint, i);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
aarch64_handle_breakpoint (enum target_hw_bp_type type, CORE_ADDR addr,
|
|
|
|
int len, int is_insert,
|
|
|
|
struct aarch64_debug_reg_state *state)
|
|
|
|
{
|
|
|
|
if (is_insert)
|
[AArch64] Only check breakpoint alignment on inserting
This patch fixes the GDB internal error on AArch64 when running
watchpoint-fork.exp
top?bt 15
internal_error (file=file@entry=0x79d558 "../../binutils-gdb/gdb/linux-nat.c", line=line@entry=4866, fmt=0x793b20 "%s: Assertion `%s' failed.")
at ../../binutils-gdb/gdb/common/errors.c:51
#1 0x0000000000495bc4 in linux_nat_thread_address_space (t=<optimized out>, ptid=<error reading variable: Cannot access memory at address 0x1302>)
at ../../binutils-gdb/gdb/linux-nat.c:4866
#2 0x00000000005db2c8 in delegate_thread_address_space (self=<optimized out>, arg1=<error reading variable: Cannot access memory at address 0x1302>)
at ../../binutils-gdb/gdb/target-delegates.c:2447
#3 0x00000000005e8c7c in target_thread_address_space (ptid=<error reading variable: Cannot access memory at address 0x1302>)
at ../../binutils-gdb/gdb/target.c:2727
#4 0x000000000054eef8 in get_thread_arch_regcache (ptid=..., gdbarch=0xad51e0) at ../../binutils-gdb/gdb/regcache.c:529
#5 0x000000000054efcc in get_thread_regcache (ptid=...) at ../../binutils-gdb/gdb/regcache.c:546
#6 0x000000000054f120 in get_thread_regcache_for_ptid (ptid=...) at ../../binutils-gdb/gdb/regcache.c:560
#7 0x00000000004a2278 in aarch64_point_is_aligned (is_watchpoint=0, addr=34168, len=2) at ../../binutils-gdb/gdb/nat/aarch64-linux-hw-point.c:122
#8 0x00000000004a2e68 in aarch64_handle_breakpoint (type=hw_execute, addr=34168, len=2, is_insert=0, state=0xae8880)
at ../../binutils-gdb/gdb/nat/aarch64-linux-hw-point.c:465
#9 0x000000000048edf0 in aarch64_linux_remove_hw_breakpoint (self=<optimized out>, gdbarch=<optimized out>, bp_tgt=<optimized out>)
at ../../binutils-gdb/gdb/aarch64-linux-nat.c:657
#10 0x00000000005da8dc in delegate_remove_hw_breakpoint (self=<optimized out>, arg1=<optimized out>, arg2=<optimized out>)
at ../../binutils-gdb/gdb/target-delegates.c:492
#11 0x0000000000536a24 in bkpt_remove_location (bl=<optimized out>) at ../../binutils-gdb/gdb/breakpoint.c:13065
#12 0x000000000053351c in remove_breakpoint_1 (bl=0xb3fe70, is=is@entry=mark_inserted) at ../../binutils-gdb/gdb/breakpoint.c:4026
#13 0x000000000053ccc0 in detach_breakpoints (ptid=...) at ../../binutils-gdb/gdb/breakpoint.c:3930
#14 0x00000000005a3ac0 in handle_inferior_event_1 (ecs=0x7ffffff048) at ../../binutils-gdb/gdb/infrun.c:5042
After the fork, GDB will physically remove the breakpoints from the child
process (in frame #14), but at that time, GDB doesn't create an inferior
yet for child, but inferior_ptid is set to child's ptid (in frame #13).
In aarch64_point_is_aligned, we'll get the regcache of current_lwp_ptid
to determine if the current process is 32-bit or 64-bit, so the inferior
can't be found, and the internal error is caused.
I don't find a better fix other than not checking alignment on removing
breakpoint.
gdb:
2015-11-27 Yao Qi <yao.qi@linaro.org>
* nat/aarch64-linux-hw-point.c (aarch64_dr_state_remove_one_point):
Don't assert on alignment.
(aarch64_handle_breakpoint): Only check alignment when IS_INSERT
is true.
2015-11-27 14:53:32 +00:00
|
|
|
{
|
|
|
|
/* The hardware breakpoint on AArch64 should always be 4-byte
|
|
|
|
aligned, but on AArch32, it can be 2-byte aligned. Note that
|
|
|
|
we only check the alignment on inserting breakpoint because
|
|
|
|
aarch64_point_is_aligned needs the inferior_ptid inferior's
|
|
|
|
regcache to decide whether the inferior is 32-bit or 64-bit.
|
|
|
|
However when GDB follows the parent process and detach breakpoints
|
|
|
|
from child process, inferior_ptid is the child ptid, but the
|
|
|
|
child inferior doesn't exist in GDB's view yet. */
|
|
|
|
if (!aarch64_point_is_aligned (0 /* is_watchpoint */ , addr, len))
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
return aarch64_dr_state_insert_one_point (state, type, addr, len);
|
|
|
|
}
|
Move common aarch64 HW breakpoint/watchpoint code to nat/
When I look at test fails related to watchpoint on aarch64-linux,
I find there are some code duplicates between GDB and GDBserver.
This patch is to move some of them to a nat/aarch64-linux-hw-point.{h,c}.
The only change I do is about the dr_changed_t typedef, which was
ULONGEST in GDB and 'unsigned long long' in GDBserver. Each bit
of dr_changed_t represents a status of each HW breakpoint or
watchpoint register, and the max number of HW breakpoint or watchpoint
registers is 16, so the width of 'unsigned long long' is sufficient.
gdb:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (HFILES_NO_SRCDIR): Add
nat/aarch64-linux-hw-point.h.
(aarch64-linux-hw-point.o): New rule.
* nat/aarch64-linux-hw-point.h: New file.
* nat/aarch64-linux-hw-point.c: New file.
* aarch64-linux-nat.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_linux_set_debug_regs): Likewise.
(aarch64_notify_debug_reg_change): Remove static.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
* config/aarch64/linux.mh (NAT_FILE): Add
aarch64-linux-hw-point.o.
gdb/gdbserver:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (aarch64-linux-hw-point.o): New rule.
* configure.srv (srv_tgtobj): Append aarch64-linux-hw-point.o.
* linux-aarch64-low.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_align_watchpoint): Likewise.
(aarch64_linux_set_debug_regs):
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
2015-07-17 13:32:40 +00:00
|
|
|
else
|
|
|
|
return aarch64_dr_state_remove_one_point (state, type, addr, len);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This is essentially the same as aarch64_handle_breakpoint, apart
|
|
|
|
from that it is an aligned watchpoint to be handled. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
aarch64_handle_aligned_watchpoint (enum target_hw_bp_type type,
|
|
|
|
CORE_ADDR addr, int len, int is_insert,
|
|
|
|
struct aarch64_debug_reg_state *state)
|
|
|
|
{
|
|
|
|
if (is_insert)
|
|
|
|
return aarch64_dr_state_insert_one_point (state, type, addr, len);
|
|
|
|
else
|
|
|
|
return aarch64_dr_state_remove_one_point (state, type, addr, len);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Insert/remove unaligned watchpoint by calling
|
|
|
|
aarch64_align_watchpoint repeatedly until the whole watched region,
|
|
|
|
as represented by ADDR and LEN, has been properly aligned and ready
|
|
|
|
to be written to one or more hardware watchpoint registers.
|
|
|
|
IS_INSERT indicates whether this is an insertion or a deletion.
|
|
|
|
Return 0 if succeed. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
aarch64_handle_unaligned_watchpoint (enum target_hw_bp_type type,
|
|
|
|
CORE_ADDR addr, int len, int is_insert,
|
|
|
|
struct aarch64_debug_reg_state *state)
|
|
|
|
{
|
|
|
|
while (len > 0)
|
|
|
|
{
|
|
|
|
CORE_ADDR aligned_addr;
|
|
|
|
int aligned_len, ret;
|
|
|
|
|
|
|
|
aarch64_align_watchpoint (addr, len, &aligned_addr, &aligned_len,
|
|
|
|
&addr, &len);
|
|
|
|
|
|
|
|
if (is_insert)
|
|
|
|
ret = aarch64_dr_state_insert_one_point (state, type, aligned_addr,
|
|
|
|
aligned_len);
|
|
|
|
else
|
|
|
|
ret = aarch64_dr_state_remove_one_point (state, type, aligned_addr,
|
|
|
|
aligned_len);
|
|
|
|
|
|
|
|
if (show_debug_regs)
|
2015-07-20 15:29:16 +00:00
|
|
|
debug_printf ("handle_unaligned_watchpoint: is_insert: %d\n"
|
|
|
|
" "
|
|
|
|
"aligned_addr: %s, aligned_len: %d\n"
|
|
|
|
" "
|
|
|
|
"next_addr: %s, next_len: %d\n",
|
|
|
|
is_insert, core_addr_to_string_nz (aligned_addr),
|
|
|
|
aligned_len, core_addr_to_string_nz (addr), len);
|
Move common aarch64 HW breakpoint/watchpoint code to nat/
When I look at test fails related to watchpoint on aarch64-linux,
I find there are some code duplicates between GDB and GDBserver.
This patch is to move some of them to a nat/aarch64-linux-hw-point.{h,c}.
The only change I do is about the dr_changed_t typedef, which was
ULONGEST in GDB and 'unsigned long long' in GDBserver. Each bit
of dr_changed_t represents a status of each HW breakpoint or
watchpoint register, and the max number of HW breakpoint or watchpoint
registers is 16, so the width of 'unsigned long long' is sufficient.
gdb:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (HFILES_NO_SRCDIR): Add
nat/aarch64-linux-hw-point.h.
(aarch64-linux-hw-point.o): New rule.
* nat/aarch64-linux-hw-point.h: New file.
* nat/aarch64-linux-hw-point.c: New file.
* aarch64-linux-nat.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_linux_set_debug_regs): Likewise.
(aarch64_notify_debug_reg_change): Remove static.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
* config/aarch64/linux.mh (NAT_FILE): Add
aarch64-linux-hw-point.o.
gdb/gdbserver:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (aarch64-linux-hw-point.o): New rule.
* configure.srv (srv_tgtobj): Append aarch64-linux-hw-point.o.
* linux-aarch64-low.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_align_watchpoint): Likewise.
(aarch64_linux_set_debug_regs):
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
2015-07-17 13:32:40 +00:00
|
|
|
|
|
|
|
if (ret != 0)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
aarch64_handle_watchpoint (enum target_hw_bp_type type, CORE_ADDR addr,
|
|
|
|
int len, int is_insert,
|
|
|
|
struct aarch64_debug_reg_state *state)
|
|
|
|
{
|
|
|
|
if (aarch64_point_is_aligned (1 /* is_watchpoint */ , addr, len))
|
|
|
|
return aarch64_handle_aligned_watchpoint (type, addr, len, is_insert,
|
|
|
|
state);
|
|
|
|
else
|
|
|
|
return aarch64_handle_unaligned_watchpoint (type, addr, len, is_insert,
|
|
|
|
state);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Call ptrace to set the thread TID's hardware breakpoint/watchpoint
|
|
|
|
registers with data from *STATE. */
|
|
|
|
|
|
|
|
void
|
|
|
|
aarch64_linux_set_debug_regs (const struct aarch64_debug_reg_state *state,
|
|
|
|
int tid, int watchpoint)
|
|
|
|
{
|
|
|
|
int i, count;
|
|
|
|
struct iovec iov;
|
|
|
|
struct user_hwdebug_state regs;
|
|
|
|
const CORE_ADDR *addr;
|
|
|
|
const unsigned int *ctrl;
|
|
|
|
|
|
|
|
memset (®s, 0, sizeof (regs));
|
|
|
|
iov.iov_base = ®s;
|
|
|
|
count = watchpoint ? aarch64_num_wp_regs : aarch64_num_bp_regs;
|
|
|
|
addr = watchpoint ? state->dr_addr_wp : state->dr_addr_bp;
|
|
|
|
ctrl = watchpoint ? state->dr_ctrl_wp : state->dr_ctrl_bp;
|
|
|
|
if (count == 0)
|
|
|
|
return;
|
2015-11-19 15:17:36 +00:00
|
|
|
iov.iov_len = (offsetof (struct user_hwdebug_state, dbg_regs)
|
|
|
|
+ count * sizeof (regs.dbg_regs[0]));
|
Move common aarch64 HW breakpoint/watchpoint code to nat/
When I look at test fails related to watchpoint on aarch64-linux,
I find there are some code duplicates between GDB and GDBserver.
This patch is to move some of them to a nat/aarch64-linux-hw-point.{h,c}.
The only change I do is about the dr_changed_t typedef, which was
ULONGEST in GDB and 'unsigned long long' in GDBserver. Each bit
of dr_changed_t represents a status of each HW breakpoint or
watchpoint register, and the max number of HW breakpoint or watchpoint
registers is 16, so the width of 'unsigned long long' is sufficient.
gdb:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (HFILES_NO_SRCDIR): Add
nat/aarch64-linux-hw-point.h.
(aarch64-linux-hw-point.o): New rule.
* nat/aarch64-linux-hw-point.h: New file.
* nat/aarch64-linux-hw-point.c: New file.
* aarch64-linux-nat.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_linux_set_debug_regs): Likewise.
(aarch64_notify_debug_reg_change): Remove static.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
* config/aarch64/linux.mh (NAT_FILE): Add
aarch64-linux-hw-point.o.
gdb/gdbserver:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (aarch64-linux-hw-point.o): New rule.
* configure.srv (srv_tgtobj): Append aarch64-linux-hw-point.o.
* linux-aarch64-low.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_align_watchpoint): Likewise.
(aarch64_linux_set_debug_regs):
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
2015-07-17 13:32:40 +00:00
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for (i = 0; i < count; i++)
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{
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regs.dbg_regs[i].addr = addr[i];
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regs.dbg_regs[i].ctrl = ctrl[i];
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}
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if (ptrace (PTRACE_SETREGSET, tid,
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watchpoint ? NT_ARM_HW_WATCH : NT_ARM_HW_BREAK,
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(void *) &iov))
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error (_("Unexpected error setting hardware debug registers"));
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}
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/* Print the values of the cached breakpoint/watchpoint registers. */
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void
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aarch64_show_debug_reg_state (struct aarch64_debug_reg_state *state,
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const char *func, CORE_ADDR addr,
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int len, enum target_hw_bp_type type)
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{
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int i;
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debug_printf ("%s", func);
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if (addr || len)
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debug_printf (" (addr=0x%08lx, len=%d, type=%s)",
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(unsigned long) addr, len,
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type == hw_write ? "hw-write-watchpoint"
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: (type == hw_read ? "hw-read-watchpoint"
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: (type == hw_access ? "hw-access-watchpoint"
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: (type == hw_execute ? "hw-breakpoint"
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: "??unknown??"))));
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debug_printf (":\n");
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debug_printf ("\tBREAKPOINTs:\n");
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for (i = 0; i < aarch64_num_bp_regs; i++)
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debug_printf ("\tBP%d: addr=%s, ctrl=0x%08x, ref.count=%d\n",
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i, core_addr_to_string_nz (state->dr_addr_bp[i]),
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state->dr_ctrl_bp[i], state->dr_ref_count_bp[i]);
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debug_printf ("\tWATCHPOINTs:\n");
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for (i = 0; i < aarch64_num_wp_regs; i++)
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debug_printf ("\tWP%d: addr=%s, ctrl=0x%08x, ref.count=%d\n",
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i, core_addr_to_string_nz (state->dr_addr_wp[i]),
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state->dr_ctrl_wp[i], state->dr_ref_count_wp[i]);
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}
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2015-07-21 15:33:41 +00:00
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/* Get the hardware debug register capacity information from the
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process represented by TID. */
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void
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aarch64_linux_get_debug_reg_capacity (int tid)
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{
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struct iovec iov;
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struct user_hwdebug_state dreg_state;
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iov.iov_base = &dreg_state;
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iov.iov_len = sizeof (dreg_state);
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/* Get hardware watchpoint register info. */
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if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_HW_WATCH, &iov) == 0
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&& AARCH64_DEBUG_ARCH (dreg_state.dbg_info) == AARCH64_DEBUG_ARCH_V8)
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{
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aarch64_num_wp_regs = AARCH64_DEBUG_NUM_SLOTS (dreg_state.dbg_info);
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if (aarch64_num_wp_regs > AARCH64_HWP_MAX_NUM)
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{
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warning (_("Unexpected number of hardware watchpoint registers"
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" reported by ptrace, got %d, expected %d."),
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aarch64_num_wp_regs, AARCH64_HWP_MAX_NUM);
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aarch64_num_wp_regs = AARCH64_HWP_MAX_NUM;
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}
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}
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else
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{
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warning (_("Unable to determine the number of hardware watchpoints"
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" available."));
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aarch64_num_wp_regs = 0;
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}
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/* Get hardware breakpoint register info. */
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if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_HW_BREAK, &iov) == 0
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&& AARCH64_DEBUG_ARCH (dreg_state.dbg_info) == AARCH64_DEBUG_ARCH_V8)
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{
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aarch64_num_bp_regs = AARCH64_DEBUG_NUM_SLOTS (dreg_state.dbg_info);
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if (aarch64_num_bp_regs > AARCH64_HBP_MAX_NUM)
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{
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warning (_("Unexpected number of hardware breakpoint registers"
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" reported by ptrace, got %d, expected %d."),
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aarch64_num_bp_regs, AARCH64_HBP_MAX_NUM);
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aarch64_num_bp_regs = AARCH64_HBP_MAX_NUM;
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}
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}
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else
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{
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warning (_("Unable to determine the number of hardware breakpoints"
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" available."));
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aarch64_num_bp_regs = 0;
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}
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}
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[aarch64] Check region OK for HW watchpoint in GDBserver
Nowadays, if user requests HW watchpoint to monitor a large memory area
or unaligned area, aarch64 GDB will split into multiple aligned areas,
and use multiple debugging registers to watch them. However, the
registers are not updated in a transaction way. GDBserver doesn't revert
updates in previous iterations if some debugging registers fail to update
due to some reason, like no free debugging registers available, in the
latter iteration. For example, if we have a char buf[34], and watch buf
in gdb,
(gdb) watch buf
Hardware watchpoint 2: buf
(gdb) c
Continuing.
infrun: clear_proceed_status_thread (Thread 13466)
infrun: proceed (addr=0xffffffffffffffff, signal=GDB_SIGNAL_DEFAULT)
infrun: step-over queue now empty
infrun: resuming [Thread 13466] for step-over
Sending packet: $m410838,22#35...Packet received: 00000000000000000000000000000000000000000000000000000000000000000000
infrun: skipping breakpoint: stepping past insn at: 0x400524
infrun: skipping breakpoint: stepping past insn at: 0x400524
Sending packet: $Z2,410838,22#80...Packet received: E01 <----- [1]
Packet Z2 (write-watchpoint) is supported
Sending packet: $Z0,7fb7fe0a8c,4#43...Packet received: OK
Warning:
Could not insert hardware watchpoint 2.
Could not insert hardware breakpoints:
You may have requested too many hardware breakpoints/watchpoints.
GDB receives E01 for Z2 packet [1] but GDBserver updates the debugging
register status,
insert_point (addr=0x00410838, len=34, type=hw-write-watchpoint):
BREAKPOINTs:
BP0: addr=0x0, ctrl=0x00000000, ref.count=0
BP1: addr=0x0, ctrl=0x00000000, ref.count=0
BP2: addr=0x0, ctrl=0x00000000, ref.count=0
BP3: addr=0x0, ctrl=0x00000000, ref.count=0
BP4: addr=0x0, ctrl=0x00000000, ref.count=0
BP5: addr=0x0, ctrl=0x00000000, ref.count=0
WATCHPOINTs:
WP0: addr=0x410850, ctrl=0x00001ff5, ref.count=1
WP1: addr=0x410848, ctrl=0x00001ff5, ref.count=1
WP2: addr=0x410840, ctrl=0x00001ff5, ref.count=1
WP3: addr=0x410838, ctrl=0x00001ff5, ref.count=1
four debugging registers can not monitor 34-byte long area, so the last
iteration of updating debugging register state fails but previous
iterations succeed. This makes GDB think no HW watchpoint is inserted
but some debugging registers are used.
This problem was exposed by "watch buf" gdb.base/watchpoint.exp with
aarch64 GDBserver debugging arm 32-bit program. The buf is 30-byte long
but 4-byte aligned, and four debugging registers can't cover 34-byte
(extend 4 bytes to be 8-byte aligned) area. However, this problem
does exist on non-multi-arch debugging scenario as well.
This patch moves code in aarch64_linux_region_ok_for_hw_watchpoint to
aarch64_linux_region_ok_for_watchpoint in nat/aarch64-linux-hw-point.c.
Then, checks with aarch64_linux_region_ok_for_watchpoint, like what we
are doing in GDB. If the region is OK, call aarch64_handle_watchpoint.
Regression tested on aarch64 with both 64-bit program and 32-bit
program. Some fails in gdb.base/watchpoint.exp are fixed.
gdb:
2015-09-03 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_region_ok_for_hw_watchpoint):
Move code to aarch64_linux_region_ok_for_watchpoint. Call
aarch64_linux_region_ok_for_watchpoint.
* nat/aarch64-linux-hw-point.c (aarch64_linux_region_ok_for_watchpoint):
New function.
* nat/aarch64-linux-hw-point.h (aarch64_linux_region_ok_for_watchpoint):
Declare it.
gdb/gdbserver:
2015-09-03 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_insert_point): Call
aarch64_handle_watchpoint if aarch64_linux_region_ok_for_watchpoint
returns true.
2015-09-03 13:01:49 +00:00
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/* Return true if we can watch a memory region that starts address
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ADDR and whose length is LEN in bytes. */
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int
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aarch64_linux_region_ok_for_watchpoint (CORE_ADDR addr, int len)
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{
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CORE_ADDR aligned_addr;
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/* Can not set watchpoints for zero or negative lengths. */
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if (len <= 0)
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return 0;
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/* Must have hardware watchpoint debug register(s). */
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if (aarch64_num_wp_regs == 0)
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return 0;
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/* We support unaligned watchpoint address and arbitrary length,
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as long as the size of the whole watched area after alignment
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doesn't exceed size of the total area that all watchpoint debug
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registers can watch cooperatively.
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This is a very relaxed rule, but unfortunately there are
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limitations, e.g. false-positive hits, due to limited support of
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hardware debug registers in the kernel. See comment above
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aarch64_align_watchpoint for more information. */
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aligned_addr = addr & ~(AARCH64_HWP_MAX_LEN_PER_REG - 1);
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if (aligned_addr + aarch64_num_wp_regs * AARCH64_HWP_MAX_LEN_PER_REG
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< addr + len)
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return 0;
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/* All tests passed so we are likely to be able to set the watchpoint.
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The reason that it is 'likely' rather than 'must' is because
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we don't check the current usage of the watchpoint registers, and
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there may not be enough registers available for this watchpoint.
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Ideally we should check the cached debug register state, however
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the checking is costly. */
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return 1;
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}
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