2009-11-24 19:22:45 +00:00
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/* mem.c --- memory for RX simulator.
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2012-01-04 08:28:28 +00:00
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Copyright (C) 2005, 2007-2012 Free Software Foundation, Inc.
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2009-11-24 19:22:45 +00:00
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Contributed by Red Hat, Inc.
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This file is part of the GNU simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* This slows down the simulator and we get some false negatives from
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gcc, like when it uses a long-sized hole to hold a byte-sized
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variable, knowing that it doesn't care about the other bits. But,
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if you need to track down a read-from-unitialized bug, set this to
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1. */
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#define RDCHECK 0
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2010-07-28 21:58:22 +00:00
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#include "config.h"
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2009-11-24 19:22:45 +00:00
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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[include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
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#include "opcode/rx.h"
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2009-11-24 19:22:45 +00:00
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#include "mem.h"
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#include "cpu.h"
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#include "syscalls.h"
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#include "misc.h"
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#include "err.h"
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#define L1_BITS (10)
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#define L2_BITS (10)
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2010-07-28 21:58:22 +00:00
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#define OFF_BITS PAGE_BITS
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2009-11-24 19:22:45 +00:00
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#define L1_LEN (1 << L1_BITS)
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#define L2_LEN (1 << L2_BITS)
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#define OFF_LEN (1 << OFF_BITS)
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static unsigned char **pt[L1_LEN];
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static unsigned char **ptr[L1_LEN];
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[include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
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static RX_Opcode_Decoded ***ptdc[L1_LEN];
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2009-11-24 19:22:45 +00:00
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/* [ get=0/put=1 ][ byte size ] */
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static unsigned int mem_counters[2][5];
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#define COUNT(isput,bytes) \
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if (verbose && enable_counting) mem_counters[isput][bytes]++
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void
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init_mem (void)
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{
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int i, j;
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for (i = 0; i < L1_LEN; i++)
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if (pt[i])
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{
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for (j = 0; j < L2_LEN; j++)
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if (pt[i][j])
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free (pt[i][j]);
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free (pt[i]);
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}
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memset (pt, 0, sizeof (pt));
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memset (ptr, 0, sizeof (ptr));
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memset (mem_counters, 0, sizeof (mem_counters));
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}
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2010-07-28 21:58:22 +00:00
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unsigned char *
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rx_mem_ptr (unsigned long address, enum mem_ptr_action action)
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2009-11-24 19:22:45 +00:00
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{
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int pt1 = (address >> (L2_BITS + OFF_BITS)) & ((1 << L1_BITS) - 1);
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int pt2 = (address >> OFF_BITS) & ((1 << L2_BITS) - 1);
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int pto = address & ((1 << OFF_BITS) - 1);
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if (address == 0)
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execution_error (SIM_ERR_NULL_POINTER_DEREFERENCE, 0);
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if (pt[pt1] == 0)
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{
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pt[pt1] = (unsigned char **) calloc (L2_LEN, sizeof (char **));
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ptr[pt1] = (unsigned char **) calloc (L2_LEN, sizeof (char **));
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[include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
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ptdc[pt1] = (RX_Opcode_Decoded ***) calloc (L2_LEN, sizeof (RX_Opcode_Decoded ***));
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2009-11-24 19:22:45 +00:00
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}
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if (pt[pt1][pt2] == 0)
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{
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if (action == MPA_READING)
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execution_error (SIM_ERR_READ_UNWRITTEN_PAGES, address);
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[include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
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pt[pt1][pt2] = (unsigned char *) calloc (OFF_LEN, 1);
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ptr[pt1][pt2] = (unsigned char *) calloc (OFF_LEN, 1);
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ptdc[pt1][pt2] = (RX_Opcode_Decoded **) calloc (OFF_LEN, sizeof(RX_Opcode_Decoded *));
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2009-11-24 19:22:45 +00:00
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}
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else if (action == MPA_READING
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&& ptr[pt1][pt2][pto] == MC_UNINIT)
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execution_error (SIM_ERR_READ_UNWRITTEN_BYTES, address);
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if (action == MPA_WRITING)
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{
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2010-09-30 00:03:23 +00:00
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int pto_dc;
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2009-11-24 19:22:45 +00:00
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if (ptr[pt1][pt2][pto] == MC_PUSHED_PC)
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execution_error (SIM_ERR_CORRUPT_STACK, address);
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ptr[pt1][pt2][pto] = MC_DATA;
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2010-09-30 00:03:23 +00:00
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/* The instruction decoder doesn't store it's decoded instructions
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at word swapped addresses. Therefore, when clearing the decode
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cache, we have to account for that here. */
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pto_dc = pto ^ (rx_big_endian ? 3 : 0);
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if (ptdc[pt1][pt2][pto_dc])
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[include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
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{
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2010-09-30 00:03:23 +00:00
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free (ptdc[pt1][pt2][pto_dc]);
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ptdc[pt1][pt2][pto_dc] = NULL;
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[include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
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}
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2009-11-24 19:22:45 +00:00
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}
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if (action == MPA_CONTENT_TYPE)
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[include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
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return (unsigned char *) (ptr[pt1][pt2] + pto);
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if (action == MPA_DECODE_CACHE)
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return (unsigned char *) (ptdc[pt1][pt2] + pto);
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2009-11-24 19:22:45 +00:00
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return pt[pt1][pt2] + pto;
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}
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[include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
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RX_Opcode_Decoded **
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rx_mem_decode_cache (unsigned long address)
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{
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return (RX_Opcode_Decoded **) rx_mem_ptr (address, MPA_DECODE_CACHE);
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}
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2009-11-24 19:22:45 +00:00
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static inline int
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is_reserved_address (unsigned int address)
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{
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return (address >= 0x00020000 && address < 0x00080000)
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|| (address >= 0x00100000 && address < 0x01000000)
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|| (address >= 0x08000000 && address < 0xff000000);
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}
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static void
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used (int rstart, int i, int j)
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{
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int rend = i << (L2_BITS + OFF_BITS);
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rend += j << OFF_BITS;
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|
|
if (rstart == 0xe0000 && rend == 0xe1000)
|
|
|
|
return;
|
|
|
|
printf ("mem: %08x - %08x (%dk bytes)\n", rstart, rend - 1,
|
|
|
|
(rend - rstart) / 1024);
|
|
|
|
}
|
|
|
|
|
|
|
|
static char *
|
|
|
|
mcs (int isput, int bytes)
|
|
|
|
{
|
|
|
|
return comma (mem_counters[isput][bytes]);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
mem_usage_stats ()
|
|
|
|
{
|
|
|
|
int i, j;
|
|
|
|
int rstart = 0;
|
|
|
|
int pending = 0;
|
|
|
|
|
|
|
|
for (i = 0; i < L1_LEN; i++)
|
|
|
|
if (pt[i])
|
|
|
|
{
|
|
|
|
for (j = 0; j < L2_LEN; j++)
|
|
|
|
if (pt[i][j])
|
|
|
|
{
|
|
|
|
if (!pending)
|
|
|
|
{
|
|
|
|
pending = 1;
|
|
|
|
rstart = (i << (L2_BITS + OFF_BITS)) + (j << OFF_BITS);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else if (pending)
|
|
|
|
{
|
|
|
|
pending = 0;
|
|
|
|
used (rstart, i, j);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if (pending)
|
|
|
|
{
|
|
|
|
pending = 0;
|
|
|
|
used (rstart, i, 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/* mem foo: 123456789012 123456789012 123456789012 123456789012
|
|
|
|
123456789012 */
|
|
|
|
printf (" byte short 3byte long"
|
|
|
|
" opcode\n");
|
|
|
|
if (verbose > 1)
|
|
|
|
{
|
|
|
|
/* Only use comma separated numbers when being very verbose.
|
|
|
|
Comma separated numbers are hard to parse in awk scripts. */
|
|
|
|
printf ("mem get: %12s %12s %12s %12s %12s\n", mcs (0, 1), mcs (0, 2),
|
|
|
|
mcs (0, 3), mcs (0, 4), mcs (0, 0));
|
|
|
|
printf ("mem put: %12s %12s %12s %12s\n", mcs (1, 1), mcs (1, 2),
|
|
|
|
mcs (1, 3), mcs (1, 4));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
printf ("mem get: %12u %12u %12u %12u %12u\n",
|
|
|
|
mem_counters[0][1], mem_counters[0][2],
|
|
|
|
mem_counters[0][3], mem_counters[0][4],
|
|
|
|
mem_counters[0][0]);
|
|
|
|
printf ("mem put: %12u %12u %12u %12u\n",
|
|
|
|
mem_counters [1][1], mem_counters [1][2],
|
|
|
|
mem_counters [1][3], mem_counters [1][4]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
unsigned long
|
|
|
|
mem_usage_cycles (void)
|
|
|
|
{
|
|
|
|
unsigned long rv = mem_counters[0][0];
|
|
|
|
rv += mem_counters[0][1] * 1;
|
|
|
|
rv += mem_counters[0][2] * 2;
|
|
|
|
rv += mem_counters[0][3] * 3;
|
|
|
|
rv += mem_counters[0][4] * 4;
|
|
|
|
rv += mem_counters[1][1] * 1;
|
|
|
|
rv += mem_counters[1][2] * 2;
|
|
|
|
rv += mem_counters[1][3] * 3;
|
|
|
|
rv += mem_counters[1][4] * 4;
|
|
|
|
return rv;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tpr = 0;
|
|
|
|
static void
|
|
|
|
s (int address, char *dir)
|
|
|
|
{
|
|
|
|
if (tpr == 0)
|
|
|
|
printf ("MEM[%08x] %s", address, dir);
|
|
|
|
tpr++;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define S(d) if (trace) s(address, d)
|
|
|
|
static void
|
|
|
|
e ()
|
|
|
|
{
|
|
|
|
if (!trace)
|
|
|
|
return;
|
|
|
|
tpr--;
|
|
|
|
if (tpr == 0)
|
|
|
|
printf ("\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
static char
|
|
|
|
mtypec (int address)
|
|
|
|
{
|
2010-07-28 21:58:22 +00:00
|
|
|
unsigned char *cp = rx_mem_ptr (address, MPA_CONTENT_TYPE);
|
2009-11-24 19:22:45 +00:00
|
|
|
return "udp"[*cp];
|
|
|
|
}
|
|
|
|
|
|
|
|
#define E() if (trace) e()
|
|
|
|
|
|
|
|
void
|
|
|
|
mem_put_byte (unsigned int address, unsigned char value)
|
|
|
|
{
|
|
|
|
unsigned char *m;
|
|
|
|
char tc = ' ';
|
|
|
|
|
|
|
|
if (trace)
|
|
|
|
tc = mtypec (address);
|
2010-07-28 21:58:22 +00:00
|
|
|
m = rx_mem_ptr (address, MPA_WRITING);
|
2009-11-24 19:22:45 +00:00
|
|
|
if (trace)
|
|
|
|
printf (" %02x%c", value, tc);
|
|
|
|
*m = value;
|
|
|
|
switch (address)
|
|
|
|
{
|
2010-07-28 21:58:22 +00:00
|
|
|
case 0x0008c02a: /* PA.DR */
|
|
|
|
{
|
2009-11-24 19:22:45 +00:00
|
|
|
static int old_led = -1;
|
2010-07-28 21:58:22 +00:00
|
|
|
int red_on = 0;
|
2009-11-24 19:22:45 +00:00
|
|
|
int i;
|
2010-07-28 21:58:22 +00:00
|
|
|
|
2009-11-24 19:22:45 +00:00
|
|
|
if (old_led != value)
|
|
|
|
{
|
2010-07-28 21:58:22 +00:00
|
|
|
fputs (" ", stdout);
|
|
|
|
for (i = 0; i < 8; i++)
|
2009-11-24 19:22:45 +00:00
|
|
|
if (value & (1 << i))
|
2010-07-28 21:58:22 +00:00
|
|
|
{
|
|
|
|
if (! red_on)
|
|
|
|
{
|
|
|
|
fputs ("\033[31m", stdout);
|
|
|
|
red_on = 1;
|
|
|
|
}
|
|
|
|
fputs (" @", stdout);
|
|
|
|
}
|
2009-11-24 19:22:45 +00:00
|
|
|
else
|
2010-07-28 21:58:22 +00:00
|
|
|
{
|
|
|
|
if (red_on)
|
|
|
|
{
|
|
|
|
fputs ("\033[0m", stdout);
|
|
|
|
red_on = 0;
|
|
|
|
}
|
|
|
|
fputs (" *", stdout);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (red_on)
|
|
|
|
fputs ("\033[0m", stdout);
|
|
|
|
|
|
|
|
fputs ("\r", stdout);
|
2009-11-24 19:22:45 +00:00
|
|
|
fflush (stdout);
|
|
|
|
old_led = value;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2010-07-28 21:58:22 +00:00
|
|
|
#ifdef CYCLE_STATS
|
|
|
|
case 0x0008c02b: /* PB.DR */
|
2009-11-24 19:22:45 +00:00
|
|
|
{
|
|
|
|
if (value == 0)
|
2010-07-28 21:58:22 +00:00
|
|
|
halt_pipeline_stats ();
|
|
|
|
else
|
|
|
|
reset_pipeline_stats ();
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
case 0x00088263: /* SCI4.TDR */
|
|
|
|
{
|
|
|
|
static int pending_exit = 0;
|
|
|
|
if (pending_exit == 2)
|
2009-11-24 19:22:45 +00:00
|
|
|
{
|
2010-07-28 21:58:22 +00:00
|
|
|
step_result = RX_MAKE_EXITED(value);
|
|
|
|
longjmp (decode_jmp_buf, 1);
|
2009-11-24 19:22:45 +00:00
|
|
|
}
|
2010-07-28 21:58:22 +00:00
|
|
|
else if (value == 3)
|
|
|
|
pending_exit ++;
|
2009-11-24 19:22:45 +00:00
|
|
|
else
|
2010-07-28 21:58:22 +00:00
|
|
|
pending_exit = 0;
|
|
|
|
|
|
|
|
putchar(value);
|
2009-11-24 19:22:45 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
if (is_reserved_address (address))
|
|
|
|
generate_access_exception ();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
mem_put_qi (int address, unsigned char value)
|
|
|
|
{
|
|
|
|
S ("<=");
|
|
|
|
mem_put_byte (address, value & 0xff);
|
|
|
|
E ();
|
|
|
|
COUNT (1, 1);
|
|
|
|
}
|
|
|
|
|
[include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
|
|
|
#ifdef CYCLE_ACCURATE
|
2010-07-28 21:58:22 +00:00
|
|
|
static int tpu_base;
|
[include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
|
|
|
#endif
|
2010-07-28 21:58:22 +00:00
|
|
|
|
2009-11-24 19:22:45 +00:00
|
|
|
void
|
|
|
|
mem_put_hi (int address, unsigned short value)
|
|
|
|
{
|
|
|
|
S ("<=");
|
2010-07-28 21:58:22 +00:00
|
|
|
switch (address)
|
2009-11-24 19:22:45 +00:00
|
|
|
{
|
2010-07-28 21:58:22 +00:00
|
|
|
#ifdef CYCLE_ACCURATE
|
|
|
|
case 0x00088126: /* TPU1.TCNT */
|
|
|
|
tpu_base = regs.cycle_count;
|
|
|
|
break;
|
|
|
|
case 0x00088136: /* TPU2.TCNT */
|
|
|
|
tpu_base = regs.cycle_count;
|
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
default:
|
|
|
|
if (rx_big_endian)
|
|
|
|
{
|
|
|
|
mem_put_byte (address, value >> 8);
|
|
|
|
mem_put_byte (address + 1, value & 0xff);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
mem_put_byte (address, value & 0xff);
|
|
|
|
mem_put_byte (address + 1, value >> 8);
|
|
|
|
}
|
2009-11-24 19:22:45 +00:00
|
|
|
}
|
|
|
|
E ();
|
|
|
|
COUNT (1, 2);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
mem_put_psi (int address, unsigned long value)
|
|
|
|
{
|
|
|
|
S ("<=");
|
|
|
|
if (rx_big_endian)
|
|
|
|
{
|
|
|
|
mem_put_byte (address, value >> 16);
|
|
|
|
mem_put_byte (address + 1, (value >> 8) & 0xff);
|
|
|
|
mem_put_byte (address + 2, value & 0xff);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
mem_put_byte (address, value & 0xff);
|
|
|
|
mem_put_byte (address + 1, (value >> 8) & 0xff);
|
|
|
|
mem_put_byte (address + 2, value >> 16);
|
|
|
|
}
|
|
|
|
E ();
|
|
|
|
COUNT (1, 3);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
mem_put_si (int address, unsigned long value)
|
|
|
|
{
|
|
|
|
S ("<=");
|
|
|
|
if (rx_big_endian)
|
|
|
|
{
|
|
|
|
mem_put_byte (address + 0, (value >> 24) & 0xff);
|
|
|
|
mem_put_byte (address + 1, (value >> 16) & 0xff);
|
|
|
|
mem_put_byte (address + 2, (value >> 8) & 0xff);
|
|
|
|
mem_put_byte (address + 3, value & 0xff);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
mem_put_byte (address + 0, value & 0xff);
|
|
|
|
mem_put_byte (address + 1, (value >> 8) & 0xff);
|
|
|
|
mem_put_byte (address + 2, (value >> 16) & 0xff);
|
|
|
|
mem_put_byte (address + 3, (value >> 24) & 0xff);
|
|
|
|
}
|
|
|
|
E ();
|
|
|
|
COUNT (1, 4);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
mem_put_blk (int address, void *bufptr, int nbytes)
|
|
|
|
{
|
|
|
|
S ("<=");
|
|
|
|
if (enable_counting)
|
|
|
|
mem_counters[1][1] += nbytes;
|
|
|
|
while (nbytes--)
|
|
|
|
mem_put_byte (address++, *(unsigned char *) bufptr++);
|
|
|
|
E ();
|
|
|
|
}
|
|
|
|
|
|
|
|
unsigned char
|
|
|
|
mem_get_pc (int address)
|
|
|
|
{
|
2010-07-28 21:58:22 +00:00
|
|
|
unsigned char *m = rx_mem_ptr (address, MPA_READING);
|
2009-11-24 19:22:45 +00:00
|
|
|
COUNT (0, 0);
|
|
|
|
return *m;
|
|
|
|
}
|
|
|
|
|
|
|
|
static unsigned char
|
|
|
|
mem_get_byte (unsigned int address)
|
|
|
|
{
|
|
|
|
unsigned char *m;
|
|
|
|
|
|
|
|
S ("=>");
|
2010-07-28 21:58:22 +00:00
|
|
|
m = rx_mem_ptr (address, MPA_READING);
|
2009-11-24 19:22:45 +00:00
|
|
|
switch (address)
|
|
|
|
{
|
2010-07-28 21:58:22 +00:00
|
|
|
case 0x00088264: /* SCI4.SSR */
|
2009-11-24 19:22:45 +00:00
|
|
|
E();
|
2010-07-28 21:58:22 +00:00
|
|
|
return 0x04; /* transmitter empty */
|
2009-11-24 19:22:45 +00:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
if (trace)
|
|
|
|
printf (" %02x%c", *m, mtypec (address));
|
|
|
|
if (is_reserved_address (address))
|
|
|
|
generate_access_exception ();
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
E ();
|
|
|
|
return *m;
|
|
|
|
}
|
|
|
|
|
|
|
|
unsigned char
|
|
|
|
mem_get_qi (int address)
|
|
|
|
{
|
|
|
|
unsigned char rv;
|
|
|
|
S ("=>");
|
|
|
|
rv = mem_get_byte (address);
|
|
|
|
COUNT (0, 1);
|
|
|
|
E ();
|
|
|
|
return rv;
|
|
|
|
}
|
|
|
|
|
|
|
|
unsigned short
|
|
|
|
mem_get_hi (int address)
|
|
|
|
{
|
|
|
|
unsigned short rv;
|
|
|
|
S ("=>");
|
2010-07-28 21:58:22 +00:00
|
|
|
switch (address)
|
2009-11-24 19:22:45 +00:00
|
|
|
{
|
2010-07-28 21:58:22 +00:00
|
|
|
#ifdef CYCLE_ACCURATE
|
|
|
|
case 0x00088126: /* TPU1.TCNT */
|
|
|
|
rv = (regs.cycle_count - tpu_base) >> 16;
|
|
|
|
break;
|
|
|
|
case 0x00088136: /* TPU2.TCNT */
|
|
|
|
rv = (regs.cycle_count - tpu_base) >> 0;
|
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
default:
|
|
|
|
if (rx_big_endian)
|
|
|
|
{
|
|
|
|
rv = mem_get_byte (address) << 8;
|
|
|
|
rv |= mem_get_byte (address + 1);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
rv = mem_get_byte (address);
|
|
|
|
rv |= mem_get_byte (address + 1) << 8;
|
|
|
|
}
|
2009-11-24 19:22:45 +00:00
|
|
|
}
|
|
|
|
COUNT (0, 2);
|
|
|
|
E ();
|
|
|
|
return rv;
|
|
|
|
}
|
|
|
|
|
|
|
|
unsigned long
|
|
|
|
mem_get_psi (int address)
|
|
|
|
{
|
|
|
|
unsigned long rv;
|
|
|
|
S ("=>");
|
|
|
|
if (rx_big_endian)
|
|
|
|
{
|
|
|
|
rv = mem_get_byte (address + 2);
|
|
|
|
rv |= mem_get_byte (address + 1) << 8;
|
|
|
|
rv |= mem_get_byte (address) << 16;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
rv = mem_get_byte (address);
|
|
|
|
rv |= mem_get_byte (address + 1) << 8;
|
|
|
|
rv |= mem_get_byte (address + 2) << 16;
|
|
|
|
}
|
|
|
|
COUNT (0, 3);
|
|
|
|
E ();
|
|
|
|
return rv;
|
|
|
|
}
|
|
|
|
|
|
|
|
unsigned long
|
|
|
|
mem_get_si (int address)
|
|
|
|
{
|
|
|
|
unsigned long rv;
|
|
|
|
S ("=>");
|
|
|
|
if (rx_big_endian)
|
|
|
|
{
|
|
|
|
rv = mem_get_byte (address + 3);
|
|
|
|
rv |= mem_get_byte (address + 2) << 8;
|
|
|
|
rv |= mem_get_byte (address + 1) << 16;
|
|
|
|
rv |= mem_get_byte (address) << 24;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
rv = mem_get_byte (address);
|
|
|
|
rv |= mem_get_byte (address + 1) << 8;
|
|
|
|
rv |= mem_get_byte (address + 2) << 16;
|
|
|
|
rv |= mem_get_byte (address + 3) << 24;
|
|
|
|
}
|
|
|
|
COUNT (0, 4);
|
|
|
|
E ();
|
|
|
|
return rv;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
mem_get_blk (int address, void *bufptr, int nbytes)
|
|
|
|
{
|
|
|
|
S ("=>");
|
|
|
|
if (enable_counting)
|
|
|
|
mem_counters[0][1] += nbytes;
|
|
|
|
while (nbytes--)
|
|
|
|
*(char *) bufptr++ = mem_get_byte (address++);
|
|
|
|
E ();
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
sign_ext (int v, int bits)
|
|
|
|
{
|
|
|
|
if (bits < 32)
|
|
|
|
{
|
|
|
|
v &= (1 << bits) - 1;
|
|
|
|
if (v & (1 << (bits - 1)))
|
|
|
|
v -= (1 << bits);
|
|
|
|
}
|
|
|
|
return v;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
mem_set_content_type (int address, enum mem_content_type type)
|
|
|
|
{
|
2010-07-28 21:58:22 +00:00
|
|
|
unsigned char *mt = rx_mem_ptr (address, MPA_CONTENT_TYPE);
|
2009-11-24 19:22:45 +00:00
|
|
|
*mt = type;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
mem_set_content_range (int start_address, int end_address, enum mem_content_type type)
|
|
|
|
{
|
|
|
|
while (start_address < end_address)
|
|
|
|
{
|
|
|
|
int sz, ofs;
|
|
|
|
unsigned char *mt;
|
|
|
|
|
|
|
|
sz = end_address - start_address;
|
|
|
|
ofs = start_address % L1_LEN;
|
|
|
|
if (sz + ofs > L1_LEN)
|
|
|
|
sz = L1_LEN - ofs;
|
|
|
|
|
2010-07-28 21:58:22 +00:00
|
|
|
mt = rx_mem_ptr (start_address, MPA_CONTENT_TYPE);
|
2009-11-24 19:22:45 +00:00
|
|
|
memset (mt, type, sz);
|
|
|
|
|
|
|
|
start_address += sz;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
enum mem_content_type
|
|
|
|
mem_get_content_type (int address)
|
|
|
|
{
|
2010-07-28 21:58:22 +00:00
|
|
|
unsigned char *mt = rx_mem_ptr (address, MPA_CONTENT_TYPE);
|
2009-11-24 19:22:45 +00:00
|
|
|
return *mt;
|
|
|
|
}
|