119 lines
5.5 KiB
Text
119 lines
5.5 KiB
Text
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Testing DMA_D_CTRL...
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Testing DMA_D_STAT...
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DMA warning: write reg 0x1000e010 req=0xffffffff actual=0x63ffe3ff
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Testing DMA_D_PCR...
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DMA warning: write reg 0x1000e020 req=0x8fff0000 actual=0x83ff0000
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DMA warning: write reg 0x1000e020 req=0x05550000 actual=0x01550000
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DMA warning: write reg 0x1000e020 req=0x0155aaaa actual=0x015502aa
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DMA warning: write reg 0x1000e020 req=0x00005555 actual=0x00000155
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Testing DMA_D_SQWC...
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DMA warning: read from unsupported register (D_SQWC)
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DMA warning: write reg 0x1000e030 req=0x5555aaaa actual=0x005500aa
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DMA warning: write to unsupported register (D_SQWC)
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DMA warning: read from unsupported register (D_SQWC)
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DMA warning: write reg 0x1000e030 req=0xaaaa5555 actual=0x00aa0055
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DMA warning: write to unsupported register (D_SQWC)
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DMA warning: read from unsupported register (D_SQWC)
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DMA warning: write to unsupported register (D_SQWC)
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Testing DMA_D_RBOR...
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DMA warning: read from unsupported register (D_RBOR)
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DMA warning: write reg 0x1000e050 req=0x5555aaaa actual=0x5555aaa0
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DMA warning: write to unsupported register (D_RBOR)
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DMA warning: read from unsupported register (D_RBOR)
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DMA warning: write reg 0x1000e050 req=0xaaaa5555 actual=0x2aaa5550
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DMA warning: write to unsupported register (D_RBOR)
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DMA warning: read from unsupported register (D_RBOR)
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DMA warning: write to unsupported register (D_RBOR)
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Testing DMA_D_RBSR...
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DMA warning: read from unsupported register (D_RBSR)
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DMA warning: write reg 0x1000e040 req=0x5555aaaa actual=0x5555aaa0
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DMA warning: write to unsupported register (D_RBSR)
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DMA warning: read from unsupported register (D_RBSR)
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DMA warning: write reg 0x1000e040 req=0xaaaa5555 actual=0x2aaa5550
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DMA warning: write to unsupported register (D_RBSR)
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DMA warning: read from unsupported register (D_RBSR)
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DMA warning: write to unsupported register (D_RBSR)
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Testing DMA_D_STADR...
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DMA warning: read from unsupported register (D_STADR)
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DMA warning: write reg 0x1000e060 req=0x5555aaaa actual=0x5555aaa0
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DMA warning: write to unsupported register (D_STADR)
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DMA warning: read from unsupported register (D_STADR)
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DMA warning: write reg 0x1000e060 req=0xaaaa5555 actual=0x2aaa5550
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DMA warning: write to unsupported register (D_STADR)
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DMA warning: read from unsupported register (D_STADR)
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DMA warning: write to unsupported register (D_STADR)
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Testing DMA_D0_CHCR...
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DMA warning: write reg 0x10008000 req=0x5555aaaa actual=0x000000aa
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DMA warning: write reg 0x10008000 req=0xaaaa5555 actual=0x00000155
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Testing DMA_D0_MADR...
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DMA warning: write reg 0x10008010 req=0x5555aaaa actual=0x5555aaa0
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DMA warning: write reg 0x10008010 req=0x2aaa5555 actual=0x2aaa5550
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Testing DMA_D0_TADR...
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DMA warning: write reg 0x10008030 req=0x5555aaaa actual=0x5555aaa0
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DMA warning: write reg 0x10008030 req=0x2aaa5555 actual=0x2aaa5550
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Testing DMA_D0_ASR0...
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DMA warning: write reg 0x10008040 req=0x5555aaaa actual=0x5555aaa0
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DMA warning: write reg 0x10008040 req=0x2aaa5555 actual=0x2aaa5550
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Testing DMA_D0_ASR1...
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DMA warning: write reg 0x10008050 req=0x5555aaaa actual=0x5555aaa0
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DMA warning: write reg 0x10008050 req=0x2aaa5555 actual=0x2aaa5550
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Testing DMA_D0_QWC...
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DMA warning: write reg 0x10008020 req=0x5555aaaa actual=0x0000aaaa
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DMA warning: write reg 0x10008020 req=0xaaaa5555 actual=0x00005555
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Testing DMA_D0_PKTFLAG...
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Testing DMA_D1_CHCR...
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DMA warning: write reg 0x10009000 req=0x5555aaaa actual=0x000000aa
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DMA warning: write reg 0x10009000 req=0xaaaa5555 actual=0x00000155
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Testing DMA_D1_MADR...
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DMA warning: write reg 0x10009010 req=0x5555aaaa actual=0x5555aaa0
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DMA warning: write reg 0x10009010 req=0x2aaa5555 actual=0x2aaa5550
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Testing DMA_D1_TADR...
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DMA warning: write reg 0x10009030 req=0x5555aaaa actual=0x5555aaa0
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DMA warning: write reg 0x10009030 req=0x2aaa5555 actual=0x2aaa5550
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Testing DMA_D1_ASR0...
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DMA warning: write reg 0x10009040 req=0x5555aaaa actual=0x5555aaa0
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DMA warning: write reg 0x10009040 req=0x2aaa5555 actual=0x2aaa5550
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Testing DMA_D1_ASR1...
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DMA warning: write reg 0x10009050 req=0x5555aaaa actual=0x5555aaa0
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DMA warning: write reg 0x10009050 req=0x2aaa5555 actual=0x2aaa5550
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Testing DMA_D1_QWC...
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DMA warning: write reg 0x10009020 req=0x5555aaaa actual=0x0000aaaa
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DMA warning: write reg 0x10009020 req=0xaaaa5555 actual=0x00005555
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Testing DMA_D1_PKTFLAG...
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Testing DMA_D2_CHCR...
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DMA warning: write reg 0x1000a000 req=0x5555aaaa actual=0x000000aa
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DMA warning: write reg 0x1000a000 req=0xaaaa5555 actual=0x00000155
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Testing DMA_D2_MADR...
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DMA warning: write reg 0x1000a010 req=0x5555aaaa actual=0x5555aaa0
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DMA warning: write reg 0x1000a010 req=0x2aaa5555 actual=0x2aaa5550
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Testing DMA_D2_TADR...
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DMA warning: write reg 0x1000a030 req=0x5555aaaa actual=0x5555aaa0
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DMA warning: write reg 0x1000a030 req=0x2aaa5555 actual=0x2aaa5550
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Testing DMA_D2_ASR0...
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DMA warning: write reg 0x1000a040 req=0x5555aaaa actual=0x5555aaa0
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DMA warning: write reg 0x1000a040 req=0x2aaa5555 actual=0x2aaa5550
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Testing DMA_D2_ASR1...
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DMA warning: write reg 0x1000a050 req=0x5555aaaa actual=0x5555aaa0
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DMA warning: write reg 0x1000a050 req=0x2aaa5555 actual=0x2aaa5550
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Testing DMA_D2_QWC...
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DMA warning: write reg 0x1000a020 req=0x5555aaaa actual=0x0000aaaa
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DMA warning: write reg 0x1000a020 req=0xaaaa5555 actual=0x00005555
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Testing DMA_D2_PKTFLAG...
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Preparing for a DMA1 NORM transfer...
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Ready...
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Completed OK...
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Preparing for a DMA0 TAG transfer...
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Ready...
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DMA WARNING: address in tag (0x0001ad41_0c000001) is not quad word aligned.
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Completed OK...
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Preparing for a DMA2 TAG transfer with suspension...
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Ready...
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DMA WARNING: address in tag (0x0001ad41_0c000001) is not quad word aligned.
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returns...
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Suspended OK...
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DMA warning: write reg 0x1000a000 req=0xb0000104 actual=0x00000104
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Completed OK...
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